CN110444168A - Pixel circuit, display panel and display equipment - Google Patents

Pixel circuit, display panel and display equipment Download PDF

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Publication number
CN110444168A
CN110444168A CN201910754905.0A CN201910754905A CN110444168A CN 110444168 A CN110444168 A CN 110444168A CN 201910754905 A CN201910754905 A CN 201910754905A CN 110444168 A CN110444168 A CN 110444168A
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CN
China
Prior art keywords
transistor
pole
pixel circuit
driving signal
connect
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Pending
Application number
CN201910754905.0A
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Chinese (zh)
Inventor
袁志东
李永谦
袁粲
焦超
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Hefei BOE Zhuoyin Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Hefei BOE Zhuoyin Technology Co Ltd
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Application filed by BOE Technology Group Co Ltd, Hefei BOE Zhuoyin Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN201910754905.0A priority Critical patent/CN110444168A/en
Publication of CN110444168A publication Critical patent/CN110444168A/en
Priority to US16/856,803 priority patent/US11107410B2/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275Details of drivers for data electrodes
    • G09G3/3291Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

The invention discloses a kind of pixel circuit, display panel and display equipment, wherein pixel circuit includes: the first transistor, and the first pole is connect with data line, and control electrode is for inputting the first driving signal;Luminescence unit;The anode of second transistor, the first pole and luminescence unit connects, and the second pole is used for input reference voltage, and control electrode is for inputting the first driving signal;Third transistor;4th transistor, the first pole are connect with data line, and the anode connection of the second pole and luminescence unit, control electrode is for inputting the second driving signal;Capacitor is connected between the control electrode of third transistor and the second pole of third transistor.The pixel circuit carries out one-to-one voltage compensation to driving transistor using data line, effectively optimize compensation function, improve product yield, and woth no need to carry out shifted design line by line to the second driving signal, greatly reduce the shared arrangement space of pixel circuit, to which product narrow frame not only may be implemented, but also can be with reduced cost.

Description

Pixel circuit, display panel and display equipment
Technical field
The present invention relates to field of display technology more particularly to a kind of pixel circuit, a kind of display panel, a kind of displays to set It is standby.
Background technique
AMOLED (Active-matrix organic light-emitting diode, active-matrix organic light emission two Pole pipe) because of high contrast, visible angle is wide and fast response time is expected to ban liquid crystal as the selection of next generation display mainstream. Generally in the pixel circuit design of OLED (Organic Light-Emitting Diode, Organic Light Emitting Diode) product, In view of the limitation of technique, pixel circuit is designed all of N-type TFT (Thin Film Transistor, thin film transistor (TFT)), As 54.5inch AMOLED panel design in, use 3T1C pixel circuit as shown in Figure 1, wherein T1-T3 be first to Third transistor, Vdata are data line, and VDD is DC power supply, and Sense is the line of induction, and EL is luminescence unit, and G1 is the first drive Dynamic signal, G2 are the second driving signal, and Cst is capacitor.Further, as shown in Fig. 2, Fig. 2 is the n-th column of circuit shown in Fig. 1 Pixel structure.
OLED product itself is that need electroluminescent device to carry out luminous, and required glow current is needed by driving TFT (T3) It provides.Since driving TFT has differences, need just to correct by external compensation and shutdown compensation, therefore AMOLED shows picture Element design is needed in view of compensation timing.Incude especially by the voltage to S point, and according to induced voltage to driving TFT (T3) it compensates.
However, as shown in Fig. 2, the reference voltage Vef<n>of conventional pixel is 1 support, 3 framework, if wherein some sub-pixel Second transistor T2 there is short circuit, then during will lead to induction, charge always, cause to the reference voltage Vef<n>of this column It arranges other pixels and error occurs in induction, causing this, to list existing concealed wire bad.
Also, as shown in Figure 3 and Figure 4, Fig. 3 is the compensation timing diagram of pixel circuit shown in FIG. 1, and Fig. 4 is shown in FIG. 1 The shutdown of pixel circuit compensates timing diagram.As can be seen from figs. 3 and 4 G1, G2 are required to progressively scan during scanning (Scan), Cause pixel circuit occupied area excessive (needing double driving signal) in this way, is unfavorable for realizing the narrow frame design of product, and Higher cost.
Summary of the invention
The present invention is directed to solve at least some of the technical problems in related technologies.
For this purpose, the first purpose of this invention is to propose a kind of pixel circuit, the pixel circuit is using data line to drive Dynamic transistor carries out one-to-one voltage compensation, separates the bad influence to during compensation of other sub-pixels, and it is accurate to improve compensation Degree, effective Optimization Compensation function improves product yield, and the second driving signal is more simple, only need to during induction where Primary progress voltage compensation is opened when row is selected, does not need to carry out shifted design line by line to the second driving signal, greatly Reduce the shared arrangement space of pixel circuit, so that product narrow frame had not only may be implemented, but also can be with reduced cost.
Second object of the present invention is to propose a kind of display panel.
Third object of the present invention is to propose a kind of display equipment.
In order to achieve the above object, first aspect present invention embodiment proposes a kind of pixel circuit, comprising: the first transistor, First pole of the first transistor is connect with data line, and the control electrode of the first transistor is for inputting the first driving letter Number;Luminescence unit, the minus earth of the luminescence unit;Second transistor, the first pole of the second transistor and the hair The anode of light unit connects, and the second pole of the second transistor is used for input reference voltage, the control of the second transistor Pole is for inputting first driving signal;First pole of third transistor, the third transistor is connect with DC power supply, institute The second pole for stating third transistor is connect with the anode of the luminescence unit, the control electrode of the third transistor and described first Second pole of transistor connects;First pole of the 4th transistor, the 4th transistor is connect with the data line, and the described 4th Second pole of transistor is connect with the anode of the luminescence unit, and the control electrode of the 4th transistor is for inputting the second driving Signal;Capacitor, the first end of the capacitor are connect with the control electrode of the third transistor, the second end of the capacitor with it is described Second pole of third transistor connects.
The pixel circuit proposed according to embodiments of the present invention by increasing by the 4th transistor, while utilizing the first driving letter Number control the first transistor and second transistor controls the 4th transistor using the second driving signal, and the 4th transistor only need to be Row where during induction opened when selected it is primary carry out voltage compensation, do not need to the driving signal of the 4th transistor into Capable shifted design line by line, greatly reduces the shared arrangement space of pixel circuit, so that product narrow frame both may be implemented Change, and can be with reduced cost, also, one-to-one voltage compensation is carried out to driving transistor using data line, separates other sub- pictures The bad influence to during compensation of element, improves compensation accuracy, effective Optimization Compensation function improves product yield.
In addition, pixel circuit according to the above embodiment of the present invention can also have the following additional technical features:
According to one embodiment of present invention, in the driving stage, second driving signal is when be expert at selected, In It is the first level in the first set period of time during induction, to drive the 4th transistor turns.
According to one embodiment of present invention, in the driving stage, first driving signal is during scanning It is first level in second set period of time, it is described to drive the first transistor and the second transistor to be connected First driving signal third set period of time during the induction and in the 4th period is when be expert at selected First level, first set period of time is between the third set period of time and the 4th period.
According to one embodiment of present invention, in shutdown compensated stage, second driving signal is second electrical level, to drive Move the 4th transistor cutoff.
According to one embodiment of present invention, in the shutdown compensated stage, first driving signal be expert at by It is first level when choosing, to drive the first transistor and the second transistor to be connected.
According to one embodiment of present invention, the luminescence unit is Organic Light Emitting Diode.
According to one embodiment of present invention, the luminescence unit is active matrix organic LED.
According to one embodiment of present invention, the first transistor, the second transistor, the third transistor and 4th transistor is thin film transistor (TFT).
According to one embodiment of present invention, the first transistor, the second transistor, the third transistor and 4th transistor is N-type transistor, and first level is high level.
In order to achieve the above object, second aspect of the present invention embodiment proposes a kind of display panel, including first party of the present invention Pixel circuit described in the embodiment of face.
The display panel proposed according to embodiments of the present invention greatly reduces pixel electricity by above-mentioned pixel circuit The shared arrangement space on road so that product narrow frame had not only may be implemented, but also can be with reduced cost, also, utilizes data line One-to-one voltage compensation is carried out to driving transistor, the bad influence to during compensation of other sub-pixels is separated, improves compensation Accuracy, effective Optimization Compensation function, improves product yield.
In order to achieve the above object, third aspect present invention embodiment proposes a kind of display equipment, including second party of the present invention Display panel described in the embodiment of face.
The display equipment proposed according to embodiments of the present invention greatly reduces pixel electricity by above-mentioned display panel The shared arrangement space on road so that product narrow frame had not only may be implemented, but also can be with reduced cost, also, utilizes data line One-to-one voltage compensation is carried out to driving transistor, the bad influence to during compensation of other sub-pixels is separated, improves compensation Accuracy, effective Optimization Compensation function, improves product yield.
The additional aspect of the present invention and advantage will be set forth in part in the description, and will partially become from the following description Obviously, or practice through the invention is recognized.
Detailed description of the invention
Above-mentioned and/or additional aspect and advantage of the invention will become from the following description of the accompanying drawings of embodiments Obviously and it is readily appreciated that, in which:
Fig. 1 is the structural schematic diagram of pixel circuit in the related technology;
Fig. 2 is the n-th column pixel structure of circuit shown in Fig. 1;
Fig. 3 is the timing diagram of pixel circuit shown in FIG. 1;
Fig. 4 is that the shutdown of pixel circuit shown in FIG. 1 compensates timing diagram;
Fig. 5 is the structure chart of pixel circuit according to an embodiment of the invention;
Fig. 6 is the n-th entire pixel structure of column of circuit shown in Fig. 5;
Fig. 7 is the timing diagram of pixel circuit shown in Fig. 5.
Fig. 8 is that the shutdown of pixel circuit shown in fig. 5 compensates timing diagram.
Fig. 9 is the gate driving circuit odd-numbered line cascade schematic diagram of pixel circuit shown in FIG. 1;
Figure 10 is the schematic diagram of the driving signal of pixel circuit shown in fig. 5
Specific embodiment
The embodiment of the present invention is described below in detail, examples of the embodiments are shown in the accompanying drawings, wherein from beginning to end Same or similar label indicates same or similar element or element with the same or similar functions.Below with reference to attached The embodiment of figure description is exemplary, it is intended to is used to explain the present invention, and is not considered as limiting the invention.
Below with reference to the accompanying drawings the pixel circuit, display panel and display equipment of the embodiment of the present invention are described.
Fig. 5 is the structure chart of pixel circuit according to an embodiment of the invention.As shown in figure 5, the circuit includes: first Transistor T1, luminescence unit EL, second transistor T2, third transistor T3, the 4th transistor T4 and capacitor Cst.
Wherein, the first pole of the first transistor T1 is connect with data line Vdata, and the control electrode of the first transistor T1 is for defeated Enter the first driving signal G1;The minus earth of luminescence unit EL;The first pole of second transistor T2 and the anode of luminescence unit EL Connection, the second pole of second transistor T2 are used for input reference voltage Vref, and the control electrode of second transistor T2 is for inputting the One driving signal G1;The first pole of third transistor T3 is connect with DC power supply VDD, the second pole of third transistor T3 and shine The anode of unit EL connects, and the control electrode of third transistor T3 is connect with the second pole of the first transistor T1;4th transistor T4 The first pole connect with data line Vdata, the second pole of the 4th transistor T4 is connect with the anode of luminescence unit EL, the 4th crystal The control electrode of pipe T4 is for inputting the second driving signal;The first end of capacitor Cst is connect with the control electrode of third transistor T3, electricity The second end for holding Cst is connect with the second pole of third transistor T3
Further, as shown in fig. 7, in an embodiment of the present invention, in the driving stage, the second driving signal G2 is at place It is the first level 1 in the first set period of time t1 during induction, to drive the 4th transistor turns when row is selected.
It should be noted that in an embodiment of the present invention, the first transistor T1, second transistor T2, third transistor T3 With the 4th transistor T4 can be thin film transistor (TFT) (TFT), the first transistor T1, second transistor T2, third transistor T3 and 4th transistor T4 can be N-type transistor, and the first level 1 is high level.Luminescence unit EL can be Organic Light Emitting Diode (OLED), or active-matrix Organic Light Emitting Diode (AMOLED).
Specifically, with reference to Fig. 2, the reference voltage Vef<n>of pixel circuit is it is possible that 1 support 3 or even 1 support 6,1 support 12 etc. Design, if incuded using Vef<n>to S point current potential, if wherein the second transistor T2 appearance of some sub-pixel is short Road during then will lead to induction, always charges to the reference voltage Vef<n>of this column, causes this to arrange other pixels and goes out in induction Existing error causes this and lists that existing concealed wire is bad, and interacting between sub-pixel can aggravate the decline of yield.The application is using such as Pixel circuit shown in fig. 5, the n-th column pixel structure can refer to shown in Fig. 6, incuded using data line Vdata, to drive Dynamic transistor carries out one-to-one voltage compensation, separates the bad influence to during compensation of other sub-pixels, and it is accurate to improve compensation Degree, effective Optimization Compensation function improve product yield.
In addition, controlling T1 and T2 using G1 as shown in figure 5, the application separates G2 timing, T4 is controlled using G2, Timing diagram can refer to shown in Fig. 7.As shown in fig. 7, the driving stage can be divided into scanning (Scan) period and induction (Sense) phase Between, during induction, a certain row is chosen to carry out Sense (Fig. 5, which facilitates, understands that Sense is drawn in order), G2 driving signal at random A CLK is only needed, to control T4 opening, the voltage of node S is incuded, Fig. 9 is the grid of pixel circuit shown in FIG. 1 Pole driving circuit odd-numbered line cascades schematic diagram, and in this application, dash area CLK can be omitted in Fig. 9, not need to the 4th The driving signal of transistor carries out shifted design line by line, the shared arrangement space of pixel circuit is greatly reduced, thus both Product narrow frame may be implemented, and can be with reduced cost.
ADC in Fig. 5 is analog-digital converter, can convert analog signals into digital signal.
Further, according to one embodiment of present invention, as shown in fig. 7, in the driving stage, the first driving signal G1 exists It is the first level 1 in the second set period of time t2 during scanning (Scan), to drive the first transistor T1 and the second crystal Pipe T2 conducting, third set period of time t3 and fourth of first driving signal G1 when be expert at selected, during induction It is the first level 1 in time period t 4, the first set period of time t1 is between third set period of time t3 and the 4th time period t 4.
Specifically, as shown in fig. 7, during the driving stage is divided into scanning (Scan) and during induction (Sense).
During Scan, G2 is low level always, and G1 opens the t2 time to open T1 and T2, reads compensation Data;
During Sense, a certain row is chosen to carry out Sense at random, which carries out in three stages:
First stage (t3): row G1 is high level, and G2 is low level, is opened with controlling T1 and T2, and compensation Data is read;
Second stage (t1): G1 is low level, and G2 high level carries out Sense to control T4 opening;
Phase III (t4): after the completion of Sense, G2 is low level, and G1 high level is opened with controlling T1 and T2, write again Return Data.
Further, in one embodiment of the invention, when Fig. 8 is the shutdown compensation of pixel circuit shown in fig. 5 Sequence figure, as shown in figure 8, the second driving signal G2 is second electrical level 0 in shutdown compensated stage, to drive the 4th transistor T4 to cut Only.In shutdown compensated stage, the first driving signal G1 is the first level 1 when be expert at selected, to drive the first transistor T1 and second transistor T2 conducting.
Specifically, as shown in figure 8, G2 is low level always in shutdown compensated stage, to keep T4 to close always, Number G1 is the first level 1 when be expert at selected, to drive the first transistor T1 and second transistor T2 to be connected, reads compensation Data。
It is understood that as shown in Figure 10, the design of driving circuit required for pixel circuit proposed by the present invention can be by Traditional n G1 driving signal and n G2 driving signal (natural number that n is >=2) are reduced to n G1 driving signal and 1 G2 drive Dynamic signal, the shared arrangement space of pixel circuit is greatly reduced, so that product narrow frame had not only may be implemented, but also can With reduced cost.
In conclusion the pixel circuit proposed according to embodiments of the present invention, by increasing by the 4th transistor, while the is utilized One driving signal controls the first transistor and second transistor, controls the 4th transistor, the 4th crystal using the second driving signal Pipe is opened when need to go selected where during induction and once carries out voltage compensation, and the drive to the 4th transistor is not needed Dynamic signal carries out shifted design line by line, the shared arrangement space of pixel circuit is greatly reduced, to both may be implemented to produce Product narrow frame, and can be with reduced cost, also, one-to-one voltage compensation, separation are carried out to driving transistor using data line The bad influence to during compensation of other sub-pixels, improves compensation accuracy, and it is good to improve product for effective Optimization Compensation function Rate.
The embodiment of the present invention also proposes a kind of display panel, including above-mentioned pixel circuit.
The display panel proposed according to embodiments of the present invention greatly reduces pixel electricity by above-mentioned pixel circuit The shared arrangement space on road so that product narrow frame had not only may be implemented, but also can be with reduced cost, also, utilizes data line One-to-one voltage compensation is carried out to driving transistor, the bad influence to during compensation of other sub-pixels is separated, improves compensation Accuracy, effective Optimization Compensation function, improves product yield.
The embodiment of the present invention also proposes a kind of display equipment, including above-mentioned display panel.
The display equipment proposed according to embodiments of the present invention greatly reduces pixel electricity by above-mentioned display panel The shared arrangement space on road so that product narrow frame had not only may be implemented, but also can be with reduced cost, also, utilizes data line One-to-one voltage compensation is carried out to driving transistor, the bad influence to during compensation of other sub-pixels is separated, improves compensation Accuracy, effective Optimization Compensation function, improves product yield.
In the description of this specification, reference term " one embodiment ", " some embodiments ", " example ", " specifically show The description of example " or " some examples " etc. means specific features, structure, material or spy described in conjunction with this embodiment or example Point is included at least one embodiment or example of the invention.In the present specification, schematic expression of the above terms are not It must be directed to identical embodiment or example.Moreover, particular features, structures, materials, or characteristics described can be in office It can be combined in any suitable manner in one or more embodiment or examples.In addition, without conflicting with each other, the skill of this field Art personnel can tie the feature of different embodiments or examples described in this specification and different embodiments or examples It closes and combines.
In addition, term " first ", " second " are used for descriptive purposes only and cannot be understood as indicating or suggesting relative importance Or implicitly indicate the quantity of indicated technical characteristic.Define " first " as a result, the feature of " second " can be expressed or Implicitly include at least one this feature.In the description of the present invention, the meaning of " plurality " is at least two, such as two, three It is a etc., unless otherwise specifically defined.
Any process described otherwise above or method description are construed as in flow chart or herein, and expression includes It is one or more for realizing custom logic function or process the step of executable instruction code module, segment or portion Point, and the range of the preferred embodiment of the present invention includes other realization, wherein can not press shown or discussed suitable Sequence, including according to related function by it is basic simultaneously in the way of or in the opposite order, Lai Zhihang function, this should be of the invention Embodiment person of ordinary skill in the field understood.
Expression or logic and/or step described otherwise above herein in flow charts, for example, being considered use In the order list for the executable instruction for realizing logic function, may be embodied in any computer-readable medium, for Instruction execution system, device or equipment (such as computer based system, including the system of processor or other can be held from instruction The instruction fetch of row system, device or equipment and the system executed instruction) it uses, or combine these instruction execution systems, device or set It is standby and use.For the purpose of this specification, " computer-readable medium ", which can be, any may include, stores, communicates, propagates or pass Defeated program is for instruction execution system, device or equipment or the dress used in conjunction with these instruction execution systems, device or equipment It sets.The more specific example (non-exhaustive list) of computer-readable medium include the following: there is the electricity of one or more wirings Interconnecting piece (electronic device), portable computer diskette box (magnetic device), random access memory (RAM), read-only memory (ROM), erasable edit read-only storage (EPROM or flash memory), fiber device and portable optic disk is read-only deposits Reservoir (CDROM).In addition, computer-readable medium can even is that the paper that can print described program on it or other are suitable Medium, because can then be edited, be interpreted or when necessary with it for example by carrying out optical scanner to paper or other media His suitable method is handled electronically to obtain described program, is then stored in computer storage.
It should be appreciated that each section of the invention can be realized with hardware, software, firmware or their combination.Above-mentioned In embodiment, software that multiple steps or method can be executed in memory and by suitable instruction execution system with storage Or firmware is realized.Such as, if realized with hardware in another embodiment, following skill well known in the art can be used Any one of art or their combination are realized: have for data-signal is realized the logic gates of logic function from Logic circuit is dissipated, the specific integrated circuit with suitable combinational logic gate circuit, programmable gate array (PGA), scene can compile Journey gate array (FPGA) etc..
Those skilled in the art are understood that realize all or part of step that above-described embodiment method carries It suddenly is that relevant hardware can be instructed to complete by program, the program can store in a kind of computer-readable storage medium In matter, which when being executed, includes the steps that one or a combination set of embodiment of the method.
It, can also be in addition, each functional unit in each embodiment of the present invention can integrate in a processing module It is that each unit physically exists alone, can also be integrated in two or more units in a module.Above-mentioned integrated mould Block both can take the form of hardware realization, can also be realized in the form of software function module.The integrated module is such as Fruit is realized and when sold or used as an independent product in the form of software function module, also can store in a computer In read/write memory medium.
Storage medium mentioned above can be read-only memory, disk or CD etc..Although having been shown and retouching above The embodiment of the present invention is stated, it is to be understood that above-described embodiment is exemplary, and should not be understood as to limit of the invention System, those skilled in the art can be changed above-described embodiment, modify, replace and become within the scope of the invention Type.

Claims (10)

1. a kind of pixel circuit characterized by comprising
First pole of the first transistor, the first transistor is connect with data line, and the control electrode of the first transistor is used for Input the first driving signal;
Luminescence unit, the minus earth of the luminescence unit;
First pole of second transistor, the second transistor is connect with the anode of the luminescence unit, the second transistor The second pole be used for input reference voltage, the control electrode of the second transistor is for inputting first driving signal;
First pole of third transistor, the third transistor is connect with DC power supply, the second pole of the third transistor with The anode of the luminescence unit connects, and the control electrode of the third transistor is connect with the second pole of the first transistor;
First pole of the 4th transistor, the 4th transistor is connect with the data line, the second pole of the 4th transistor It is connect with the anode of the luminescence unit, the control electrode of the 4th transistor is for inputting the second driving signal;
Capacitor, the first end of the capacitor are connect with the control electrode of the third transistor, the second end of the capacitor with it is described Second pole of third transistor connects.
2. pixel circuit according to claim 1, which is characterized in that in the driving stage, second driving signal is in institute It is the first level in the first set period of time during induction, to drive the 4th transistor to lead when being expert at selected It is logical.
3. pixel circuit according to claim 2, which is characterized in that in the driving stage, first driving signal It is first level in the second set period of time during scanning, to drive the first transistor and second crystalline substance The conducting of body pipe, first driving signal when be expert at selected, third set period of time during the induction and It is first level in 4th period, first set period of time is located at the third set period of time and the described 4th Between period.
4. pixel circuit according to claim 1, which is characterized in that in shutdown compensated stage, second driving signal For second electrical level, to drive the 4th transistor cutoff.
5. pixel circuit according to claim 4, which is characterized in that in the shutdown compensated stage, first driving Signal is the first level when be expert at selected, to drive the first transistor and the second transistor to be connected.
6. pixel circuit according to claim 1, which is characterized in that the luminescence unit is Organic Light Emitting Diode or master Dynamic matrix organic LED.
7. pixel circuit according to claim 1, which is characterized in that the first transistor, the second transistor, institute It states third transistor and the 4th transistor is thin film transistor (TFT).
8. pixel circuit according to claim 2 or 5, which is characterized in that the first transistor, second crystal Pipe, the third transistor and the 4th transistor are N-type transistor, and first level is high level.
9. a kind of display panel characterized by comprising such as the described in any item pixel circuits of claim 1-8.
10. a kind of display equipment characterized by comprising shell and display panel as claimed in claim 9.
CN201910754905.0A 2019-08-15 2019-08-15 Pixel circuit, display panel and display equipment Pending CN110444168A (en)

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US16/856,803 US11107410B2 (en) 2019-08-15 2020-04-23 Pixel circuit and method of controlling the same, display panel and display device

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Application publication date: 20191112