CN110428779A - Pixel circuit, display panel and display equipment - Google Patents
Pixel circuit, display panel and display equipment Download PDFInfo
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- CN110428779A CN110428779A CN201910755664.1A CN201910755664A CN110428779A CN 110428779 A CN110428779 A CN 110428779A CN 201910755664 A CN201910755664 A CN 201910755664A CN 110428779 A CN110428779 A CN 110428779A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
Abstract
The invention discloses a kind of pixel circuit, display panel and display equipment, wherein pixel circuit includes: the first transistor, and control electrode is for inputting the first driving signal;Luminescence unit;Second transistor, control electrode is for inputting the first driving signal;Third transistor;The anode of 4th transistor, the first pole and luminescence unit connects, and the second pole is connect with the line of induction, control electrode is for inputting the second driving signal, in the driving stage, the second driving signal drives the 4th transistor turns when be expert at selected in the first set period of time during induction;Capacitor is connected between the control electrode of third transistor and the second pole.4th transistor of the pixel circuit opens primary progress voltage compensation when only only need to need to be expert at selected during induction, it does not need to carry out shifted design line by line to the driving signal of the 4th transistor, greatly reduce the shared arrangement space of pixel circuit, to which product narrow frame not only may be implemented, but also can be with reduced cost.
Description
Technical field
The present invention relates to field of display technology more particularly to a kind of pixel circuit, a kind of display panel, a kind of displays to set
It is standby.
Background technique
AMOLED (Active-matrix organic light-emitting diode, active-matrix organic light emission two
Pole pipe) because of high contrast, visible angle is wide and fast response time is expected to ban liquid crystal as the selection of next generation display mainstream.
Generally in the pixel circuit design of OLED (Organic Light-Emitting Diode, Organic Light Emitting Diode) product,
In view of the limitation of technique, pixel circuit is designed all of N-type TFT (Thin Film Transistor, thin film transistor (TFT)),
In the design of 54.5inch AMOLED panel, 3T1C circuit as shown in Figure 1 is used, wherein T1-T3 is first to third
Transistor, Vdata are data line, and VDD is DC power supply, and Sense is the line of induction, and EL is luminescence unit, and G1 is the first driving letter
Number, G2 is the second driving signal, and Cst is capacitor.But OLED product itself is that need electroluminescent device to carry out luminous, it is required
Glow current needs to be provided by driving TFT (T3).Since driving TFT has differences, need through external compensation and shutdown compensation
It just corrects, therefore the design of AMOLED display pixel is needed in view of compensation timing.
However, in the related technology, as shown in Figure 1, driving signal G1 and G2 are required to sweep line by line during scanning (Scan)
It retouches, causes pixel circuit occupied area excessive (needing double driving signal) in this way, be unfavorable for realizing the narrow frame design of product,
And higher cost.
Summary of the invention
The present invention be inventor based on to following problems cognition and research make:
In the related technology, the 3T1C circuit that pixel circuit generally uses, as shown in Figure 1, since driving TFT has differences,
It needs just to correct by external compensation and shutdown compensation, therefore the design of AMOLED display pixel is needed in view of compensation timing,
Fig. 2 is the compensation timing diagram of pixel circuit shown in FIG. 1, and Fig. 3 is that the shutdown of pixel circuit shown in FIG. 1 compensates timing diagram.
By Fig. 2 and Fig. 3 it is found that G1, G2 are required to progressively scan during scanning (Scan), lead to pixel circuit institute in this way
It accounts for that area is excessive (needing double driving signal), is unfavorable for realizing the narrow frame design of product, and higher cost.
The present invention is directed to solve at least some of the technical problems in related technologies.
For this purpose, the first purpose of this invention is to propose a kind of pixel circuit, the pixel circuit is brilliant by increasing the 4th
Body pipe, while using the first driving signal control the first transistor and second transistor, the 4th transistor only need to be during induction
Primary progress voltage compensation is opened when being expert at selected, does not need to move the driving signal of the 4th transistor line by line
Position design, greatly reduces the shared arrangement space of pixel circuit, so that product narrow frame not only may be implemented, but also can be with
Reduced cost.
Second object of the present invention is to propose a kind of display panel.
Third object of the present invention is to propose a kind of display equipment.
In order to achieve the above object, first aspect present invention embodiment proposes a kind of pixel circuit, comprising: the first transistor,
First pole of the first transistor is connect with data line, and the control electrode of the first transistor is for inputting the first driving letter
Number;Luminescence unit, the minus earth of the luminescence unit;Second transistor, the first pole of the second transistor and the hair
The anode of light unit connects, and the second pole of the second transistor is connect with the line of induction, and the control electrode of the second transistor is used
In input first driving signal;First pole of third transistor, the third transistor is connect with DC power supply, and described
Second pole of three transistors is connect with the anode of the luminescence unit, the control electrode of the third transistor and the first crystal
Second pole of pipe connects;First pole of the 4th transistor, the 4th transistor is connect with the anode of the luminescence unit, described
Second pole of the 4th transistor is connect with the line of induction, and the control electrode of the 4th transistor is for inputting the second driving signal, In
Driving stage, second driving signal are the in the first set period of time during induction when be expert at selected
One level, to drive the 4th transistor turns;Capacitor, the control electrode of the first end of the capacitor and the third transistor
Connection, the second end of the capacitor are connect with the second pole of the third transistor.
The pixel circuit proposed according to embodiments of the present invention by increasing by the 4th transistor, while utilizing the first driving letter
Number control the first transistor and second transistor controls the 4th transistor using the second driving signal, and the 4th transistor only need to be
Row where during induction opened when selected it is primary carry out voltage compensation, do not need to the driving signal of the 4th transistor into
Capable shifted design line by line, greatly reduces the shared arrangement space of pixel circuit, so that product narrow frame both may be implemented
Change, and can be with reduced cost.
In addition, pixel circuit according to the above embodiment of the present invention can also have the following additional technical features:
According to one embodiment of present invention, in the driving stage, first driving signal is during scanning
It is first level in second set period of time, it is described to drive the first transistor and the second transistor to be connected
First driving signal third set period of time during the induction and in the 4th period is when be expert at selected
First level, first set period of time is between the third set period of time and the 4th period.
According to one embodiment of present invention, in shutdown compensated stage, second driving signal is second electrical level, to drive
Move the 4th transistor cutoff.
According to one embodiment of present invention, in the shutdown compensated stage, first driving signal be expert at by
It is first level when choosing, to drive the first transistor and the second transistor to be connected.
According to one embodiment of present invention, the luminescence unit is Organic Light Emitting Diode.
According to one embodiment of present invention, the luminescence unit is active matrix organic LED.
According to one embodiment of present invention, the first transistor, the second transistor, the third transistor and
4th transistor is thin film transistor (TFT).
According to one embodiment of present invention, the first transistor, the second transistor, the third transistor and
4th transistor is N-type transistor, and first level is high level.
In order to achieve the above object, second aspect of the present invention embodiment proposes a kind of display panel, including first party of the present invention
Pixel circuit described in the embodiment of face.
The display panel proposed according to embodiments of the present invention greatly reduces pixel electricity by above-mentioned pixel circuit
The shared arrangement space on road, so that product narrow frame had not only may be implemented, but also can be with reduced cost.
In order to achieve the above object, third aspect present invention embodiment proposes a kind of display equipment, including second party of the present invention
Display panel described in the embodiment of face.
The display equipment proposed according to embodiments of the present invention greatly reduces pixel electricity by above-mentioned display panel
The shared arrangement space on road, so that product narrow frame had not only may be implemented, but also can be with reduced cost.
The additional aspect of the present invention and advantage will be set forth in part in the description, and will partially become from the following description
Obviously, or practice through the invention is recognized.
Detailed description of the invention
Above-mentioned and/or additional aspect and advantage of the invention will become from the following description of the accompanying drawings of embodiments
Obviously and it is readily appreciated that, in which:
Fig. 1 is the structural schematic diagram of pixel circuit in the related technology.
Fig. 2 is the timing diagram of pixel circuit shown in FIG. 1.
Fig. 3 is the shutdown compensation timing diagram of pixel circuit shown in FIG. 1.
Fig. 4 is the structure chart of pixel circuit according to an embodiment of the invention.
Fig. 5 is the timing diagram of pixel circuit shown in Fig. 4.
Fig. 6 is the shutdown compensation timing diagram of pixel circuit shown in Fig. 4.
Fig. 7 is the schematic diagram of the driving signal of pixel circuit shown in Fig. 4.
Specific embodiment
The embodiment of the present invention is described below in detail, examples of the embodiments are shown in the accompanying drawings, wherein from beginning to end
Same or similar label indicates same or similar element or element with the same or similar functions.Below with reference to attached
The embodiment of figure description is exemplary, it is intended to is used to explain the present invention, and is not considered as limiting the invention.
Below with reference to the accompanying drawings the pixel circuit, display panel and display equipment of the embodiment of the present invention are described.
Fig. 4 is the structure chart of pixel circuit according to an embodiment of the invention.As shown in figure 4, the circuit includes: first
Transistor T1, luminescence unit EL, second transistor T2, third transistor T3, the 4th transistor T4 and capacitor Cst.
Wherein, the first pole of the first transistor T1 is connect with data line Vdata, and the control electrode of the first transistor T1 is for defeated
Enter the first driving signal G1;The minus earth of luminescence unit EL;The first pole of second transistor T2 and the anode of luminescence unit EL
Connection, the second pole of second transistor T2 are connect with line of induction Sense, and the control electrode of second transistor T2 is driven for inputting first
Dynamic signal G1;The first pole of third transistor T3 is connect with DC power supply VDD, the second pole of third transistor T3 and luminescence unit
The anode of EL connects, and the control electrode of third transistor T3 is connect with the second pole of the first transistor T1;The of 4th transistor T4
One pole is connect with the anode of luminescence unit EL, and the second pole of the 4th transistor T4 is connect with line of induction Sense, the 4th transistor T4
Control electrode for inputting the second driving signal G2, in the driving stage, the second driving signal G2 feeling when be expert at selected
It is the first level 1 in the first set period of time t1 during answering, to drive the 4th transistor turns;The first end of capacitor Cst
It is connect with the control electrode of third transistor T3, the second end of capacitor Cst is connect with the second pole of third transistor T3.
It should be noted that in an embodiment of the present invention, the first transistor T1, second transistor T2, third transistor T3
With the 4th transistor T4 can be thin film transistor (TFT) (TFT), the first transistor T1, second transistor T2, third transistor T3 and
4th transistor T4 can be N-type transistor, and the first level 1 is high level.Luminescence unit EL can be Organic Light Emitting Diode
(OLED), or active-matrix Organic Light Emitting Diode (AMOLED).
Specifically, as shown in figure 4, the application separates G2 timing, T1 and T2 is controlled using G1, is controlled using G2
T4, timing diagram can refer to shown in Fig. 5.As shown in figure 5, during the driving stage can be divided into scanning (Scan) and incuding
(Sense) during, during induction, a certain row is chosen to carry out Sense (Fig. 5, which facilitates, understands that Sense is drawn in order), G2 at random
Driving signal only needs a CLK, to control T4 opening, incudes to the voltage of node S, specifically can use sampling electricity
Resistance, sampling capacitance and analog-digital converter carry out voltage induced, to carry out voltage compensation, do not need the letter of the driving to the 4th transistor
Number shifted design line by line is carried out, the shared arrangement space of pixel circuit is greatly reduced, so that it is narrow that product both may be implemented
Frame, and can be with reduced cost.
Further, according to one embodiment of present invention, as shown in figure 5, in the driving stage, the first driving signal G1 exists
It is the first level 1 in the second set period of time t2 during scanning (Scan), to drive the first transistor T1 and the second crystal
Pipe T2 conducting, third set period of time t3 and fourth of first driving signal G1 when be expert at selected, during induction
It is the first level 1 in time period t 4, the first set period of time t1 is between third set period of time t3 and the 4th time period t 4.
Specifically, as shown in figure 5, during the driving stage is divided into scanning (Scan) and during induction (Sense).
During Scan, G2 is low level always, and G1 opens the t2 time to open T1 and T2, reads compensation Data;
During Sense, a certain row is chosen to carry out Sense at random, which carries out in three stages:
First stage (t3): row G1 is high level, and G2 is low level, is opened with controlling T1 and T2, and compensation Data is read;
Second stage (t1): G1 is low level, and G2 high level carries out Sense to control T4 opening;
Phase III (t4): after the completion of Sense, G2 is low level, and G1 high level is opened with controlling T1 and T2, write again
Return Data.
Further, in one embodiment of the invention, when Fig. 6 is the shutdown compensation of pixel circuit shown in Fig. 4
Sequence figure, as shown in fig. 6, the second driving signal G2 is second electrical level 0 in shutdown compensated stage, to drive the 4th transistor T4 to cut
Only.In shutdown compensated stage, the first driving signal G1 is the first level 1 when be expert at selected, to drive the first transistor
T1 and second transistor T2 conducting.
Specifically, as shown in fig. 6, G2 is low level always in shutdown compensated stage, to keep T4 to close always,
Number G1 is the first level 1 when be expert at selected, to drive the first transistor T1 and second transistor T2 to be connected, reads compensation
Data。
It is understood that the design of driving circuit required for pixel circuit proposed by the present invention can be driven by traditional n G1
Dynamic signal and n G2 driving signal (natural number that n is >=2) are reduced to n G1 driving signal and 1 G2 driving signal, such as Fig. 7
It is shown, the shared arrangement space of pixel circuit is greatly reduced, so that product narrow frame not only may be implemented, but also can be contracted
Subtract cost.
In conclusion pixel circuit according to an embodiment of the present invention, drives by increasing by the 4th transistor, while using first
Dynamic signal control the first transistor and second transistor control the 4th transistor using the second driving signal, and the 4th transistor is only
It is opened when need to go selected where during induction and once carries out voltage compensation, do not needed the driving to the 4th transistor and believe
Number shifted design line by line is carried out, the shared arrangement space of pixel circuit is greatly reduced, so that it is narrow that product both may be implemented
Frame, and can be with reduced cost.
The embodiment of the present invention also proposes a kind of display panel, including above-mentioned pixel circuit.
The display panel proposed according to embodiments of the present invention greatly reduces pixel electricity by above-mentioned pixel circuit
The shared arrangement space on road, so that product narrow frame had not only may be implemented, but also can be with reduced cost.
The embodiment of the present invention also proposes a kind of display equipment, including above-mentioned display panel.
The display equipment proposed according to embodiments of the present invention greatly reduces pixel electricity by above-mentioned display panel
The shared arrangement space on road, so that product narrow frame had not only may be implemented, but also can be with reduced cost.
In the description of this specification, reference term " one embodiment ", " some embodiments ", " example ", " specifically show
The description of example " or " some examples " etc. means specific features, structure, material or spy described in conjunction with this embodiment or example
Point is included at least one embodiment or example of the invention.In the present specification, schematic expression of the above terms are not
It must be directed to identical embodiment or example.Moreover, particular features, structures, materials, or characteristics described can be in office
It can be combined in any suitable manner in one or more embodiment or examples.In addition, without conflicting with each other, the skill of this field
Art personnel can tie the feature of different embodiments or examples described in this specification and different embodiments or examples
It closes and combines.
In addition, term " first ", " second " are used for descriptive purposes only and cannot be understood as indicating or suggesting relative importance
Or implicitly indicate the quantity of indicated technical characteristic.Define " first " as a result, the feature of " second " can be expressed or
Implicitly include at least one this feature.In the description of the present invention, the meaning of " plurality " is at least two, such as two, three
It is a etc., unless otherwise specifically defined.
Any process described otherwise above or method description are construed as in flow chart or herein, and expression includes
It is one or more for realizing custom logic function or process the step of executable instruction code module, segment or portion
Point, and the range of the preferred embodiment of the present invention includes other realization, wherein can not press shown or discussed suitable
Sequence, including according to related function by it is basic simultaneously in the way of or in the opposite order, Lai Zhihang function, this should be of the invention
Embodiment person of ordinary skill in the field understood.
Expression or logic and/or step described otherwise above herein in flow charts, for example, being considered use
In the order list for the executable instruction for realizing logic function, may be embodied in any computer-readable medium, for
Instruction execution system, device or equipment (such as computer based system, including the system of processor or other can be held from instruction
The instruction fetch of row system, device or equipment and the system executed instruction) it uses, or combine these instruction execution systems, device or set
It is standby and use.For the purpose of this specification, " computer-readable medium ", which can be, any may include, stores, communicates, propagates or pass
Defeated program is for instruction execution system, device or equipment or the dress used in conjunction with these instruction execution systems, device or equipment
It sets.The more specific example (non-exhaustive list) of computer-readable medium include the following: there is the electricity of one or more wirings
Interconnecting piece (electronic device), portable computer diskette box (magnetic device), random access memory (RAM), read-only memory
(ROM), erasable edit read-only storage (EPROM or flash memory), fiber device and portable optic disk is read-only deposits
Reservoir (CDROM).In addition, computer-readable medium can even is that the paper that can print described program on it or other are suitable
Medium, because can then be edited, be interpreted or when necessary with it for example by carrying out optical scanner to paper or other media
His suitable method is handled electronically to obtain described program, is then stored in computer storage.
It should be appreciated that each section of the invention can be realized with hardware, software, firmware or their combination.Above-mentioned
In embodiment, software that multiple steps or method can be executed in memory and by suitable instruction execution system with storage
Or firmware is realized.Such as, if realized with hardware in another embodiment, following skill well known in the art can be used
Any one of art or their combination are realized: have for data-signal is realized the logic gates of logic function from
Logic circuit is dissipated, the specific integrated circuit with suitable combinational logic gate circuit, programmable gate array (PGA), scene can compile
Journey gate array (FPGA) etc..
Those skilled in the art are understood that realize all or part of step that above-described embodiment method carries
It suddenly is that relevant hardware can be instructed to complete by program, the program can store in a kind of computer-readable storage medium
In matter, which when being executed, includes the steps that one or a combination set of embodiment of the method.
It, can also be in addition, each functional unit in each embodiment of the present invention can integrate in a processing module
It is that each unit physically exists alone, can also be integrated in two or more units in a module.Above-mentioned integrated mould
Block both can take the form of hardware realization, can also be realized in the form of software function module.The integrated module is such as
Fruit is realized and when sold or used as an independent product in the form of software function module, also can store in a computer
In read/write memory medium.
Storage medium mentioned above can be read-only memory, disk or CD etc..Although having been shown and retouching above
The embodiment of the present invention is stated, it is to be understood that above-described embodiment is exemplary, and should not be understood as to limit of the invention
System, those skilled in the art can be changed above-described embodiment, modify, replace and become within the scope of the invention
Type.
Claims (10)
1. a kind of pixel circuit characterized by comprising
First pole of the first transistor, the first transistor is connect with data line, and the control electrode of the first transistor is used for
Input the first driving signal;
Luminescence unit, the minus earth of the luminescence unit;
First pole of second transistor, the second transistor is connect with the anode of the luminescence unit, the second transistor
The second pole connect with the line of induction, the control electrode of the second transistor is for inputting first driving signal;
First pole of third transistor, the third transistor is connect with DC power supply, the second pole of the third transistor with
The anode of the luminescence unit connects, and the control electrode of the third transistor is connect with the second pole of the first transistor;
First pole of the 4th transistor, the 4th transistor is connect with the anode of the luminescence unit, the 4th transistor
The second pole connect with the line of induction, the control electrode of the 4th transistor is for inputting the second driving signal, in the driving stage, institute
The second driving signal is stated when be expert at selected, is the first level in the first set period of time during induction, to drive
Move the 4th transistor turns;
Capacitor, the first end of the capacitor are connect with the control electrode of the third transistor, the second end of the capacitor with it is described
Second pole of third transistor connects.
2. pixel circuit according to claim 1, which is characterized in that in the driving stage, first driving signal
It is first level in the second set period of time during scanning, to drive the first transistor and second crystalline substance
The conducting of body pipe, first driving signal when be expert at selected, third set period of time during the induction and
It is first level in 4th period, first set period of time is located at the third set period of time and the described 4th
Between period.
3. pixel circuit according to claim 1, which is characterized in that in shutdown compensated stage, second driving signal
For second electrical level, to drive the 4th transistor cutoff.
4. pixel circuit according to claim 3, which is characterized in that in the shutdown compensated stage, first driving
Signal is first level when be expert at selected, to drive the first transistor and the second transistor to be connected.
5. pixel circuit according to claim 1, which is characterized in that the luminescence unit is Organic Light Emitting Diode.
6. pixel circuit according to claim 1, which is characterized in that the luminescence unit is active matrix/organic light emitting two
Pole pipe.
7. pixel circuit according to claim 1, which is characterized in that the first transistor, the second transistor, institute
It states third transistor and the 4th transistor is thin film transistor (TFT).
8. pixel circuit according to claim 1, which is characterized in that the first transistor, the second transistor, institute
It states third transistor and the 4th transistor is N-type transistor, first level is high level.
9. a kind of display panel characterized by comprising such as the described in any item pixel circuits of claim 1-8.
10. a kind of display equipment characterized by comprising shell and display panel as claimed in claim 9.
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US16/856,803 US11107410B2 (en) | 2019-08-15 | 2020-04-23 | Pixel circuit and method of controlling the same, display panel and display device |
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CN111063302A (en) * | 2019-12-17 | 2020-04-24 | 深圳市华星光电半导体显示技术有限公司 | Pixel hybrid compensation circuit and pixel hybrid compensation method |
CN111261101A (en) * | 2020-02-28 | 2020-06-09 | 合肥京东方卓印科技有限公司 | Pixel circuit, driving method thereof and display panel |
CN111261112A (en) * | 2020-03-20 | 2020-06-09 | 合肥京东方卓印科技有限公司 | Pixel driving circuit, display panel, display device and pixel driving method |
CN112967679A (en) * | 2021-03-18 | 2021-06-15 | 合肥京东方卓印科技有限公司 | Display compensation device and method and display device |
WO2021138965A1 (en) * | 2020-01-07 | 2021-07-15 | 深圳市华星光电半导体显示技术有限公司 | Pixel circuit, display panel, and compensation method for reference voltage of pixel circuit |
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