CN110391183A - The processing method of chip - Google Patents
The processing method of chip Download PDFInfo
- Publication number
- CN110391183A CN110391183A CN201910293069.0A CN201910293069A CN110391183A CN 110391183 A CN110391183 A CN 110391183A CN 201910293069 A CN201910293069 A CN 201910293069A CN 110391183 A CN110391183 A CN 110391183A
- Authority
- CN
- China
- Prior art keywords
- chip
- semiconductor substrate
- layer
- daf
- segmentation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000003672 processing method Methods 0.000 title claims abstract description 14
- 238000000034 method Methods 0.000 claims abstract description 50
- 230000011218 segmentation Effects 0.000 claims abstract description 50
- 239000000758 substrate Substances 0.000 claims abstract description 43
- 239000004065 semiconductor Substances 0.000 claims abstract description 42
- 238000009825 accumulation Methods 0.000 claims abstract description 39
- 230000004048 modification Effects 0.000 claims abstract description 37
- 238000012986 modification Methods 0.000 claims abstract description 37
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 30
- 208000037656 Respiratory Sounds Diseases 0.000 claims abstract description 16
- 230000035699 permeability Effects 0.000 claims abstract description 6
- 239000011230 binding agent Substances 0.000 claims description 14
- 239000002184 metal Substances 0.000 claims description 12
- 210000003205 muscle Anatomy 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 79
- 230000007423 decrease Effects 0.000 description 4
- 229910001651 emery Inorganic materials 0.000 description 4
- 238000010521 absorption reaction Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000003754 machining Methods 0.000 description 3
- 230000005855 radiation Effects 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- ZZUFCTLCJUWOSV-UHFFFAOYSA-N furosemide Chemical compound C1=C(Cl)C(S(=O)(=O)N)=CC(C(O)=O)=C1NCC1=CC=CO1 ZZUFCTLCJUWOSV-UHFFFAOYSA-N 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000012790 adhesive layer Substances 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000009738 saturating Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/36—Removing material
- B23K26/38—Removing material by boring or cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Optics & Photonics (AREA)
- Plasma & Fusion (AREA)
- Mechanical Engineering (AREA)
- Dicing (AREA)
- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
- Laser Beam Processing (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
The processing method of chip is provided, appropriate Ground Split can be carried out to the chip for being formed with multiple flash chips.The processing method of chip includes at least following process: cutting slot formation process, is cut using cutting tool (28) segmentation preset lines (14) and forms cutting slot (30) in the second accumulation layer (10)；Modify layer formation process, the focal point of the laser beam (LB) of the wavelength for semiconductor substrate (4) with permeability is positioned at the inside of semiconductor substrate (4) corresponding with segmentation preset lines (14) and laser beam (LB) is irradiated to semiconductor substrate (4), to form modification layer (42)；Segmentation process is ground the back side of semiconductor substrate (4), makes crackle (60) that chip (2) are divided into each flash chip (12) from modification layer (42) growth；And DAF segmentation process, DAF (62) are arranged on the back side (2b) for the chip (2) for being divided into each flash chip (12), the supporting strip (66) of bearing DAF (62) is extended and DAF (62) is split according to each flash chip (12).
Description
Technical field
The present invention relates to the processing methods of chip, and the chip that multiple flash chips are marked off by dividing preset lines is divided
At each flash chip, which is to link up the first accumulation layer and the second accumulation layer and constitute, this first is deposited
Reservoir is that metal film and insulating film are alternately laminated multilayer on the front of semiconductor substrate and formed, second accumulation layer
Be using insulating layer as binder course on the upper surface of first accumulation layer metal film and insulating film are alternately laminated multilayer and
It is formed.
Background technique
The devices such as IC, LSI, flash memory are to be layered on the front of the semiconductor substrates such as silicon and carried out by segmentation preset lines
It divides and is generated in a manner of chip.Then, it is divided the wafer by processing unit (plant)s such as laser processing device, cutter devices
Each device, each device divided are used for the electronic equipments such as mobile phone, personal computer.
In addition, it is also proposed that following technology: by the laser beam of the wavelength for semiconductor substrate with permeability
Focal point is positioned at the inside of semiconductor substrate and irradiates laser beam to semiconductor substrate, along segmentation preset lines in semiconductor
The inside of substrate forms modification layer, is then ground and thinning to the back side of semiconductor substrate, while making crackle from modification layer
It rises and starts to grow, to divide the wafer into each device (for example, referring to patent document 1).
Patent document 1: Japanese Unexamined Patent Publication 2014-7330 bulletin
Above-mentioned technology has the advantage that by the way that DAF (quilt is arranged on the back side of chip for being divided into each device
The referred to as adhesive sheet of bonding die film) and be extended, DAF can be divided into size corresponding with device.
But in the feelings that the chip for marking off multiple flash chips by dividing preset lines is divided into each flash chip
When using above-mentioned technology under condition, have the following problems: the crackle grown from modification layer occurs to bend and reach at binder course
Second accumulation layer, so that chip, can not be suitably divided into each flash chip, wherein the flash memory by the second accumulation layer of damage
Chip is to link up the first accumulation layer and the second accumulation layer and constitute, first accumulation layer be semiconductor substrate just
Metal film and insulating film are alternately laminated multilayer on face and formed, which is the upper table in first accumulation layer
Metal film and insulating film are alternately laminated as binder course by multilayer using insulating layer on face and formed.
Summary of the invention
In view of the above fact and complete the issue of the present invention is to provide the processing methods of chip, can be more to being formed with
The chip of a flash chip carries out appropriate Ground Split.
In order to solve the above problems, the present invention is to provide the processing methods of chip below.That is, a kind of processing of chip
The chip that multiple flash chips are marked off by dividing preset lines is divided into each flash chip by method, which is
First accumulation layer and the second accumulation layer are linked up and constituted, which is will on the front of semiconductor substrate
Metal film and insulating film are alternately laminated multilayer and are formed, second accumulation layer be on the upper surface of first accumulation layer with
Metal film and insulating film are alternately laminated multilayer and are formed by insulating layer for binder course, wherein the processing method of the chip
Including at least following process: cutting slot formation process, using cutting tool to segmentation preset lines cut and this second
Accumulation layer forms cutting slot；Layer formation process is modified, by the laser beam of the wavelength for semiconductor substrate with permeability
Focal point is positioned at the inside of semiconductor substrate corresponding with segmentation preset lines and irradiates laser beam to semiconductor substrate, thus
Form modification layer；Segmentation process is ground the back side of semiconductor substrate and makes crackle from modification layer growth, thus by chip
It is divided into each flash chip；And DAF segmentation process, it is arranged on the back side of chip for being divided into each flash chip
DAF is extended the supporting strip of bearing DAF and is split according to each flash chip to DAF.
It is preferred that cutting slot reaches the binder course in the cutting slot formation process.
The processing method of chip provided by the present invention includes at least following process: cutting slot formation process, using cutting
Cutting knife tool cuts segmentation preset lines and forms cutting slot in the second accumulation layer；Layer formation process is modified, it will be for partly leading
There is structure base board the focal point of the laser beam of the wavelength of permeability to be positioned at semiconductor substrate corresponding with segmentation preset lines
It is internal and laser beam is irradiated to semiconductor substrate, to form modification layer；Segmentation process carries out the back side of semiconductor substrate
Grinding makes crackle divide the wafer into each flash chip from the growth of modification layer；And DAF segmentation process, it is being divided into
DAF is arranged on the back side of the chip of each flash chip, to bearing DAF supporting strip be extended and according to each flash chip
DAF is split, therefore bending will not occur from the crackle that modification layer is grown but be directed to cutting slot, it can be by chip
It is suitably divided into each flash chip.
Detailed description of the invention
(a) of Fig. 1 is the perspective view for showing the state for the chuck table that chip is placed in cutter device, (b) of Fig. 1
It is the cross-sectional view of chip.
Fig. 2 is the perspective view for showing the state for implementing cutting slot formation process.
Fig. 3 is the cross-sectional view for being formed with the chip of cutting slot.
Fig. 4 is to show the chucking work that protection band is arranged on the front side of the wafer and chip is placed in laser processing device
The perspective view of the state of platform.
Fig. 5 is the perspective view for showing the state for implementing modification layer formation process.
Fig. 6 is the cross-sectional view for the chip for being formed with cutting slot and modifying layer.
Fig. 7 is the perspective view for showing the state for implementing segmentation process.
(a) of Fig. 8 is the perspective view for being divided into the chip of each flash chip, and (b) of Fig. 8 is to be divided into each sudden strain of a muscle
Deposit the cross-sectional view of the chip of chip.
Fig. 9 is the perspective view for showing the state that DAF is arranged on the back side of chip for being divided into each flash chip.
Figure 10 is the solid for showing the state for removing protection band from the front for the chip for being divided into each flash chip
Figure.
Figure 11 is the perspective view shown according to each flash chip to the DAF state divided.
Label declaration
2: chip；4: semiconductor substrate；6: the first accumulation layers；8: binder course；10: the second accumulation layers；12: flash chip；
30: cutting slot；42: modification layer；60: crackle；62:DAF.
Specific embodiment
Hereinafter, being illustrated referring to embodiment of the attached drawing to the processing method of chip of the invention.
It is shown in FIG. 1 and is capable of the chip 2 that the processing method of chip through the invention is processed.Discoid chip
2 have multiple flash chips 12, which is to link up the first accumulation layer 6 and the second accumulation layer 10 and constitute
, which is that metal film and insulating film are alternately laminated multilayer on the front of semiconductor substrate 4 and formed
, which is on the upper surface of the first accumulation layer 6 using insulating layer as binder course 8 and by metal film and insulating film
It is alternately laminated multilayer and is formed.Multiple flash chip 12 is divided by the segmentation preset lines 14 of clathrate.
As the semiconductor substrate 4 of chip 2, the silicon substrate with a thickness of 400 μm or so can be used for example.It is deposited as first
Reservoir 6 and the second accumulation layer 10, can be metal film and insulating film alternately amount to stacking 48 layers and formed with a thickness of 10 μm
The accumulation layer or metal film and insulating film of left and right alternately amount to 32 layers of stacking and what is formed deposits with a thickness of 8 μm or so
Reservoir.In addition, the nitride film or SiO with a thickness of 1 μm or so can be used as binder course 82Film etc..
In the illustrated embodiment, implement cutting slot formation process first, using cutting tool to segmentation preset lines 14
It is cut and forms cutting slot in the second accumulation layer 10.Cutting slot formation process can be used for example in Fig. 1 and Fig. 2 shows one
Partial cutter device 16 is implemented.Cutter device 16 includes chuck table 18, carries out attracting holding to chip 2；And
Cutting unit 20 (referring to Fig. 2), cuts the chip 2 of 18 attracting holdings of chuck table.
As shown in Figure 1, porous configured with being connect with attraction unit (not shown) in the upper part of chuck table 18
The circular absorption chuck 22 of matter is generated on the upper surface of absorption chuck 22 on chuck table 18 using attraction unit
Attraction, to carry out attracting holding to the chip 2 for being placed in upper surface.In addition, chuck table 18 passes through chuck table
It is pivoted about with motor (not shown) with the axis vertically extended, and (not by X-axis feed unit
Diagram) it retreats in X-direction shown in arrow X in Fig. 1.
As shown in Fig. 2, cutting unit 20 includes: main shaft housing 24, in the Y direction vertical with X-direction (in Fig. 2
Direction shown by arrow Y) on extend；Main shaft 26 is rotatably freely supported on main shaft housing 24 by axle center of Y direction；It is main
Axis rotates main shaft 26 with motor (not shown)；And cricoid cutting tool 28, it is installed on the front end of main shaft 26.
Main shaft housing 24 is retreated in the Y-axis direction by Y-axis feed unit (not shown), and by lifting unit (not shown) upper
Lower section is gone up and down upwards.In addition, being horizontal on the flat surface as defined by X-direction and Y direction.
As shown in (a) of Fig. 1, in cutting slot formation process, the positive 2a of chip 2 is made to utilize chuck work upward first
The upper surface for making platform 18 carries out attracting holding to chip 2.Then, using the shooting unit (not shown) of cutter device 16 from top
Chip 2 is shot, the image of chip 2 according to captured by shooting unit, keeps segmentation preset lines 14 consistent with X-direction,
And cutting tool 28 is positioned at the top with the consistent segmentation preset lines 14 of X-direction.Then, scheming cutting tool 28
It is rotated on direction shown in arrow A in 2.Then, implement machining, decline main shaft housing 24, make the sword of cutting tool 28
Point be cut into the consistent segmentation preset lines 14 of X-direction, and make chuck table 18 relative to cutting unit 20 according to rule
Fixed feed speed relatively carries out processing feeding in the X-axis direction, thus along segmentation preset lines 14 in the second accumulation layer 10
Form cutting slot 30.The width of the cutting slot 30 is, for example, 20 μm or so.In addition, the depth of cutting slot 30 is at least deposited with second
The identical depth of the thickness of reservoir 10 (such as 8 μm or so or 10 μm or so), preferably (such as 9 μm of the depth of arrival binder course 8
Left and right or 11 μm or so).Or as shown in figure 3, cutting slot 30 can cross binder course 8 and reach the first accumulation layer 6.
Then, main shaft housing 24 is made to be spaced in Y according to the Y direction for dividing preset lines 14 relative to chuck table 18
Index feed is relatively carried out in axis direction.Then, machining and index feed is alternately repeated, thus along with X
The consistent all segmentation preset lines 14 of axis direction form cutting slot 30.In addition, being handed over after being rotated by 90 ° chuck table 18
Machining and index feed is alternately repeated, thus along vertical with the segmentation preset lines 14 of cutting slot 30 have been initially formed
All segmentation preset lines 14 form cutting slot 30.Implement cutting slot formation process in this way, it is predetermined along the segmentation of clathrate
The clathrate formation cutting slot 30 of line 14.
After implementing cutting slot formation process, implement modification layer formation process, will have for semiconductor substrate 4 saturating
The focal point of the laser beam of the wavelength for the property crossed be positioned at the inside of the corresponding semiconductor substrate 4 of segmentation preset lines 14 and it is right
Semiconductor substrate 4 irradiates laser beam, to form modification layer.Modification layer formation process can be used for example in figures 4 and 5
The laser processing device 32 of a part is shown to implement.Laser processing device 32 includes chuck table 34, to chip 2 into
Row attracting holding；And condenser 36 (referring to Fig. 5), 2 radiation pulses of chip of 34 attracting holdings of chuck table are swashed
Light light LB.As shown in figure 4, porous configured with being connect with attraction unit (not shown) in the upper part of chuck table 34
The circular absorption chuck 38 of matter.In addition, chuck table 34 is configured to rotate freely, and it is configured in X-direction and Y-axis
It is free to advance or retreat on direction.
Continue to illustrate referring to Fig. 4, in modification layer formation process, first in the clathrate cutting slot 30 of foring
It is pasted on the positive 2a of chip 2 and the circular protection band 40 protected to flash chip 12 is arranged.Then, make chip 2
Back side 2b carries out attracting holding to chip 2 using the upper surface of chuck table 34 upward.Then, laser processing device is utilized
32 shooting unit (not shown) shoots chip 2 from top, and the image of chip 2, makes according to captured by shooting unit
Divide preset lines 14 it is consistent with X-direction, and by condenser 36 be positioned at X-direction it is consistent divide preset lines 14 it is upper
Side.At this point, the back side 2b of chip 2 is upward, it is formed with the positive 2a of segmentation preset lines 14 downward, but the bat of laser processing device 32
Take the photograph unit include to chip 2 irradiate the infrared radiation unit of infrared ray, the infrared ray that infrared radiation unit is irradiated into
The capturing element of optical system and output electric signal corresponding with the infrared ray that optical system is captured that row captures is (infrared
Line CCD), the segmentation preset lines 14 of positive 2a are shot thus, it is possible to be penetrated from the back side 2b of chip 2.
Then, go up and down condenser 36 using the focal point position adjustment unit (not shown) of laser processing device 32, it will
The focal point of pulse laser light LB is positioned at the inside of semiconductor substrate 4 corresponding with segmentation preset lines 14.Then, implement
It modifies layer and forms processing, as shown in figure 5, chuck table 34 is made to exist relative to condenser 36 according to the feed speed of regulation on one side
Processing feeding is relatively carried out in X-direction, irradiates the wavelength that there is permeability for semiconductor substrate 4 from condenser 36 on one side
Pulse laser light LB, thus along segmentation preset lines 14 semiconductor substrate 4 inside formed modification layer 42.In addition, changing
Matter layer 42 is formed in the inside of semiconductor substrate 4, does not expose overleaf actually, but its image is indicated with dotted line.Modify layer
42 compared with surrounding intensity it is smaller, and as shown in fig. 6, along semiconductor substrate 4 thickness direction extend.Then, make chuck work
Make platform 34 and is relatively indexed in the Y-axis direction relative to condenser 36 according to the interval of the Y direction of segmentation preset lines 14
Feeding.Then, modification layer is alternately repeated and forms processing and index feed, thus along consistent all with X-direction
Divide preset lines 14, forms modification layer 42 in the inside of semiconductor substrate 4.In addition, making chuck table 34 be rotated by 90 ° it
Afterwards, be alternately repeated modification layer formed processing and index feed, thus along be initially formed modification layer 42 segmentation it is pre-
The vertical all segmentation preset lines 14 of alignment 14 form modification layer 42 in the inside of semiconductor substrate 4.Implement modification in this way
Layer formation process, along the segmentation preset lines 14 of clathrate, in the inside of semiconductor substrate 4, clathrate formation modifies layer 42.This
The modification layer formation process of sample can for example be implemented according to processing conditions below.
After implementing modification layer formation process, implement segmentation process, to the back side (back of chip 2 of semiconductor substrate 4
Face 2b) it is ground, make crackle that chip 2 are divided into each flash chip 12 from the growth of modification layer 42.Segmentation process is for example
It can be used and a part of grinding attachment 44 is shown in FIG. 7 to implement.Grinding attachment 44 includes chuck table 46, right
Chip 2 carries out attracting holding；And grinding unit 48, the chip 2 of 46 attracting holdings of chuck table is ground.
Chuck table 46 is configured to carry out attracting holding to chip 2 using upper surface, and is configured to rotate freely.Mill
Cutting unit 48 includes: main shaft 50, with main shaft motor it is (not shown) connection and vertically extend；And it is disk-shaped
Emery wheel mounting base 52 is fixed on the lower end of main shaft 50.Ring-type is fixed with by bolt 54 in the lower surface of emery wheel mounting base 52
Grinding emery wheel 56.Outer peripheral edge portion in the lower surface of grinding emery wheel 56 is fixed with interval in the circumferential and annularly configures
Multiple grinding grinding tools 58.
Continue to illustrate referring to Fig. 7, in segmentation process, the back side 2b for making chip 2 first upward, utilizes chucking work
The upper surface of platform 46 carries out attracting holding to chip 2.Then, make chuck table 46 when viewed from above around counterclockwise according to
Defined rotation speed (such as 300rpm) is rotated.In addition, making main shaft 50 when viewed from above around counterclockwise according to rule
Fixed rotation speed (such as 6000rpm) is rotated.Then, make main shaft using the lifting unit (not shown) of grinding attachment 44
50 decline and contact grinding grinding tool 58 with the back side 2b of chip 2.Then, make main shaft 50 according to fixed grinding and feeding speed
(such as 1.0 μm/s) decline.It is ground thereby, it is possible to the back side 2b to chip 2 and chip 2 is finish-machined to defined thickness
(such as 100 μm or so).
In addition, the defined pressing force as brought by grinding and feeding acts on chip 2 when being ground to chip 2,
Therefore crackle 60 is grown from the modification layer 42 for the inside for being formed in semiconductor substrate 4 along the thickness direction of chip 2.In the reality of diagram
It applies in mode, as shown in (b) of Fig. 8, is formed in cutting slot formation process and crosses binder course 8 and reach the first accumulation layer 6
Cutting slot 30, therefore from modification layer 42 growth and reach the first accumulation layer 6 crackle 60 will not occur bend and be brought to
To cutting slot 30.It therefore, being capable of splitting with the clathrate grown from the modification layer 42 of clathrate formation as shown in (a) of Fig. 8
Line 60 is to divide starting point and chip 2 is suitably divided into each flash chip 12 along segmentation preset lines 14.In addition, due to from
The crackle 60 that modification layer 42 is grown is segmentation starting point, therefore the adjacent mutual interval of flash chip 12 is essentially zero.In addition,
As long as the depth of cutting slot 30 is at least depth identical with the thickness of the second accumulation layer 10, from the crackle of the modification growth of layer 42
60 will not bend at binder course 8.In addition, in the illustrated embodiment, showing and being removed modification layer 42 by grinding
The example removed makes to divide starting point to include modification layer 42 however, you can also not modify the removal of layer 42.
After implementing segmentation process, implement DAF segmentation process, in the chip 2 for being divided into each flash chip 12
Back side 2b on DAF is arranged, the supporting strip of bearing DAF is extended and is split according to each flash chip 12 to DAF.
In DAF segmentation process, prepare the circular DAF 62 with diameter identical with chip 2 first.In embodiment illustrated
In, as shown in figure 9, DAF 62 is supported in the center portion for the circular supporting strip 66 that periphery is fixed on ring-shaped frame 64.
Then, it is pasted on the back side 2b of chip 2 for being divided into each flash chip 12 and DAF 62 is arranged.At this point, chip 2 is divided
It is cut into each flash chip 12, but maintains the form of discoid chip 2 by protection band 40.Then, as shown in Figure 10, will
Protection band 40 is removed from the positive 2a for the chip 2 for being divided into each flash chip 12.In addition, with label 68 come table in Figure 10
Show the cut-off rule being made of cutting slot 30 or crackle 60 etc..
Then, the supporting strip 66 of bearing DAF 62 is extended and DAF 62 is divided according to each flash chip 12
It cuts.The segmentation of the DAF 62, which can be used for example, is shown in FIG. 11 a part of expanding unit 70 to implement.Expanding unit 70
Include: cylindric extension drum 72；Cricoid holding member 74 lifting freely configures the radial outside in extension drum 72；
And multiple fixtures 76, they in the circumferential interval and be attached to the upper end outer peripheral edge of holding member 74.Extend drum 72
Diameter is greater than the diameter of chip 2 and is less than the internal diameter of frame 64.In addition, the internal diameter and outer diameter of holding member 74 and frame 64 is interior
Diameter and outer diameter are accordingly formed, and frame 64 can be loaded on the upper surface of holding member 74.
1 continues to illustrate referring to Fig.1, firstly, making to be divided into the chip 2 of each flash chip 12 upward and by frame
64 are placed on the upper surface of holding member 74.At this point, the upper surface of holding member 74 is located in and uses solid line in Figure 11
Shown in extension drum 72 the almost the same height in upper end.Then, frame 64 is fixed using multiple fixtures 76.Then,
Decline holding member 74 by the lifting units such as cylinder (not shown).Then, frame 64 also declines with holding member 74 together,
Therefore the supporting strip 66 for being fixed on frame 64 is extended by the extension drum 72 of opposite rising, is acted on supporting strip 66 and being radiated
Shape tension.As a result, as shown in double dot dash line in Figure 11, the adjacent mutual interval of flash chip 12 expands, and is disposed in point
DAF 62 on the back side 2b of chip 2 after cutting follows each flash chip 12 and along the periphery quilt of each flash chip 12
Suitably (clean) Ground Split.Then, each flash chip 12 of DAF 62 will be installed on the back side by as adhesive sheet
DAF62 and be installed on printed base plate (not shown) etc..
As described above, in the illustrated embodiment, will not be sent out in segmentation process from the crackle 60 that modification layer 42 is grown
It is raw to bend but be directed to cutting slot 30, therefore chip 2 can be suitably divided into each sudden strain of a muscle along segmentation preset lines 14
Deposit chip 12.In addition, being segmentation starting point with the crackle 60 grown from modification layer 42, therefore can in the illustrated embodiment
Making the mutual interval of adjacent flash chip 12 is essentially zero.In addition, in the illustrated embodiment, in DAF segmentation process
In DAF 62 appropriate (clean) can be split along the periphery of each flash chip 12.
Additionally, it is contemplated that DAF 62 being arranged on the back side 2b of chip 2, is cutting before implementing cutting slot formation process
It cuts in slot formation process other than cutting the second accumulation layer 10, also by DAF 62 and the first accumulation layer 6 and semiconductor substrate 4 one
It rises and is cut, as a result, in the state of being equipped with 62 DAF on the back side 2b of chip 2, in cutting due to DAF's 62
The elasticity of adhesive layer and cause chip 2 to shake, therefore can be cracked in the back side side 2b of chip 2 in the inside of chip 2,
It is possible that bringing adverse effect to the quality of flash chip 12.But in the illustrated embodiment, in cutting slot formation process
In, it, will not be in crystalline substance since DAF 62 being arranged not on the back side 2b of chip 2 and forms cutting slot 30 in the second accumulation layer 10
The back side side 2b of piece 2 is cracked in the inside of chip 2.
Claims (2)
1. the chip for marking off multiple flash chips by dividing preset lines is divided into each sudden strain of a muscle by a kind of processing method of chip
Deposit chip, which is to link up the first accumulation layer and the second accumulation layer and constitute, first accumulation layer be
Metal film and insulating film are alternately laminated multilayer on the front of semiconductor substrate and formed, second accumulation layer be this
Metal film and insulating film are alternately laminated as binder course by multilayer using insulating layer on the upper surface of one accumulation layer and formed,
In, the processing method of the chip includes at least following process:
Cutting slot formation process cuts segmentation preset lines using cutting tool and is formed and cut in second accumulation layer
Slot；
Modify layer formation process, by for semiconductor substrate have permeability wavelength laser beam focal point be positioned at
Divide the inside of the corresponding semiconductor substrate of preset lines and laser beam is irradiated to semiconductor substrate, to form modification layer；
Segmentation process is ground the back side of semiconductor substrate and makes crackle from modification layer growth, to divide the wafer into
Each flash chip；And
Bonding die film is arranged on the back side of chip for being divided into each flash chip in bonding die film segmentation process, to bearing bonding die
The supporting strip of film is extended and is split according to each flash chip to bonding die film.
2. the processing method of chip according to claim 1, wherein
In the cutting slot formation process, cutting slot reaches the binder course.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018-078195 | 2018-04-16 | ||
| JP2018078195A JP7027234B2 (en) | 2018-04-16 | 2018-04-16 | Wafer processing method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110391183A true CN110391183A (en) | 2019-10-29 |
Family
ID=68284317
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910293069.0A Pending CN110391183A (en) | 2018-04-16 | 2019-04-12 | The processing method of chip |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP7027234B2 (en) |
| KR (1) | KR102629098B1 (en) |
| CN (1) | CN110391183A (en) |
| TW (1) | TWI825091B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114986358A (en) * | 2022-05-27 | 2022-09-02 | 深圳市奥伦德元器件有限公司 | Chip scribing method, device, controller and computer readable storage medium |
| CN115770960A (en) * | 2021-11-25 | 2023-03-10 | 湖南大学 | Composite cutting process for semiconductor material containing back gold layer |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022249443A1 (en) | 2021-05-28 | 2022-12-01 | 日本たばこ産業株式会社 | Information processing method, information processing terminal, and information processing system |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105261560A (en) * | 2014-07-08 | 2016-01-20 | 株式会社迪思科 | Method for machining wafer |
| CN105702628A (en) * | 2014-12-15 | 2016-06-22 | 株式会社迪思科 | Wafer processing method |
| CN106997866A (en) * | 2016-01-22 | 2017-08-01 | 株式会社迪思科 | The processing method of chip |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007134454A (en) | 2005-11-09 | 2007-05-31 | Toshiba Corp | Method of manufacturing semiconductor device |
| JP2013080972A (en) * | 2005-11-10 | 2013-05-02 | Renesas Electronics Corp | Method of manufacturing semiconductor device |
| JP5178213B2 (en) | 2008-01-23 | 2013-04-10 | 株式会社東芝 | Stacked semiconductor device and semiconductor memory device |
| JP5155030B2 (en) * | 2008-06-13 | 2013-02-27 | 株式会社ディスコ | Method for dividing optical device wafer |
| JP2010010595A (en) | 2008-06-30 | 2010-01-14 | Oki Data Corp | Composite semiconductor device, print head, and image forming apparatus |
| KR101698193B1 (en) * | 2009-09-15 | 2017-01-19 | 삼성전자주식회사 | Three Dimensional Semiconductor Memory Device And Method Of Fabricating The Same |
| JP5943727B2 (en) | 2012-06-12 | 2016-07-05 | 株式会社ディスコ | Breaking method of adhesive film |
| JP6029347B2 (en) | 2012-06-26 | 2016-11-24 | 株式会社ディスコ | Wafer processing method |
| US9460966B2 (en) * | 2013-10-10 | 2016-10-04 | Applied Materials, Inc. | Method and apparatus for dicing wafers having thick passivation polymer layer |
| JP6230422B2 (en) | 2014-01-15 | 2017-11-15 | 株式会社ディスコ | Wafer processing method |
| JP2015207604A (en) | 2014-04-17 | 2015-11-19 | 株式会社ディスコ | Wafer processing method |
| JP2016058454A (en) * | 2014-09-05 | 2016-04-21 | 株式会社東芝 | Semiconductor memory |
| JP6345585B2 (en) | 2014-12-10 | 2018-06-20 | 株式会社東京精密 | Wafer dividing method and wafer dividing apparatus |
-
2018
- 2018-04-16 JP JP2018078195A patent/JP7027234B2/en active Active
-
2019
- 2019-03-26 KR KR1020190034398A patent/KR102629098B1/en active IP Right Grant
- 2019-04-12 CN CN201910293069.0A patent/CN110391183A/en active Pending
- 2019-04-15 TW TW108113018A patent/TWI825091B/en active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105261560A (en) * | 2014-07-08 | 2016-01-20 | 株式会社迪思科 | Method for machining wafer |
| CN105702628A (en) * | 2014-12-15 | 2016-06-22 | 株式会社迪思科 | Wafer processing method |
| CN106997866A (en) * | 2016-01-22 | 2017-08-01 | 株式会社迪思科 | The processing method of chip |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115770960A (en) * | 2021-11-25 | 2023-03-10 | 湖南大学 | Composite cutting process for semiconductor material containing back gold layer |
| CN114986358A (en) * | 2022-05-27 | 2022-09-02 | 深圳市奥伦德元器件有限公司 | Chip scribing method, device, controller and computer readable storage medium |
| CN114986358B (en) * | 2022-05-27 | 2024-04-09 | 深圳市奥伦德元器件有限公司 | Chip dicing method, apparatus, controller, and computer-readable storage medium |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2019186468A (en) | 2019-10-24 |
| JP7027234B2 (en) | 2022-03-01 |
| KR20190120701A (en) | 2019-10-24 |
| TWI825091B (en) | 2023-12-11 |
| TW201944474A (en) | 2019-11-16 |
| KR102629098B1 (en) | 2024-01-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105261560B (en) | The processing method of chip | |
| CN104752346B (en) | The processing method of chip | |
| CN106239751B (en) | The generation method of chip | |
| CN108372434A (en) | The generation method of SiC wafer | |
| CN106129003B (en) | The processing method of chip | |
| CN103489772B (en) | The processing method of chip | |
| CN102403204B (en) | The processing method of wafer | |
| CN110391183A (en) | The processing method of chip | |
| CN108735578A (en) | The generation method of SiC wafer | |
| JP6608713B2 (en) | Wafer processing method | |
| CN1574235A (en) | Process for manufacturing a semiconductor chip | |
| CN108022876A (en) | The processing method of chip | |
| CN109256369A (en) | The manufacturing method of glass intermediary layer | |
| CN104078425B (en) | The processing method of chip | |
| CN108022877A (en) | The processing method of chip | |
| CN107017201A (en) | The processing method of chip | |
| CN107591361A (en) | The manufacture method of semiconductor device chip | |
| CN107017202A (en) | The processing method of chip | |
| TWI798471B (en) | Wafer Processing Method | |
| CN108735593A (en) | The processing method of chip | |
| CN104979183B (en) | The processing method of multilayer board | |
| US20120309168A1 (en) | Laser beam processing method for a wafer | |
| CN109256332A (en) | The processing method of chip | |
| CN110961803B (en) | Diamond substrate generation method | |
| CN109285771A (en) | The processing method of chip |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |