CN110379902A - A kind of flip LED chips and preparation method thereof - Google Patents
A kind of flip LED chips and preparation method thereof Download PDFInfo
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- CN110379902A CN110379902A CN201910614375.XA CN201910614375A CN110379902A CN 110379902 A CN110379902 A CN 110379902A CN 201910614375 A CN201910614375 A CN 201910614375A CN 110379902 A CN110379902 A CN 110379902A
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- 230000011514 reflex Effects 0.000 claims description 28
- 239000004065 semiconductor Substances 0.000 claims description 28
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- 239000002184 metal Substances 0.000 claims description 18
- 239000000126 substance Substances 0.000 claims description 18
- 230000004888 barrier function Effects 0.000 claims description 14
- 239000000758 substrate Substances 0.000 claims description 13
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 5
- 150000001875 compounds Chemical class 0.000 claims description 3
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- 230000015572 biosynthetic process Effects 0.000 abstract description 3
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- 238000002834 transmittance Methods 0.000 description 2
- 229910002601 GaN Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 229910004205 SiNX Inorganic materials 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/382—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
- H01L33/42—Transparent materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
- H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0016—Processes relating to electrodes
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0025—Processes relating to coatings
Abstract
The invention discloses a kind of flip LED chips comprising: flip LED chips ontology, the flip LED chips body surface are equipped with the first passivation layer；With the first Eutectic Layer and the second Eutectic Layer being set on first passivation layer；First Eutectic Layer and the second Eutectic Layer are electrically connected by being set to the hole of first passivation layer with flip LED chips ontology formation；The height of first Eutectic Layer is identical with the height of second Eutectic Layer, area equation；First passivation layer is equipped at least one groove at the second Eutectic Layer.The present invention is provided with groove on the passivation layer on flip LED chips surface, prevents the scaling powder lateral magnification melted in welding process；Electrode connection is effectively prevented, LED chip electric leakage failure is prevented.Meanwhile this groove can also help scaling powder to be quickly discharged in later period scale removal process, promote the high temperature reliability of chip.
Description
Technical field
The present invention relates to optoelectronic fabrication techniques fields more particularly to a kind of flip LED chips and preparation method thereof.
Background technique
Flip LED chips are a kind of Novel LED chips, and heat dissipation performance and light efficiency are all more excellent than common packed LED chip.
Traditional packed LED chip that is packaged in of flip LED chips differs larger, realizes that effective realization encapsulation is flip LED chips production
The key content of industry.In the prior art, flip LED chips encapsulation is broadly divided into two kinds: the first is golden bump bond system
Golden convex block is first fixed on bracket by journey, and the fixation position of golden convex block is identical as electrode position, then by Supersonic wave pressure
It closes, engages electrode and the golden convex block on package support on chip and complete electrical connection, this method is low to package support requirement degree,
Processing procedure elasticity is big, but its golden convex block dosage is big, at high cost, and chip contraposition needs higher precision, therefore board is expensive, raw
It is bad to produce efficiency, causes entire production cost excessively high.Second is eutectic bonding processing procedure, will select it with vapor deposition or sputter process
Eutectic metal layer is made on chip, is reused low temperature scaling powder and is conformed to chip on package support in advance, and eutectic gold is being higher than
Belong to reflow under the fusing point of layer, form chip with package support and engage, this method advantage is that metal is at low cost, and speed of production is fast, right
The requirement of board aligning accuracy is relatively low, but flip LED chips surface eutectic metal layer is required to have enough levelness, if golden
Belonging to layer surface has difference of height, it will cause eutectic voidage is excessively high, causes eutectic bad, and then influences encapsulation yield；In addition, by
During high-temperature soldering, scaling powder can incorporate electrode septal area, will cause LED chip electric leakage failure.
Summary of the invention
Technical problem to be solved by the present invention lies in provide a kind of flip LED chips, it is residual to effectively reduce scaling powder
It stays, prevents LED chip electric leakage failure；And its surfacing, it is easy to encapsulate.
Correspondingly, the present invention also provides a kind of preparation methods of above-mentioned flip LED chips.
In order to solve the above-mentioned technical problems, the present invention provides a kind of flip LED chips comprising: flip LED chips sheet
Body, the flip LED chips body surface are equipped with the first passivation layer；With
The first Eutectic Layer and the second Eutectic Layer on first passivation layer；
First Eutectic Layer and the second Eutectic Layer pass through the hole and the flip LED core set on first passivation layer
The connection of piece ontology；
The height of first Eutectic Layer is identical with the height of second Eutectic Layer, area equation；
First passivation layer is equipped at least one groove at the second Eutectic Layer.
As an improvement of the above technical solution, first passivation layer is equipped with a groove；It is total that it is set to described first
On the first passivation layer between crystal layer and the second Eutectic Layer；Or
First passivation layer is equipped with four grooves；The groove is arranged around second Eutectic Layer.
As an improvement of the above technical solution, the width of the groove is 5~50 μm, and depth is 10~500nm.
As an improvement of the above technical solution, the trench cross-section be square, taper, ellipse or semicircle.
As an improvement of the above technical solution, the flip LED chips ontology includes:
Substrate；
Epitaxial layer on the substrate, the epitaxial layer successively include the first semiconductor layer, luminescent layer and the second half
Conductor layer；
Transparency conducting layer on second semiconductor layer；
Complex reflex layer on the transparency conducting layer；
The second passivation layer on the complex reflex layer；
First electrode and second electrode on second passivation layer；
And the first passivation layer in the first electrode and second electrode；
The first electrode by through the transparency conducting layer, complex reflex layer, the second passivation layer it is multiple first small
Hole is connect with first semiconductor layer；The second electrode by be set to second passivation layer the second hole with it is described multiple
Close reflecting layer connection.
As an improvement of the above technical solution, the complex reflex layer includes reflecting layer and the metal set on the reflecting layer
Barrier layer；
The reflecting layer is formed using PVD method, and the metal barrier is formed using magnetron sputtering technique.
As an improvement of the above technical solution, the metal barrier by one of Ti, Ni, Pt, W, Pd, Rh, TiW or
It is several to be made.
As an improvement of the above technical solution, the transparency conducting layer with a thickness ofThe reflecting layer
With a thickness ofThe metal barrier with a thickness ofThe thickness of second passivation layer
Degree is
Correspondingly, the present invention also provides a kind of preparation methods of above-mentioned flip LED chips comprising:
(1) flip LED chips ontology is prepared；The flip LED chips body surface is equipped with the first passivation layer；
(2) the first Eutectic Layer and the second Eutectic Layer are formed on the flip LED chips ontology；
(3) chemical wet etching is carried out to first passivation layer, forms at least one groove；Obtain flip LED chips at
Product.
As an improvement of the above technical solution, the preparation method of the flip LED chips ontology includes:
(1) substrate is provided；
(2) epitaxial layer is formed over the substrate；The epitaxial layer includes that the first semiconductor layer, luminescent layer and the second half are led
Body layer；
(3) chemical wet etching is carried out to the epitaxial layer, forms multiple first apertures, first aperture is through to the first half
Conductor layer；
(4) transparency conducting layer is formed on said epitaxial layer there, and chemical wet etching is carried out to transparency conducting layer, and removal first is small
Transparency conducting layer in hole；
(5) complex reflex layer is formed on the transparency conducting layer, and removes the complex reflex layer in the first aperture；
(6) the second passivation layer is formed on the complex reflex layer, and chemical wet etching is carried out to the second passivation layer of institute, with shape
At multiple second orifices and third aperture；The second orifice is through to the complex reflex layer, and the third aperture is through to
First semiconductor layer, the side wall of the third aperture are covered with second passivation layer；
(7) first electrode and second electrode are formed on second passivation layer；
(8) the first passivation layer is formed, and chemical wet etching is carried out to the first passivation layer, exposes multiple first electrodes and second
Electrode；Obtain LED chip body.
The invention has the following beneficial effects:
1. the present invention is provided with groove on the passivation layer on flip LED chips surface, prevent from melting in welding process is helped
Solder flux lateral magnification；Electrode connection is effectively prevented, LED chip electric leakage failure is prevented.Meanwhile this groove can also be clear in the later period
It helps scaling powder to be quickly discharged during reason, promotes the high temperature reliability of chip.
2. first electrode and second electrode are built up in same plane by flip LED chips of the invention, so that later period eutectic
Layer levelness is high, improves the encapsulation yield of flip LED chips.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of flip LED chips in one embodiment of the invention；
Fig. 2 is the cross-sectional view in the direction A-A in Fig. 1；
Fig. 3 is the structural schematic diagram of flip LED chips in further embodiment of this invention；
Fig. 4 is the structural schematic diagram of flip LED chips ontology in one embodiment of the invention；
Fig. 5 is the cross-sectional view in the direction A-A in Fig. 4；
Fig. 6 is the cross-sectional view in the direction B-B in Fig. 4；
Fig. 7 is a kind of preparation method flow chart of flip LED chips of the present invention；
Fig. 8 is the preparation method flow chart of flip LED chips ontology of the present invention；
Fig. 9 is the structural schematic diagram of LED chip after this preparation step of flip LED chips S1；
Figure 10 is the cross-sectional view in the direction A-A in Fig. 9；
The structural schematic diagram of Figure 11 flip LED chips in the prior art.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, the present invention is made into one below in conjunction with attached drawing
Step ground detailed description.Only this is stated, the present invention occurs in the text or will occur up, down, left, right, before and after, it is inside and outside etc. just
Position word is not to specific restriction of the invention only on the basis of attached drawing of the invention.
Referring to Fig. 1 and Fig. 2, the present invention provides a kind of flip LED chips comprising flip LED chips ontology 1, upside-down mounting core
Piece body surface is equipped with the first passivation layer 11；The first Eutectic Layer 2 and the second Eutectic Layer 3 are equipped in the first passivation layer 11；First is total
Identical, the area equation of the height of crystal layer 2 and 3, and by being set to the first passivation layer 11 realization insulation between the two；First Eutectic Layer
2 and second Eutectic Layer 3 formed by being set to hole 111 and the flip LED chips ontology 1 of the first passivation layer 11 and be electrically connected.?
One passivation layer 11 goes out close to the second Eutectic Layer is equipped at least one groove 112.Groove 112 can prevent what is melted in welding process to help
Solder flux lateral magnification effectively prevents electrode connection, prevents LED chip electric leakage failure.Meanwhile this groove 112 can also be rear
It helps scaling powder to be quickly discharged in phase scale removal process, promotes the high temperature reliability of chip.
Specifically, the first passivation layer 11 is equipped with a groove 112 among the present embodiment；It is arranged in the first eutectic
On the first passivation layer 11 between layer 2 and the second Eutectic Layer 3, and close to the second Eutectic Layer 3.Groove 112 is in its longitudinal direction
Shape be straight line, helix, circular arc line, ellipse etc.；It preferably, is straight line；Linear groove 112 is easy to process.
(as shown in Figure 3) in still another embodiment of the present invention, the first passivation layer 11 are equipped with four grooves 112；Its
It is arranged around the second Eutectic Layer 3.This groove is more favorable for preventing the horizontal proliferation of scaling powder, prevents LED chip electric leakage failure.
Specifically, the width of groove 112 is 5~50 μm；When 5 μm of 112 width < of groove, scaling powder can not be effectively prevented
Diffusion；And when subsequent cleaning, cleaning agent is difficult to enter.When 50 μm of its width G T.GT.GT, the performance of the first passivation layer 11 can be produced
Raw large effect, and later period encapsulation thimble position can be influenced too close to the medium line of the first Eutectic Layer 2 and the second Eutectic Layer 3
It sets, promotes encapsulation difficulty.Preferably, the width of groove is 10~30 μm, further preferably 20~30 μm.
Specifically, the depth of groove 112 is 10~500nm；It is open ended to help weldering as 112 depth < 10nm of groove
Agent is very little, can not effectively prevent the diffusion of scaling powder, when the later period cleans, cleaning agent is difficult to enter；As its depth > 500nm,
Channel bottom passivation layer is too thin, can reduce the reliability of LED chip.Preferably, the width of groove is 100~400nm, further
Preferably 150~250nm.
Specifically, the cross section of groove 112 is square, taper, ellipse or semicircle；Preferably, tapered, taper is not
The effect that only can satisfy groove tissue scaling powder horizontal proliferation can also promote cleaning agent rapid dispersion, improve subsequent cleaning effect
Rate.
Specifically, shown in Figure 4, among the present embodiment, flip LED chips ontology 1 includes substrate 12, is sequentially arranged in
Epitaxial layer 13, transparency conducting layer 14, complex reflex layer 15 on substrate, the second passivation layer 16, first electrode 17, second electrode 18
With the first passivation layer 11.Wherein, epitaxial layer 13 includes the first semiconductor layer 131, luminescent layer 132 and the second semiconductor layer 133；The
One electrode 17 is by running through multiple third apertures 19 of transparency conducting layer 14, composed emission layer 15, the second passivation layer 16 in
First semiconductor layer 131 forms electrical connection；Second electrode 18 is by the second orifice 161 set on second passivation layer 16 and again
It closes reflecting layer 15 and forms electrical connection.First electrode and second electrode are built up on same plane (the first passivation layer) by the present invention,
So that later period Eutectic Layer levelness is high, the encapsulation yield of flip LED chips is improved.
First electrode 17 and second electrode 18 are built up on the first passivation layer 16 by the present invention, so that 17 He of first electrode
Second electrode 18 is contour；Facilitate that later period Eutectic Layer is contour, the encapsulation difficulty of flip LED chips is greatly reduced.
Wherein, referring to Fig. 5, first electrode 17 is by running through transparency conducting layer 14, composed emission layer 15, the second passivation layer 16
Multiple third apertures 19 in the first semiconductor layer 131 formation be electrically connected.It is equipped in LED chip multiple equally distributed
Third aperture 19 reduces contact resistance, is promoted to enhance the electric connection effect of first electrode 17 and the first semiconductor layer 131
The light efficiency of LED chip.
Wherein, referring to Fig. 6, second electrode 18 is by being set to the second orifice 161 of second passivation layer 16 and compound anti-
It penetrates layer 15 and forms electrical connection.
Correspondingly, the invention also discloses a kind of preparation methods of above-mentioned flip LED chips referring to Fig. 7 comprising:
S100: flip LED chips ontology is prepared；
S200: the first Eutectic Layer and the second Eutectic Layer are formed on flip LED chips ontology；
Wherein, the material selection AuSn of the first Eutectic Layer and the second Eutectic Layer, but not limited to this；
S300: chemical wet etching is carried out to the first passivation layer, forms at least one groove；Obtain flip LED chips finished product.
Specifically, first carrying out out figure to the first passivation layer close to the second Eutectic Layer using yellow light technique；Then using dry
Method etching or wet etching process etching, obtain groove.
Referring to Fig. 8, the invention also discloses a kind of preparation methods of flip LED chips ontology comprising:
S1: a substrate is provided；
Wherein, substrate selects sapphire, SiC or spinelle, but not limited to this；
S2: epitaxial layer is formed on the substrate；
Wherein, epitaxial layer includes the first semiconductor layer, luminescent layer and the second semiconductor layer；Specifically, the first semiconductor layer
131 be n type gallium nitride layer, and the second semiconductor layer 133 is p type semiconductor layer；But not limited to this.
S3: chemical wet etching is carried out to epitaxial layer, forms multiple first apertures；
Referring to Fig. 9 and Figure 10；Multiple equally distributed first apertures are formed on epitaxial layer by lithographic etch process
134；First aperture 134 is through to the first semiconductor layer 131.Multiple first apertures 134 can effectively facilitate the first semiconductor layer 131
Contact with first electrode promotes being uniformly distributed for electric current.
Further, the width of the first aperture 134 isPreferably
It should be noted that usually carrying out step quarter to epitaxial layer among common flip LED chips preparation process
Erosion, to form a huge hole A, the width of this hole generally existsIn the later period directly in this hole shape
At N electrode B (as shown in figure 11)；But there is biggish difference in height between the P electrode C and N electrode B of this method formation, after
Phase is hardly formed smooth pad when forming pad, influences flip LED chips encapsulation.And the present invention passes through for aperture early period
The change of technique greatly improves the water of later period Eutectic Layer so that later period first electrode and second electrode are formed in same plane
Pingdu improves encapsulation yield.
S4: transparency conducting layer is formed on epitaxial layer；
Specifically, form transparency conducting layer on epitaxial layer, chemical wet etching then is carried out to transparency conducting layer, exposes the
One aperture；And the first aperture side wall and the transparency conducting layer of bottom are removed.
Wherein, transparency conducting layer 14 can be ITO layer, AZO layers, GZO layers etc., but not limited to this.Preferably, in the present embodiment
Among, transparency conducting layer 14 is ITO layer, and light transmittance is higher, can effectively reduce the loss of light；And ITO layer resistance is small, is conducive to
Current expansion prevents electric current congestion phenomenon, promotes quantum efficiency.Wherein, transparency conducting layer with a thickness ofIt is excellent
It is selected asThe transparency conducting layer of this thickness range has more good conductive capability (too thin then conductive capability is weak),
Also it can be effectively prevented and absorb excessive light.(too thick then light transmittance is low)
S5: complex reflex layer is formed over transparent conductive layer；
Specifically, including:
S51: complex reflex layer is formed over transparent conductive layer；
Wherein, composed emission layer 15 includes reflecting layer 151 and the metal barrier 152 on emission layer 15.Reflecting layer
151 material is Ag, can effectively receive and reflect the light of the sending of luminescent layer 132；The use of metal barrier 152 Ti, Ni,
One of Pt, W, Pd, Rh, TiW are made；Preferably, TiW is selected, metal barrier 152 can be formed reflecting layer 151 well
Protection.
Specifically, complex reflex layer 15 by negative-working photoresist-electron beam evaporation plating (magnetron sputtering deposition or physical vapor it is heavy
Product)-stripping technology formed；Preferably, reflecting layer 151 is formed using physical vaporous deposition (PVD), and metal barrier 152 is adopted
Formed with magnetron sputtering technique, metal barrier 152 consistency formed using this technique is high, and film layer is careful, can high temperature resistant, energy
It is enough that perfect protection is formed to reflecting layer 151.
Wherein, reflecting layer 151 with a thickness ofReflecting layer reflectivity in this thickness range is preferable.It is excellent
Choosing, reflecting layer with a thickness ofMetal barrier 152 with a thickness of
S52: chemical wet etching is carried out to complex reflex layer；
By chemical wet etching, the complex reflex layer that is completely removed in the first aperture；Prevent complex reflex layer metal conduction
Electrode adversely affects.It should be noted that in step s 51, by stripping technology, can partially remove in the first aperture
Complex reflex layer；By further chemical wet etching, then complex reflex layer is completely removed.
S6: the second passivation layer is formed on the complex reflex layer；
Specifically, S6 includes:
S61: the second passivation layer is formed on complex reflex layer；
Wherein, the material of the second passivation layer 16 is SiO2Or SiNx, but not limited to this；Second passivation layer 16 with a thickness of
S62: chemical wet etching is carried out to the second passivation layer, forms second orifice and third aperture；
Specifically, second orifice 161 is distributed in the region without the first aperture 134；Second orifice 161 is through to compound anti-
Penetrate layer 15；More specifically, second orifice 161 is through to reflection blocking layer 152；Second orifice 161 is used to form second in the later period
Electrode 18 (P electrode)；Therefore second orifice is etched to reflection blocking layer 152, that is, it can ensure that second electrode 18 and the second semiconductor
The Ohmic contact of layer 133.
Specifically, third aperture 19 is through to the first semiconductor layer 131, third aperture 19 is used to form the first electricity in the later period
Pole 17 (N electrode).The side wall of third aperture 19 covers the second passivation layer 16, for realizing first electrode 17 and complex reflex layer 15
Insulation.
S7: first electrode and second electrode are formed on the second passivation layer；
Specifically, forming first electrode 17 and second electrode 18 using electron beam evaporation plating, hot evaporation or magnetron sputtering technique.
Specifically, in the present invention, first electrode 17 and second electrode 18 successively include the first Cr layers, the first Al layers, the
Two Cr layers, the 2nd Al layers, Ti layers and Pt layers.The first electrode of above structure can be connected by third aperture 19.Above structure
First electrode 17 still can keep good Ohmic contact with the first semiconductor layer in the contact that aperture contacts, it is ensured that
The excellent performance of LED chip.
S8: the first passivation layer is formed, LED chip body is obtained.
Specifically, S8 includes:
S81: the first passivation layer is formed；
The material of first passivation layer 11 is identical as the second passivation layer 16.The material phase of first passivation layer 11 and the second passivation layer
Together, thicknessPreferablyWhen the thickness of the first passivation layer 11When, ditch
Slot 112 may penetrate the first passivation layer, weaken passivation effect, reduce the reliability of LED chip；When the first passivation layer thicknessWhen, LED chip volume is excessive；Encapsulation is difficult.
S82: chemical wet etching is carried out to the first passivation layer, exposes multiple first electrodes and second electrode；
Specifically, exposing first electrode and second electrode by etching aperture to the first passivation layer 11.Specifically,
Among the present embodiment, 1 surface of flip LED chips ontology is equipped at least one first electrode 17 and at least one second electrode 18.
Preferably, flip LED chips body surface is equipped with 3 first electrodes and 3 second electrodes, but not limited to this.
The above is the preferred embodiment of invention, it is noted that those skilled in the art are come
It says, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also considered as this
The protection scope of invention.
Claims (10)
1. a kind of flip LED chips characterized by comprising
Flip LED chips ontology, the flip LED chips body surface are equipped with the first passivation layer；With
The first Eutectic Layer and the second Eutectic Layer on first passivation layer；
First Eutectic Layer and the second Eutectic Layer by be set to first passivation layer hole and the flip LED chips sheet
Body connection；
The height of first Eutectic Layer is identical with the height of second Eutectic Layer, area equation；
First passivation layer is equipped at least one groove at the second Eutectic Layer.
2. flip LED chips as described in claim 1, which is characterized in that first passivation layer is equipped with a groove；Its
On the first passivation layer between first Eutectic Layer and the second Eutectic Layer；Or
First passivation layer is equipped with four grooves；The groove is arranged around second Eutectic Layer.
3. flip LED chips as claimed in claim 2, which is characterized in that the width of the groove is 5~50 μm, and depth is
10~500nm.
4. flip LED chips as claimed in claim 2, which is characterized in that the trench cross-section is square, taper, ellipse
Shape or semicircle.
5. flip LED chips as described in claim 1, which is characterized in that the flip LED chips ontology includes:
Substrate；
Epitaxial layer on the substrate, the epitaxial layer successively include the first semiconductor layer, luminescent layer and the second semiconductor
Layer；
Transparency conducting layer on second semiconductor layer；
Complex reflex layer on the transparency conducting layer；
The second passivation layer on the complex reflex layer；
First electrode and second electrode on second passivation layer；
And the first passivation layer in the first electrode and second electrode；
The first electrode by through the transparency conducting layer, complex reflex layer, the second passivation layer multiple first apertures with
The first semiconductor layer connection；The second electrode is by being set to the second hole of second passivation layer and described compound anti-
Penetrate layer connection.
6. flip LED chips as claimed in claim 5, which is characterized in that the complex reflex layer includes reflecting layer and is set to
The metal barrier in the reflecting layer；
The reflecting layer is formed using PVD method, and the metal barrier is formed using magnetron sputtering technique.
7. flip LED chips as claimed in claim 6, which is characterized in that the metal barrier by Ti, Ni, Pt, W, Pd,
One or more of Rh, TiW are made.
8. flip LED chips as claimed in claim 6, which is characterized in that the transparency conducting layer with a thickness ofThe reflecting layer with a thickness ofThe metal barrier with a thickness ofSecond passivation layer with a thickness of
9. a kind of preparation method of such as described in any item flip LED chips of claim 1-8 characterized by comprising
(1) flip LED chips ontology is prepared；The flip LED chips body surface is equipped with the first passivation layer；
(2) the first Eutectic Layer and the second Eutectic Layer are formed on the flip LED chips ontology；
(3) chemical wet etching is carried out to first passivation layer, forms at least one groove；Obtain flip LED chips finished product.
10. the preparation method of flip LED chips as claimed in claim 9, which is characterized in that the flip LED chips ontology
Preparation method include:
(1) substrate is provided；
(2) epitaxial layer is formed over the substrate；The epitaxial layer includes the first semiconductor layer, luminescent layer and the second semiconductor
Layer；
(3) chemical wet etching is carried out to the epitaxial layer, forms multiple first apertures, first aperture is through to the first semiconductor
Layer；
(4) transparency conducting layer is formed on said epitaxial layer there, and chemical wet etching is carried out to transparency conducting layer, is removed in the first aperture
Transparency conducting layer；
(5) complex reflex layer is formed on the transparency conducting layer, and removes the complex reflex layer in the first aperture；
(6) the second passivation layer is formed on the complex reflex layer, and chemical wet etching is carried out to the second passivation layer of institute, it is more to be formed
A second orifice and third aperture；The second orifice is through to the complex reflex layer, and the third aperture is through to described
First semiconductor layer, the side wall of the third aperture are covered with second passivation layer；
(7) first electrode and second electrode are formed on second passivation layer；
(8) the first passivation layer is formed, and chemical wet etching is carried out to the first passivation layer, exposes multiple first electrodes and the second electricity
Pole；Obtain LED chip body.
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| CN103682004A (en) * | 2012-09-07 | 2014-03-26 | 晶能光电（江西）有限公司 | Light emitting diode flip chip for improving light-out rate and preparation method thereof |
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| CN108336207A (en) * | 2018-01-05 | 2018-07-27 | 佛山市国星半导体技术有限公司 | A kind of high reliability LED chip and preparation method thereof |
| CN109545935A (en) * | 2018-12-27 | 2019-03-29 | 佛山市国星半导体技术有限公司 | A kind of high brightness LED chip and preparation method thereof |
| CN210156419U (en) * | 2019-07-09 | 2020-03-17 | 佛山市国星半导体技术有限公司 | Flip LED chip |
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| CN103682004A (en) * | 2012-09-07 | 2014-03-26 | 晶能光电（江西）有限公司 | Light emitting diode flip chip for improving light-out rate and preparation method thereof |
| CN105489742A (en) * | 2015-09-21 | 2016-04-13 | 大连德豪光电科技有限公司 | LED flip chip and preparation method thereof |
| CN108336207A (en) * | 2018-01-05 | 2018-07-27 | 佛山市国星半导体技术有限公司 | A kind of high reliability LED chip and preparation method thereof |
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