CN110299415A - A kind of indium aluminium zinc oxide film transistor based on high dielectric constant gate dielectric layer and its full room temperature preparation method - Google Patents
A kind of indium aluminium zinc oxide film transistor based on high dielectric constant gate dielectric layer and its full room temperature preparation method Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title claims abstract description 26
- 229910052738 indium Inorganic materials 0.000 title claims abstract description 24
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 title claims abstract description 24
- JYMITAMFTJDTAE-UHFFFAOYSA-N aluminum zinc oxygen(2-) Chemical compound [O-2].[Al+3].[Zn+2] JYMITAMFTJDTAE-UHFFFAOYSA-N 0.000 title claims abstract description 23
- PBCFLUZVCVVTBY-UHFFFAOYSA-N tantalum pentoxide Inorganic materials O=[Ta](=O)O[Ta](=O)=O PBCFLUZVCVVTBY-UHFFFAOYSA-N 0.000 claims abstract description 39
- 239000000758 substrate Substances 0.000 claims abstract description 36
- 238000004544 sputter deposition Methods 0.000 claims abstract description 34
- 239000007789 gas Substances 0.000 claims description 43
- 238000000034 method Methods 0.000 claims description 32
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 24
- 239000001301 oxygen Substances 0.000 claims description 24
- 229910052760 oxygen Inorganic materials 0.000 claims description 24
- 230000001105 regulatory effect Effects 0.000 claims description 15
- 239000000463 material Substances 0.000 claims description 9
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 6
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 6
- 238000001816 cooling Methods 0.000 claims description 6
- 238000005498 polishing Methods 0.000 claims description 5
- 239000000919 ceramic Substances 0.000 claims description 4
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 4
- 239000012459 cleaning agent Substances 0.000 claims description 3
- 239000013078 crystal Substances 0.000 claims description 3
- 239000008367 deionised water Substances 0.000 claims description 3
- 229910021641 deionized water Inorganic materials 0.000 claims description 3
- 235000019441 ethanol Nutrition 0.000 claims description 3
- 229910052757 nitrogen Inorganic materials 0.000 claims description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 3
- 238000007664 blowing Methods 0.000 claims 1
- 239000010408 film Substances 0.000 description 55
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 239000000523 sample Substances 0.000 description 6
- 229910052681 coesite Inorganic materials 0.000 description 5
- 229910052906 cristobalite Inorganic materials 0.000 description 5
- 230000007547 defect Effects 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- 239000000377 silicon dioxide Substances 0.000 description 5
- 229910052682 stishovite Inorganic materials 0.000 description 5
- 229910052905 tridymite Inorganic materials 0.000 description 5
- 230000008901 benefit Effects 0.000 description 4
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 4
- 238000011160 research Methods 0.000 description 4
- 238000012360 testing method Methods 0.000 description 4
- 238000012546 transfer Methods 0.000 description 4
- 239000008186 active pharmaceutical agent Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000005669 field effect Effects 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 238000001803 electron scattering Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 238000012876 topography Methods 0.000 description 2
- 229910018516 Al—O Inorganic materials 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910004205 SiNX Inorganic materials 0.000 description 1
- 229910007541 Zn O Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000010348 incorporation Methods 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 238000011056 performance test Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 125000005329 tetralinyl group Chemical group C1(CCCC2=CC=CC=C12)* 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
Abstract
The indium aluminium zinc oxide film transistor and its full room temperature preparation method that the present invention relates to a kind of based on high dielectric constant gate dielectric layer, including the P set gradually from bottom to top+- Si substrate, Ta2O5Gate dielectric layer, double active layers, source electrode and drain electrode；Preparation method includes: (1) in P+Ta is grown on-Si substrate2O5Gate dielectric layer；(2) in Ta2O5First layer IAZO film is grown on gate dielectric layer；(3) second layer IAZO film is grown on first layer IAZO film；(4) on second layer IAZO film grow source electrode and drain electrode to get.The present invention is by exploring and optimizing Ta2O5The sputtering preparation condition of gate dielectric layer, has prepared the IAZO TFT of function admirable in room temperature environment, and IAZO TFT obtained shows high electric property, has wide application prospect in the following Flexible Displays and integrated circuit.
Description
Technical field
The indium aluminium zinc oxide film transistor and its full room that the present invention relates to a kind of based on high dielectric constant gate dielectric layer
Warm preparation method belongs to semiconductor materials and devices technical field.
Background technique
With the fast development of microelectronic industry, the integration degree of electronic chip is higher and higher and corresponding size
It is smaller and smaller.After the characteristic size of super large-scale integration is less than or equal to 65nm, traditional silica (SiO2) grid
The thickness of dielectric layer just needs to be less than 1.4nm, and so thin SiO2Layer can increase considerably the device power consumption of transistor, and
Reduce the ability of its grid voltage regulation channel.People use height the study found that in the case where equivalent oxide thickness remains unchanged
The material of dielectric constant (high k) replaces traditional SiO2Gate dielectric layer can obviously weaken direct tunneling effect, improve device
Performance, and enhance the stability of device.Therefore, film crystal is had become to do gate dielectric layer using more suitable high-g value
Manage (TFT) important research direction.
In recent years, transparent metal oxide TFT because have many advantages, such as function admirable, simple process, it is transparent, can flexibility by
The very big concern of people is arrived.Wherein, amorphous indium gallium zinc oxide (IGZO) TFT is with its higher electron mobility and visible light
Transmitance, good uniformity and can low temperature preparation the advantages that, become achieving together very for the hot spot studied in the world
Big success.However, stability and reliability of the IGZO TFT under the conditions ofs bias, illumination etc. are still to be improved.This is greatly
Ground constrains its large-scale industrial application.Compared with IGZO, indium aluminium zinc oxide (IAZO) has band gap wide and modulation model
Enclose big (~2.9-8.7eV), the advantages that Al-O bonding energy is high, thus the performance for being conducive to improve metal oxide TFT is stablized
Property, and realize the Effective Regulation to channel layer carrier concentration.Therefore, IAZO is that a kind of very promising TFT has
Active layer material.However, people are still very limited to the research of IAZO TFT at present, especially its gate dielectric layer material is ground
Study carefully then more deficient.So far, SiO is only used on a small quantity2, silicon nitride (SiNx) and aluminium oxide (Al2O3) it is IAZO TFT grid Jie
The research of electric layer reports, and the device with these grid dielectric materials prepared by performance it is most it is unsatisfactory [Z.Ye, S.Yue,
J.Zhang,X.Li,L.Chen and J.Lu,Annealing Treatment on Amorphous InAlZnO Films
for Thin-Film Transistors,IEEE Trans.Electron Devices,63,3547-3551,2016.&
M.J.Park,J.Y.Bak,J.S.Choi and S.M.Yoon,Impact of aluminum incorporation into
In-Zn-O active channel for highly-stable thin-film transistor using solution
process,ECS Solid State Lett.,3,Q44-Q46,2014.].In numerous high-g values, tantalum pentoxide
(Ta2O5) it is a kind of most suitable dielectric layer material, dielectric constant is about SiO2Six times, can effectively improve TFT's
The characterisitic parameters such as operating voltage, field-effect mobility, subthreshold swing.However, there are no any about Ta so far2O5Grid
The research report that dielectric layer is applied in IAZO TFT.Importantly, how to realize the full room temperature preparation of high-performance IAZO TFT
It has become and restricts it in the principal element of flexible electronic field application.It is reported that being had been reported that at present other than PI flexible substrate
The operating temperature of flexible substrate be below 225 DEG C.This means that being difficult to prepare IAZO TFT flexible with current technique.
Therefore, it is very necessary for finding one kind and can preparing the method for high-performance IAZO TFT in the environment of full room temperature.
Summary of the invention
In view of the deficiencies of the prior art, the present invention provides a kind of indium aluminium zinc oxide based on high dielectric constant gate dielectric layer
Thin film transistor (TFT) and its full room temperature preparation method.
By studying and changing Ta2O5It is preferable successfully to prepare mass in room temperature environment for the sputtering technology condition of film
Ta2O5Gate dielectric layer simultaneously obtains the IAZO TFT haveing excellent performance at room temperature, is its future in Flexible Displays and ultra-large collection
Important experiment basis is provided at the application in circuit.
Term is explained:
1, radio-frequency magnetron sputter method refers on the basis of magnetron sputtering, makees the sputtering method of power supply using radio-frequency power supply.
The technical solution of the present invention is as follows:
A kind of indium aluminium zinc oxide film transistor based on high dielectric constant gate dielectric layer, including successively set from bottom to top
The P set+- Si substrate, Ta2O5Gate dielectric layer, double active layers, source electrode and drain electrode, double active layers include from bottom to top according to
Secondary setting first layer IAZO film and second layer IAZO film, the source electrode and drain electrode are arranged at the second layer IAZO
On film.
Ta2O5Dielectric constant with higher, Ta2O5Dielectric constant be about SiO2Six times of dielectric constant, therefore Ta2O5
Grid voltage regulation carrier ability it is stronger, required operating voltage is smaller, can effectively improve TFT operating voltage, field effect
Answer the characterisitic parameters such as mobility, subthreshold swing.
It is preferred according to the present invention, the Ta2O5Gate dielectric layer with a thickness of 50-150nm；
It is further preferred that the Ta2O5Gate dielectric layer with a thickness of 70nm.The Ta of different-thickness2O5Gate dielectric layer can
Capacitor of different sizes is provided, and then shows different grid voltage abilities of regulation and control, suitable Ta to TFT2O5Thickness is help to obtain
The excellent TFT of electric property.Meanwhile suitable Ta2O5Gate dielectric layer thickness helps to reduce the leakage current of TFT, improves device
Performance.
It is preferred according to the present invention, the first layer IAZO film with a thickness of 10-25nm, the second layer IAZO film
With a thickness of 5-20nm；
It is further preferred that the first layer IAZO film with a thickness of 20nm；The thickness of the second layer IAZO film
For 10nm.
First layer IAZO film is directly contacted with insulating layer, its growth quality decides containing for device median surface defect
Amount.Suitable first layer IAZO film thickness is conducive to improve thin intramembrane carrier concentration, and then it is less, high to obtain defect
The interface of quality, to be conducive to improve device electric property.The resistivity of second layer IAZO film is higher, and changing its thickness is
The key of carrier concentration in the double IAZO active layers of Effective Regulation.If second layer IAZO film is thicker, will lead to double IAZO has
The carrier concentration of active layer entirety is relatively low, and obtained device performance can be undesirable；If second layer IAZO film is relatively thin, and it can draw
The carrier concentration for playing double IAZO active layer entirety is excessively high, and electron scattering increases, and device performance can reduce again.
Preferred according to the present invention, the thickness of the source electrode and drain electrode is 50nm, the source electrode and drain electrode
Material be Ti.The work function of metal electrode Ti is lower, can form good Ohmic contact between IAZO active layer, mention
The drift motion of high electronics, and then obtain higher device performance.Suitable thickness of electrode help to obtain stable device
Can, reduce loss of the test probe to device.
Preferred according to the present invention, the channel dimensions between the source electrode and drain electrode: width is 1000-2000 μm, long
It is 20-100 μm；
It is further preferred that the channel dimensions between the source electrode and drain electrode: width is 2000 μm, a length of 60 μm.It closes
Suitable channel dimensions advantageously reduce the self-heating effect in channel, improve the drift motion of electronics.
The full room temperature preparation method of the above-mentioned indium aluminium zinc oxide film transistor based on high dielectric constant gate dielectric layer, packet
It includes:
(1) in the P+Ta is grown on-Si substrate2O5Gate dielectric layer；
(2) in the Ta2O5First layer IAZO film is grown on gate dielectric layer；
(3) second layer IAZO film is grown on the first layer IAZO film；
(4) on the second layer IAZO film grow source electrode and drain electrode to get.
It is preferred according to the present invention, in step (1), using radio-frequency magnetron sputter method in the P+It is grown on-Si substrate
Ta2O5Gate dielectric layer comprises the following steps that
A, rf magnetron sputtering chamber door is opened, the substrate, Ta are put into2O5Ceramic target closes chamber door；
B, it vacuumizes, until vacuum degree is lower than 1 × 10 in chamber-5Torr；
C, the Ar/O that oxygen concentration is 5% is passed through in chamber2Mixed gas stops inflation after 1-2 minutes, this operation weight
It is 2-4 times multiple；
D, setting sputtering power is 50-200W, is passed through the Ar/O that oxygen concentration is 5%2Mixed gas, regulating gas flow velocity
To 10-25SCCM, holding office work air pressure is 3.30-3.70mTorr, and underlayer temperature is 20-28 DEG C；
E, it sputters 20-65 minutes；It is 30 minutes cooling after sputtering.
It is further preferred that
In the step C, the Ar/O that oxygen concentration is 5% is passed through in chamber2Mixed gas stops inflation after 1 minute,
This operation is repeated 3 times；
In the step D, setting sputtering power is 90W, is passed through the Ar/O that oxygen concentration is 5%2Mixed gas adjusts gas
For body flow velocity to 20SCCM, holding office work air pressure is 3.58mTorr, and underlayer temperature is 23 DEG C；
In the step E, sputter 30 minutes.
Using the preparation process of radio-frequency magnetron sputter method, it can prepare that close with target component, fine and close, homogeneity is good
Semiconductor film material, it is mutually compatible with existing FPD technique, be conducive to the room temperature preparation of IAZO TFT.In addition, suitable
Growth conditions be conducive to obtain the preferable Ta of quality at room temperature2O5Gate dielectric layer.
It is preferred according to the present invention, in step (2), using radio-frequency magnetron sputter method in the Ta2O5It is grown on gate dielectric layer
First layer IAZO film, comprises the following steps that
A, it is passed through high-purity Ar in chamber, stops inflation after 1-2 minutes, this operation repeats 2-4 times；
B, setting sputtering power is 50-200W, is passed through high-purity Ar, and regulating gas flow velocity to 13-26SCCM keeps indoor work
Making air pressure is 3.40-3.85mTorr, and underlayer temperature is 20-28 DEG C；
C, it sputters 4-14 minutes；It is 30 minutes cooling after sputtering.
It is further preferred that
In the step A, it is passed through high-purity Ar in chamber, stops inflation after 1 minute, this operation is repeated 3 times；
In the step B, setting sputtering power is 90W, is passed through high-purity Ar, and regulating gas flow velocity to 20SCCM keeps room
Interior operating air pressure is 3.68mTorr, and underlayer temperature is 23 DEG C；
In the step C, 8 points are sputtered 54 seconds.
It is preferred according to the present invention, it is raw on the first layer IAZO film using radio-frequency magnetron sputter method in step (3)
The long second layer IAZO film, comprises the following steps that
A, the Ar/O that oxygen concentration is 0.75% is passed through in chamber2Mixed gas stops inflation after 1-2 minutes, this behaviour
Make to repeat 2-4 times；
B, setting sputtering power is 50-200W, is passed through the Ar/O that oxygen concentration is 0.75%2Mixed gas, regulating gas
For flow velocity to 13-26SCCM, holding office work air pressure is 3.40-3.85mTorr, and underlayer temperature is 20-28 DEG C；
C, it sputters 2-10 minutes, closes shielding power supply；
D, wait 20 minutes or more, sample is taken out, instrument is closed, sputtering process terminates；
It is further preferred that
In the step A, the Ar/O that oxygen concentration is 0.75% is passed through in chamber2Mixed gas stopped filling after 1 minute
Gas, this operation are repeated 3 times；
In the step B, setting sputtering power is 90W, is passed through the Ar/O that oxygen concentration is 0.75%2Mixed gas is adjusted
For throttle body flow velocity to 20SCCM, holding office work air pressure is 3.65mTorr, and underlayer temperature is 23 DEG C；
It in the step C, sputters 5 minutes, closes shielding power supply；
In the step D, after waiting 30 minutes, sample is taken out, closes instrument, sputtering process terminates.
Suitable growth conditions is conducive to the IAZO active layer for obtaining function admirable at room temperature.
It is preferred according to the present invention, in step (1), the P+- Si substrate is the P of polishing+- Si substrate, the P+- Si lining
Bottom is before use, successively using enlightening health (Decon) cleaning agent, deionized water, acetone, ethyl alcohol to the P+- Si substrate is cleaned,
It reuses and is dried with nitrogen.
Substrate surface polishing is conducive to grow the higher Ta of flatness2O5Gate dielectric layer, and P+- Si substrate can direct quilt
As bottom gate.P+Cleaning after the polishing of-Si substrate can effectively improve the cleannes of substrate surface, so that growth flatness is higher
Ta2O5Gate dielectric layer promotes the performance of IAZO TFT.
The invention has the benefit that
1. it is any that the preparation method of indium aluminium zinc oxide film transistor provided by the invention does not need progress thermal annealing etc.
Regulate and control the processing of active layer carrier concentration, informative data is reliable, and experimental repeatability is strong.
2. by atomic force microscope (AFM) test it is found that the Ta of this method growth2O5Gate dielectric layer surfacing, it is coarse
Spend low (0.096nm).
3. the present invention is by exploring and optimizing Ta2O5The sputtering preparation condition of gate dielectric layer, is prepared in room temperature environment
The IAZO TFT of function admirable.
4. IAZO TFT produced by the present invention shows high electric property, while having high saturation mobility
(19.56cm2/ Vs), high switching current ratio (8.48 × 107), low threshold voltage (1.24V) and low subthreshold swing (81mV/
dec).The IAZO TFT that these outstanding performance parameters prepare this method has in the following Flexible Displays and integrated circuit
Wide application prospect.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of the IAZO TFT based on high dielectric constant gate dielectric layer.
Fig. 2 is Ta2O5The AFM of gate dielectric layer schemes.
Fig. 3 is the curve of output schematic diagram of the IAZO TFT based on high dielectric constant gate dielectric layer.
Fig. 4 is the transfer curve schematic diagram of the IAZO TFT based on high dielectric constant gate dielectric layer.
Specific embodiment
Below with reference to embodiment and Figure of description, the present invention will be further described, but not limited to this.
Embodiment 1
A kind of indium aluminium zinc oxide film transistor based on high dielectric constant gate dielectric layer, including successively set from bottom to top
The P set+- Si substrate, Ta2O5Gate dielectric layer, double active layers, source electrode and drain electrode, double active layers include successively setting from bottom to top
First layer IAZO film and second layer IAZO film are set, source electrode and drain electrode is grown on second layer IAZO film.
Ta2O5Dielectric constant with higher, Ta2O5Dielectric constant be about SiO2Six times of dielectric constant, therefore Ta2O5
Grid voltage regulation carrier ability it is stronger, required operating voltage is smaller, can effectively improve TFT operating voltage, field effect
Answer the characterisitic parameters such as mobility, subthreshold swing.
Ta2O5Gate dielectric layer with a thickness of 50-150nm；
The Ta of different-thickness2O5Gate dielectric layer is capable of providing capacitor of different sizes, and then different grid are shown to TFT
Press ability of regulation and control, suitable Ta2O5Thickness help to obtain the excellent TFT of electric property.Meanwhile suitable Ta2O5Gate dielectric layer
Thickness helps to reduce the leakage current of TFT, improves device performance.
First layer IAZO film with a thickness of 10-25nm, second layer IAZO film with a thickness of 5-20nm；
First layer IAZO film is directly contacted with insulating layer, its growth quality decides containing for device median surface defect
Amount.Suitable first layer IAZO film thickness is conducive to improve thin intramembrane carrier concentration, and then it is less, high to obtain defect
The interface of quality, to be conducive to improve device electric property.The resistivity of second layer IAZO film is higher, and changing its thickness is
The key of carrier concentration in the double IAZO active layers of Effective Regulation.If second layer IAZO film is thicker, will lead to double IAZO has
The carrier concentration of active layer entirety is relatively low, and obtained device performance can be undesirable；If second layer IAZO film is relatively thin, and it can draw
The carrier concentration for playing double IAZO active layer entirety is excessively high, and electron scattering increases, and device performance can reduce again.
The thickness of source electrode and drain electrode is 50nm, and the material of source electrode and drain electrode is Ti.Metal electrode Ti's
Work function is lower, and good Ohmic contact can be formed between IAZO active layer, improves the drift motion of electronics, and then obtain
Higher device performance.Suitable thickness of electrode help to obtain stable device performance, reduces test probe to the damage of device
Consumption.
Channel dimensions between source electrode and drain electrode: width is 1000-2000 μm, a length of 20-100 μm；Suitable channel
Size advantageously reduces the self-heating effect in channel, improves the drift motion of electronics.
Embodiment 2
A kind of indium aluminium zinc oxide film crystal based on high dielectric constant gate dielectric layer according to provided by embodiment 1
Pipe, difference place are:
Ta2O5Gate dielectric layer with a thickness of 70nm.
First layer IAZO film with a thickness of 20nm；Second layer IAZO film with a thickness of 10nm.
Channel dimensions between source electrode and drain electrode: width is 2000 μm, a length of 60 μm.
Embodiment 3
The full room temperature of indium aluminium zinc oxide film transistor based on high dielectric constant gate dielectric layer provided by embodiment 2
Preparation method, comprising:
(1) in P+Ta is grown on-Si substrate2O5Gate dielectric layer；
(2) in Ta2O5First layer IAZO film is grown on gate dielectric layer；
(3) second layer IAZO film is grown on first layer IAZO film；
(4) use electron beam evaporation, on second layer IAZO film grow source electrode and drain electrode to get.
In step (1), P+- Si substrate is the substrate polished, P+- Si substrate is before use, successively use enlightening health (Decon)
Cleaning agent, deionized water, acetone, ethyl alcohol are to P+- Si substrate is cleaned, and is reused and is dried with nitrogen.
Substrate surface has polished, and is conducive to grow the higher Ta of flatness2O5Gate dielectric layer, and P+- Si substrate can be direct
It is used as bottom gate.P+Cleaning after the polishing of-Si substrate can effectively improve the cleannes of substrate surface, in favor of grow flatness compared with
High Ta2O5Gate dielectric layer promotes the performance of IAZO TFT.
In step (1), using radio-frequency magnetron sputter method in P+Ta is grown on-Si substrate2O5Gate dielectric layer, including step is such as
Under:
A, rf magnetron sputtering chamber door is opened, substrate, Ta are put into2O5Ceramic target closes chamber door；
B, it vacuumizes, until vacuum degree is lower than 1 × 10 in chamber-5Torr；
C, the Ar/O that oxygen concentration is 5% is passed through in chamber2Mixed gas stops inflation after 1-2 minutes, this operation weight
It is 2-4 times multiple；
D, setting sputtering power is 50-200W, is passed through the Ar/O that oxygen concentration is 5%2Mixed gas, regulating gas flow velocity
To 10-25SCCM, holding office work air pressure is 3.30-3.70mTorr, and underlayer temperature is 20-28 DEG C；
E, it sputters 20-65 minutes；It is 30 minutes cooling after sputtering.
Using the preparation process of radio-frequency magnetron sputter method, it can prepare that close with target component, fine and close, homogeneity is good
Semiconductor film material, it is mutually compatible with existing FPD technique, be conducive to the full room temperature preparation of IAZO TFT.In addition, closing
Suitable growth conditions is conducive to obtain the preferable Ta of quality at room temperature2O5Gate dielectric layer.
In step (2), using radio-frequency magnetron sputter method in Ta2O5First layer IAZO film, including step are grown on gate dielectric layer
It is rapid as follows:
A, target is selected as IAZO ceramic target；It is passed through high-purity Ar in chamber, stops inflation after 1-2 minutes, this operation weight
It is 2-4 times multiple；
B, setting sputtering power is 50-200W, is passed through high-purity Ar, and regulating gas flow velocity to 13-26SCCM keeps indoor work
Making air pressure is 3.40-3.85mTorr, and underlayer temperature is 20-28 DEG C；
C, it sputters 4-14 minutes；It is 30 minutes cooling after sputtering.
In step (3), second layer IAZO film is grown on first layer IAZO film using radio-frequency magnetron sputter method, including
Steps are as follows:
A, the Ar/O that oxygen concentration is 0.75% is passed through in chamber2Mixed gas stops inflation after 1-2 minutes, this behaviour
Make to repeat 2-4 times；
B, setting sputtering power is 50-200W, is passed through the Ar/O that oxygen concentration is 0.75%2Mixed gas, regulating gas
For flow velocity to 13-26SCCM, holding office work air pressure is 3.40-3.85mTorr, and underlayer temperature is 20-28 DEG C；
C, it sputters 2-10 minutes, closes shielding power supply；
D, wait 20 minutes or more, sample is taken out, instrument is closed, sputtering process terminates；
Suitable growth conditions is conducive to the IAZO active layer for obtaining function admirable at room temperature.
Embodiment 4
Indium aluminium zinc oxide film transistor according to provided by embodiment 3 based on high dielectric constant gate dielectric layer it is complete
Room temperature preparation method, difference place are:
In step (1), using radio-frequency magnetron sputter method in P+Ta is grown on-Si substrate2O5Gate dielectric layer, including step is such as
Under:
In step C, the Ar/O that oxygen concentration is 5% is passed through in chamber2Mixed gas stops inflation after 1 minute, this behaviour
It is repeated 3 times；
In step D, setting sputtering power is 90W, is passed through the Ar/O that oxygen concentration is 5%2Mixed gas, regulating gas stream
For speed to 20SCCM, holding office work air pressure is 3.58mTorr, and underlayer temperature is 23 DEG C；
In step E, sputter 30 minutes.
In step (2), using radio-frequency magnetron sputter method in Ta2O5First layer IAZO film, including step are grown on gate dielectric layer
It is rapid as follows:
In step A, it is passed through high-purity Ar in chamber, stops inflation after 1 minute, this operation is repeated 3 times；
In step B, setting sputtering power is 90W, is passed through high-purity Ar, and regulating gas flow velocity to 20SCCM keeps indoor work
Making air pressure is 3.68mTorr, and underlayer temperature is 23 DEG C；
In step C, 8 points are sputtered 54 seconds.
In step (3), second layer IAZO film is grown on first layer IAZO film using radio-frequency magnetron sputter method, including
Steps are as follows:
In step A, the Ar/O that oxygen concentration is 0.75% is passed through in chamber2Mixed gas stops inflation after 1 minute,
This operation is repeated 3 times；
In step B, setting sputtering power is 90W, is passed through the Ar/O that oxygen concentration is 0.75%2Mixed gas adjusts gas
For body flow velocity to 20SCCM, holding office work air pressure is 3.65mTorr, and underlayer temperature is 23 DEG C；
It in step C, sputters 5 minutes, closes shielding power supply；
In step D, after waiting 30 minutes, sample is taken out, closes instrument, sputtering process terminates.
The Ta that this method is prepared2O5The surface topography of gate dielectric layer and based on high dielectric constant gate dielectric layer
The electric property of IAZO TFT is detected, analyzed and is characterized.
The structure for the IAZO TFT based on high dielectric constant gate dielectric layer being prepared is as shown in Figure 1, by above step
It is found that preparation process is simple, it is suitble to industrial application.
Using atomic force microscope (AFM) to Ta2O5Gate dielectric layer carries out surface topography and roughness test；Such as Fig. 2 institute
Show: Ta2O5Gate dielectric layer has very smooth and flat surface, and surface roughness is only 0.096nm, this is conducive to reduce interface
Influence of the defect to device performance.
Electricity is carried out to the IAZO TFT based on high dielectric constant gate dielectric layer with Agilent B2900 semiconductor analysis instrument
Performance test.As shown in Figure 3, wherein ordinate is drain current (IDS), abscissa is drain voltage (VDS), VDSVariation model
Enclosing is 0~5V, grid voltage (VGS) variation range be -1~5V；Curve a, b, c, d, e, f, g respectively indicate gate electrode voltage
Curve of output when for -1V, 0V, 1V, 2V, 3V, 4V, 5V, tetra- lines of a, b, c and d essentially coincide.Fig. 3 shows: being based on high dielectric
The operating voltage of the IAZO TFT of constant gate dielectric layer is smaller, has apparent saturated characteristic, and show fabulous Europe
Nurse contact and output characteristics, the maximum output current under 5V grid voltage are more than 0.7mA.
The transfer curve of IAZO TFT based on high dielectric constant gate dielectric layer is using Agilent B2900 semiconductor point
Analyzer measures, as shown in figure 4, ordinate is IDS, abscissa VGS, VDSSize be set as 4V, VGSVariation range be -1~
5V.Wherein solid line and dotted line respectively represent the transfer curve under logarithmic coordinates and non-logarithmic coordinate.It is situated between based on high K gate
The IAZO TFT of electric layer shows excellent transfer characteristic and switch performance under lesser grid voltage, especially with higher to open
State electric current.
The IAZO TFT items electrology characteristic parameter based on high dielectric constant gate dielectric layer of preparation is as shown in table 1:
Table 1
As shown in Table 1, the IAZO TFT based on high dielectric constant gate dielectric layer of preparation shows high electrical property
Can, while there is high saturation mobility (19.56cm2/ Vs), high switching current ratio (8.48 × 107), low threshold voltage (1.24V)
With low subthreshold swing (81mV/dec).The IAZO TFT that these outstanding performance parameters prepare this method is following flexible
Has wide application prospect in display and integrated circuit.
Claims (10)
1. a kind of indium aluminium zinc oxide film transistor based on high dielectric constant gate dielectric layer, which is characterized in that including under
To the P above set gradually+- Si substrate, Ta2O5Gate dielectric layer, double active layers, source electrode and drain electrode, double active layers include
First layer IAZO film and second layer IAZO film are set gradually from bottom to top, and the source electrode and drain electrode is arranged at described
On second layer IAZO film.
2. a kind of indium aluminium zinc oxide film transistor based on high dielectric constant gate dielectric layer according to claim 1,
It is characterized in that, the Ta2O5Gate dielectric layer with a thickness of 50-150nm；
It is further preferred that the Ta2O5Gate dielectric layer with a thickness of 70nm.
3. a kind of indium aluminium zinc oxide film transistor based on high dielectric constant gate dielectric layer according to claim 1,
It is characterized in that, the first layer IAZO film with a thickness of 10-25nm, the second layer IAZO film with a thickness of 5-
20nm；
It is further preferred that the first layer IAZO film with a thickness of 20nm；The second layer IAZO film with a thickness of
10nm。
4. a kind of indium aluminium zinc oxide film transistor based on high dielectric constant gate dielectric layer according to claim 1,
It is characterized in that, the thickness of the source electrode and drain electrode is 50nm, the material of the source electrode and drain electrode is Ti.
5. a kind of indium aluminium zinc oxide film transistor based on high dielectric constant gate dielectric layer according to claim 1,
It is characterized in that, the channel dimensions between the source electrode and drain electrode: width is 1000-2000 μm, a length of 20-100 μm；
It is further preferred that the channel dimensions between the source electrode and drain electrode: width is 2000 μm, a length of 60 μm.
6. the indium aluminium zinc oxide film crystal according to claim 1-5 based on high dielectric constant gate dielectric layer
The full room temperature preparation method of pipe characterized by comprising
(1) in the P+Ta is grown on-Si substrate2O5Gate dielectric layer；
(2) in the Ta2O5First layer IAZO film is grown on gate dielectric layer；
(3) second layer IAZO film is grown on the first layer IAZO film；
(4) on the second layer IAZO film grow source electrode and drain electrode to get.
7. the full room of the indium aluminium zinc oxide film transistor according to claim 6 based on high dielectric constant gate dielectric layer
Warm preparation method, which is characterized in that in step (1), using radio-frequency magnetron sputter method in the P+Ta is grown on-Si substrate2O5Grid
Dielectric layer comprises the following steps that
A, rf magnetron sputtering chamber door is opened, the substrate, Ta are put into2O5Ceramic target closes chamber door；
B, it vacuumizes, until vacuum degree is lower than 1 × 10 in chamber-5Torr；
C, the Ar/O that oxygen concentration is 5% is passed through in chamber2Mixed gas stops inflation after 1-2 minutes, this operation repeats 2-4
It is secondary；
D, setting sputtering power is 50-200W, is passed through the Ar/O that oxygen concentration is 5%2Mixed gas, regulating gas flow velocity to 10-
25SCCM, holding office work air pressure are 3.30-3.70mTorr, and underlayer temperature is 20-28 DEG C；
E, it sputters 20-65 minutes；It is 30 minutes cooling after sputtering；
It is further preferred that
In the step C, the Ar/O that oxygen concentration is 5% is passed through in chamber2Mixed gas stops inflation after 1 minute, this behaviour
It is repeated 3 times；
In the step D, setting sputtering power is 90W, is passed through the Ar/O that oxygen concentration is 5%2Mixed gas, regulating gas stream
For speed to 20SCCM, holding office work air pressure is 3.58mTorr, and underlayer temperature is 23 DEG C；
In the step E, sputter 30 minutes.
8. the full room of the indium aluminium zinc oxide film transistor according to claim 7 based on high dielectric constant gate dielectric layer
Warm preparation method, which is characterized in that in step (2), using radio-frequency magnetron sputter method in the Ta2O5Growth regulation on gate dielectric layer
One layer of IAZO film, comprises the following steps that
A, it is passed through high-purity Ar in chamber, stops inflation after 1-2 minutes, this operation repeats 2-4 times；
B, setting sputtering power is 50-200W, is passed through high-purity Ar, and regulating gas flow velocity to 13-26SCCM keeps office work gas
Pressure is 3.40-3.85mTorr, and underlayer temperature is 20-28 DEG C；
C, it sputters 4-14 minutes；It is 30 minutes cooling after sputtering；
It is further preferred that
In the step A, it is passed through high-purity Ar in chamber, stops inflation after 1 minute, this operation is repeated 3 times；
In the step B, setting sputtering power is 90W, is passed through high-purity Ar, and regulating gas flow velocity to 20SCCM keeps indoor work
Making air pressure is 3.68mTorr, and underlayer temperature is 23 DEG C；
In the step C, 8 points are sputtered 54 seconds.
9. the full room of the indium aluminium zinc oxide film transistor according to claim 8 based on high dielectric constant gate dielectric layer
Warm preparation method, which is characterized in that in step (3), grown on the first layer IAZO film using radio-frequency magnetron sputter method
The second layer IAZO film, comprises the following steps that
A, the Ar/O that oxygen concentration is 0.75% is passed through in chamber2Mixed gas stops inflation after 1-2 minutes, this operation repeats
2-4 times；
B, setting sputtering power is 50-200W, is passed through the Ar/O that oxygen concentration is 0.75%2Mixed gas, regulating gas flow velocity is extremely
13-26SCCM, holding office work air pressure are 3.40-3.85mTorr, and underlayer temperature is 20-28 DEG C；
C, it sputters 2-10 minutes, closes shielding power supply；
D, wait 20 minutes or more, sample is taken out, instrument is closed, sputtering process terminates；
It is further preferred that
In the step A, the Ar/O that oxygen concentration is 0.75% is passed through in chamber2Mixed gas stops inflation after 1 minute, this
Operation is repeated 3 times；
In the step B, setting sputtering power is 90W, is passed through the Ar/O that oxygen concentration is 0.75%2Mixed gas, regulating gas
For flow velocity to 20SCCM, holding office work air pressure is 3.65mTorr, and underlayer temperature is 23 DEG C；
It in the step C, sputters 5 minutes, closes shielding power supply；
In the step D, after waiting 30 minutes, sample is taken out, closes instrument, sputtering process terminates.
10. the indium aluminium zinc oxide film transistor according to claim 6 based on high dielectric constant gate dielectric layer is complete
Room temperature preparation method, which is characterized in that in step (1), the P+- Si substrate is the P of polishing+- Si substrate, the P+- Si substrate
Before use, successively using enlightening health cleaning agent, deionized water, acetone, ethyl alcohol to the P+- Si substrate is cleaned, and nitrogen is reused
Air-blowing is dry.
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