CN103956325A - Multi-layer composite oxide high-k dielectric film transistor manufacturing method - Google Patents
Multi-layer composite oxide high-k dielectric film transistor manufacturing method Download PDFInfo
- Publication number
- CN103956325A CN103956325A CN201410210984.6A CN201410210984A CN103956325A CN 103956325 A CN103956325 A CN 103956325A CN 201410210984 A CN201410210984 A CN 201410210984A CN 103956325 A CN103956325 A CN 103956325A
- Authority
- CN
- China
- Prior art keywords
- film
- gto
- film sample
- layer
- tio
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000002131 composite material Substances 0.000 title claims abstract description 24
- 238000004519 manufacturing process Methods 0.000 title abstract description 5
- 238000002360 preparation method Methods 0.000 claims abstract description 31
- 238000005516 engineering process Methods 0.000 claims abstract description 28
- 238000000034 method Methods 0.000 claims abstract description 24
- 239000004065 semiconductor Substances 0.000 claims abstract description 20
- 238000001659 ion-beam spectroscopy Methods 0.000 claims abstract description 10
- 239000000463 material Substances 0.000 claims abstract description 10
- 238000000137 annealing Methods 0.000 claims abstract description 9
- 229910052751 metal Inorganic materials 0.000 claims abstract description 9
- 239000002184 metal Substances 0.000 claims abstract description 9
- 239000010408 film Substances 0.000 claims description 83
- 239000010410 layer Substances 0.000 claims description 61
- 229910010413 TiO 2 Inorganic materials 0.000 claims description 31
- 238000000151 deposition Methods 0.000 claims description 29
- 239000010409 thin film Substances 0.000 claims description 24
- 230000008021 deposition Effects 0.000 claims description 23
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 20
- 239000007789 gas Substances 0.000 claims description 17
- 239000000758 substrate Substances 0.000 claims description 17
- 238000000231 atomic layer deposition Methods 0.000 claims description 16
- 238000004544 sputter deposition Methods 0.000 claims description 16
- 239000010936 titanium Substances 0.000 claims description 14
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 13
- 239000001301 oxygen Substances 0.000 claims description 13
- 229910052760 oxygen Inorganic materials 0.000 claims description 13
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 12
- 238000004140 cleaning Methods 0.000 claims description 11
- 229910052786 argon Inorganic materials 0.000 claims description 10
- 238000002207 thermal evaporation Methods 0.000 claims description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 8
- 238000006243 chemical reaction Methods 0.000 claims description 8
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- 229910045601 alloy Inorganic materials 0.000 claims description 7
- 239000000956 alloy Substances 0.000 claims description 7
- 229910052733 gallium Inorganic materials 0.000 claims description 7
- 229910002059 quaternary alloy Inorganic materials 0.000 claims description 7
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 6
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 6
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 6
- 238000010884 ion-beam technique Methods 0.000 claims description 6
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 5
- 239000002356 single layer Substances 0.000 claims description 5
- 229910052719 titanium Inorganic materials 0.000 claims description 5
- 239000000356 contaminant Substances 0.000 claims description 4
- 230000000694 effects Effects 0.000 claims description 4
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 claims description 3
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 3
- 239000008367 deionised water Substances 0.000 claims description 3
- 229910021641 deionized water Inorganic materials 0.000 claims description 3
- 229910001882 dioxygen Inorganic materials 0.000 claims description 3
- 238000002474 experimental method Methods 0.000 claims description 3
- 229910052757 nitrogen Inorganic materials 0.000 claims description 3
- 238000012545 processing Methods 0.000 claims description 3
- 239000012495 reaction gas Substances 0.000 claims description 3
- 230000035484 reaction time Effects 0.000 claims description 3
- 239000010935 stainless steel Substances 0.000 claims description 3
- 229910001220 stainless steel Inorganic materials 0.000 claims description 3
- 238000004506 ultrasonic cleaning Methods 0.000 claims description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 3
- 239000004411 aluminium Substances 0.000 claims description 2
- 229910052782 aluminium Inorganic materials 0.000 claims description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 2
- 239000012159 carrier gas Substances 0.000 claims description 2
- 230000001276 controlling effect Effects 0.000 claims description 2
- 230000005611 electricity Effects 0.000 claims description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 239000010931 gold Substances 0.000 claims description 2
- 239000011261 inert gas Substances 0.000 claims description 2
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- 239000000843 powder Substances 0.000 claims description 2
- 238000004064 recycling Methods 0.000 claims description 2
- 230000001105 regulatory effect Effects 0.000 claims description 2
- 230000002000 scavenging effect Effects 0.000 claims description 2
- 238000005728 strengthening Methods 0.000 claims description 2
- 239000013077 target material Substances 0.000 claims description 2
- 230000032258 transport Effects 0.000 claims description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 2
- 229910052721 tungsten Inorganic materials 0.000 claims description 2
- 239000010937 tungsten Substances 0.000 claims description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 11
- 239000003989 dielectric material Substances 0.000 description 8
- 229910004298 SiO 2 Inorganic materials 0.000 description 7
- 239000011787 zinc oxide Substances 0.000 description 5
- 239000004973 liquid crystal related substance Substances 0.000 description 4
- 238000000277 atomic layer chemical vapour deposition Methods 0.000 description 3
- 238000003877 atomic layer epitaxy Methods 0.000 description 3
- 239000011159 matrix material Substances 0.000 description 3
- 229910007541 Zn O Inorganic materials 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 125000004429 atom Chemical group 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000002349 favourable effect Effects 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- 230000005764 inhibitory process Effects 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 230000035699 permeability Effects 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 238000002834 transmittance Methods 0.000 description 2
- OPCPDIFRZGJVCE-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) titanium(4+) Chemical compound [O-2].[Zn+2].[In+3].[Ti+4] OPCPDIFRZGJVCE-UHFFFAOYSA-N 0.000 description 2
- 238000002441 X-ray diffraction Methods 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000002800 charge carrier Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 238000000280 densification Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 239000003574 free electron Substances 0.000 description 1
- 230000009931 harmful effect Effects 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 239000002086 nanomaterial Substances 0.000 description 1
- 125000004430 oxygen atom Chemical group O* 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28229—Making the insulator by deposition of a layer, e.g. metal, metal compound or poysilicon, followed by transformation thereof into an insulating layer
Abstract
The invention belongs to the semiconductor material film transistor manufacturing technical field and relates to a multi-layer composite oxide high-k dielectric film transistor manufacturing method. According to the method, a GTO multi-layer composite oxide film is grown firstly to obtain a composite film sample; then annealing is conducted on the composite film sample to accomplish the preparation of a GTO high-K dielectric layer, and then a film sample containing the GTO dielectric layer is obtained; the film sample containing the GTO dielectric layer is placed into an ion beam sputtering chamber to clean the surface of the film sample, and then the cleaned film sample is obtained; an ITZO semiconductor channel layer is deposited on the GTO dielectric layer of the cleaned film sample, and then a channel layer film sample is obtained; finally, a source metal electrode and a drain metal electrode are prepared on the channel layer film sample, and then a multi-layer composite oxide GTO high-k dielectric ITZO film transistor is obtained. The method is simple in technology, reliable in principle, low in cost, good in product performance, environmentally friendly and good in application prospects.
Description
Technical field:
The invention belongs to semiconductor material thin film transistor preparing technical field, relate to the high k dielectric of a kind of MULTILAYER COMPOSITE oxide (GTO) and novel semi-conductor channel material indium titanium zinc oxide (In-Ti-Zn-O, ITZO) preparation technology of quaternary alloy sull, the particularly transistorized preparation method of a kind of MULTILAYER COMPOSITE oxide GTO high-K medium film.
Background technology:
In recent years, thin-film transistor (Thin Film Transistor, TFT) at driven with active matrix liquid crystal display device (Active Matrix Liquid Crystal Display, AMLCD) in, brought into play important function, technology from low temperature amorphous silicon TFT to high temperature polysilicon TFT is more and more ripe, and application is also from driving LCD (Liquid Crystal Display) to develop into not only can to drive LCD but also can driving OLED (Organic Light Emitting Diodes) and Electronic Paper.Along with semiconductor process technology improves constantly, Pixel Dimensions constantly reduces, the resolution of display screen is also more and more higher, TFT is as driving the switch application of pixel in the display devices such as liquid crystal display (TFT-LCD), wherein the size of grid dielectric material energy gap determines the size of leakage current, and its relative dielectric constant determines the size (being energy consumption size) of device subthreshold swing.Along with the development of large scale integrated circuit, as the characteristic size of the metal oxide semiconductor transistor of si-substrate integrated circuit core devices, constantly reduce always, it reduces rule and follows Moore's Law.The current lithographic dimensioned 28nm that reached, CMOS grid equivalent oxide thickness drops to below 1nm, the thickness of gate oxide approaches atomic distance (IEEE Electron Device Lett.2004,25 (6): 408-410), along with equivalent oxide thickness reduce can cause tunnel effect; Research shows SiO
2thickness while reducing to 1.5nm by 3.5nm grid leakage current by 10
-12a/cm
2increase to 10A/cm
2(IEEE Electron Device Lett.1997,18 (5): 209-211), larger leakage current can cause high power consumption and corresponding heat dissipation problem, this all causes adverse influence for device integrated level, reliability and life-span, is therefore badly in need of the high dielectric material replacement traditional Si O that research and development make new advances
2.At present, extensively adopt high-k (high k) gate medium to increase capacitance density and reduce grid leakage current in MOS integrated circuit technology, high k material is because of its large dielectric constant, with SiO
2there is in the situation of same equivalent gate oxide thickness (EOT) its actual Thickness Ratio SiO
2large is many, thereby has solved SiO
2the problem producing because approaching the physical thickness limit.
The existing novel high-k dielectric material that becomes study hotspot comprises Al
2o
3(Electronical and Solid-State Letters, 12, H123,2009), Y
2o
3(Applied Surface Science.256,2245,2010),, ZrO
2(Applied Physics Letters, 99,232101,2011),, Sc
2o
3(Applied Physics Letters, 101,232109,2012), HfO
2(Journal of Applied Physics, 107,014104,2010) and Ta
2o
5(IEEE Electron Device Letters, 31,1245,2010) etc.; TFT device is film-type structure, and the dielectric constant of its gate dielectric layer, surface roughness, compactness extent are very large to the electric property of TFT.By consulting existing related article, patent, not yet find to utilize the Atomic layer deposition method of plasma enhancing to prepare Ga
2o
3, TiO
2mULTILAYER COMPOSITE oxide (GTO) is as the relevant report of thin-film transistor grid dielectric material.In GTO composite oxides, Ga
2o
3and TiO
2as two kinds of wide bandgap semiconductor (Ga
2o
3energy gap be 4.8eV, TiO
2energy gap be 3.2eV), there is the large (Ga of relative dielectric constant
2o
3dielectric constant is 10-14, TiO
2dielectric constant is 80-160) etc. advantage, its composite construction will be a kind of desirable high-k dielectric material.GTO film prepared by the technique for atomic layer deposition that utilizes plasma to strengthen is as a kind of novel high-k dielectric material, and its energy gap is 4.0eV, and relative dielectric constant reaches 30 (much larger than SiO
2dielectric constant 9 own).In addition, GTO film has very high thermal stability and breakdown field strength, and oxygen atom is had to very strong blocking capability, and therefore, the high k film of GTO prepared by the technique for atomic layer deposition that utilizes plasma to strengthen is suitable as the gate dielectric layer of thin-film transistor very much.
Ald of the prior art (Atomic Layer Deposition, ALD), be called at first atomic layer epitaxy (Atomic Layer Epitaxy, ALE), also referred to as atomic layer chemical vapor deposition (Atomic Layer Chemical Vapor Deposition, ALCVD).Adopt technique for atomic layer deposition to prepare film due to its excellent deposition uniformity and consistency, deposition parameter is as thickness, the high controllability of structure, make it in fields such as micro-nano electronics and nano materials, have a wide range of applications potentiality, therefore adopt ald preparation technology can prepare the GTO high-K medium film of high-quality and accurate thickness.But the general temperature requirement that utilizes ALD deposition techniques film reaches more than 500 ℃, and ald (the Plasma-Enhanced Atomic Layer Deposition that plasma strengthens, PE-ALD) by isoionic humidification, can make film deposition temperature greatly reduce, even at room temperature just can film forming.As a kind of technology of preparing of semiconductor channel layer, rf magnetron sputtering (Radio-Frequency Magnetron Sputtering) has that deposition velocity is fast, base material temperature rise is low, little to the damage of rete; Sputtering technology favorable repeatability can obtain the film of even thickness on large area substrates; Different metals, alloy, oxide can mix, can sputter at the first-class advantage of substrate simultaneously, industrial, be widely used, utilizing radiofrequency magnetron sputtering technology to prepare the high and reproducible new multicomponent semiconductor channel layer of reliability becomes the technology contents that industry is being inquired into.
At present, the preparation of amorphous oxides indium gallium zinc oxygen (IGZO) thin-film transistor and application technology have open source literature, and large quantity research has been done various countries by Japan and Korea S.; Doped gallium (Ga) in indium-zinc oxide (In-Zn-O, IZO) system thus be to solve the too high problem of carrier concentration for the formation in free electron too much in inhibition system and oxygen room.Consider titanium atom (Ti) and oxygen binding ability will higher than the binding ability of Ga atom and oxygen, (titanium atom has lower standard electrode EMF than gallium atom, Chinese Physics Letters, 30, 127301, 2013), can predict that in theory the IZO system of mixing Ti has the effect (concentration of charge carrier is directly connected to the OFF state power consumption size of thin-film transistor) of better inhibition carrier concentration, so a kind of novel quaternary alloy indium titanium zinc oxide (ITZO) will become a kind of transparent amorphous oxides system that gets a good eye value, thin-film transistor that the ITZO of take is channel layer has overcome carrier mobility that non-crystalline silicon tft is lower (generally at 0.1-1.0cm
2v
-1s
-1in scope) problem, thereby can accomplish high-speed, high brightness, high-contrast display screen information, ITZO film has the feature (being greater than 80% in visible light wave range transmitance) of the high grade of transparency in addition, its TFT is as the pixel switch of AMLCD, to greatly improve the aperture opening ratio of active matrix, when improving brightness, reduce power consumption.Adopt magnetron sputtering technique can realize large area film deposition, compare traditional amorphous silicon and there is higher electron mobility and homogeneity, utilize in addition process annealing technology to make its cost of manufacture cheaper, these character make its transparent electron display device field in future have very wide potential market.
Summary of the invention:
The object of the invention is to overcome the shortcoming that prior art exists, seek design and provide a kind of MULTILAYER COMPOSITE oxide high-K medium film transistorized preparation method, ald and short annealing technology that using plasma strengthens are prepared GTO (Ga
2o
3, TiO
2) MULTILAYER COMPOSITE oxide is as high K medium; At room temperature adopt novel I TZO quaternary alloy semiconductive thin film that radio frequency magnetron sputtering method prepares high permeability, high mobility as channel layer.
To achieve these goals, technical scheme of the present invention comprises following processing step:
(1), the preparation of GTO high K medium dielectric layer: adopt the [(CH that purity is 100%
3)
2gaNH
2]
3with the purity Ti[N (CH that is 100%
3)
2]
4respectively as Ga
2o
3and TiO
2presoma; The technique for atomic layer deposition growth GTO MULTILAYER COMPOSITE sull strengthening with plasma at room temperature to 600 ℃, the physical thickness of every layer is 20-40nm; Ga
2o
3and TiO
2film is preparation alternately, and total number of plies is 2-20 layer, obtains laminated film sample; By preparation laminated film sample in high-purity N
2in atmosphere, controlling temperature is 200-600 ℃ of annealing 8-12 minute, completes the preparation of GTO high K medium dielectric layer, obtains the film sample that contains GTO dielectric layer;
(2), the surface clean of film sample: the film sample that contains GTO dielectric layer is put into ion beam sputtering indoor, the Ar that adopts ion beam sputtering technology utilization to ionize out
+clean the surface of film sample, remove surface contaminant; In cleaning process, argon flow amount is 2-6SCCM; Cleaning device operating air pressure is 4 * 10
-2pa; Line is 5-20mA; Scavenging period is 50-70 second, completes the surface clean of film sample, the film sample after being cleaned;
(3), the preparation of ITZO semiconductor channel layer: utilize conventional radiofrequency magnetron sputtering technology, adopt ZnO and TiO
2alloys target and In
2o
3the mode of the double target co-sputtering of target, the ITZO semiconductor channel layer that on the GTO dielectric layer of the film sample after cleaning, room temperature deposition thickness is 20-200nm, obtains channel layer thin film sample; Wherein oxide target material powder purity is all higher than 99.99%;
(4), the preparation of source, leakage metal electrode: utilize conventional vacuum thermal evaporation preparation source, leakage metal electrode on channel layer thin film sample, obtain the ITZO thin-film transistor of the high k dielectric layer of MULTILAYER COMPOSITE oxide GTO, its threshold voltage is 0.19V, subthreshold swing is 64mV/dec, and current on/off ratio is less than 2 * 10
5, high comprehensive performance.
During employing ald (PE-ALD) deposition techniques GTO high K medium dielectric layer that step of the present invention (1) relates to, select heavy doping P type silicon 100 as substrate, by purity, be greater than the alcohol Ultrasonic Cleaning that 99.0% acetone and purity are greater than 99.0% successively, then with deionized water, repeatedly rinse, after nitrogen dries up, silicon substrate is put into deposition (PE-ALD) reative cell; Recycling ald (PE-ALD) deposition techniques GTO high K medium dielectric layer, adopting respectively purity is 100% [(CH
3)
2gaNH
2]
3with the purity Ti[N (CH that is 100%
3)
2]
4as Ga
2o
3and TiO
2presoma, inert gas Ar is as the carrier gas that transports reaction source, oxygen is as reaction gas, under the effect of plasma, Ga
2o
3and TiO
2presoma and oxygen generation chemical reaction generate Ga
2o
3and TiO
2, its depositing temperature is room temperature to 600 ℃, deposition (PE-ALD) reative cell pressure is 0.1-1Torr; Ga
2o
3and TiO
2successively growth, utilizes deposition (PE-ALD) technology on silicon substrate, first to deposit 8-12 monolayer Ga
2o
3film, then at Ga
2o
3on film, continue deposition 8-12 monolayer TiO
2film, replaces 2-20 time successively, forms the laminated film sample of 2-20 layer; Deposition one deck Ga
2o or TiO
2comprise the reaction time of film: the inertia current-carrying gas of the gallium source of 0.1-10 second or titanium source gas pulses time, 2-50 second is removed the time that the oxygen gas plasma burst length of residue time, 0.1-10 second and the inertia current-carrying gas of 2-50 second are removed residue.
It is to utilize ion beam cleaning rifle to clean the dielectric layer surface of film sample that the described employing ion beam sputtering technology of step of the present invention (2) cleans film sample surface, first the film sample that contains GTO dielectric layer is put into ion beam sputtering chamber interior, being extracted into vacuum pressure is 3 * 10
-4after Pa, pass into argon gas, heater current adds to 4A to tungsten filament preheating, after preheating completes, carries out pre-sputtering, and its beam intensity is 8-12mA, and discharge voltage is 60-80V, and operating air pressure is 4 * 10
-2pa; After pre-sputtering completes, film sample is moved to target position and carry out cleansing medium layer surface, under the experiment condition of assurance pre-sputtering, GTO film surface is cleaned to 50-60 second, effectively remove film sample surface contaminant.
Material ITZO (the In of the semiconductor channel layer that step of the present invention (3) is described
2o
3, TiO
2, ZnO) conventional radiofrequency magnetron sputtering technology room temperature preparation for quaternary alloy oxide, regulates different atom ratios in film sample by changing sputtering power, controls channel layer ITZO carrier concentration; Or by regulating argon gas, oxygen pneumatic than the resistivity and the carrier concentration that regulate ITZO film.
The vacuum thermal evaporation relating in step of the present invention (4) is to utilize stainless steel mask plate to prepare source-drain electrode, and electrode raceway groove length-width ratio is 1:4-1:20; Thermal evaporation electric current is 30-50A; The source making, leak electricity very metallic aluminium, gold, nickel electrode, thickness of electrode is 50-200nm.
The present invention compared with prior art, have the following advantages: the one, thin-film transistor medium layer completes in atomic layer deposition apparatus, the relative physics filming equipment of technique for atomic layer deposition has excellent deposition uniformity and consistency, and deposition parameter is as thickness, the high controllability of structure; With respect to other chemical methodes, technique for atomic layer deposition has film densification, film forming one after another advantages of higher; The 2nd, adopt high-purity [(CH
3)
2gaNH
2]
3and Ti[N (CH
3)
2]
4as Ga
2o
3and TiO
2raw material presoma, by control, deposit effectively control gate thickness of dielectric layers of the number of plies, the requirement of the development that meets large scale integrated circuit to accurate control device size; The 3rd, the multilayer materials GTO making belongs to novel high-k dielectric material (having no report), and energy gap is 4.0eV, and dielectric constant reaches 30 (much larger than SiO
2dielectric constant 9 own), its high dielectric property meets modern display technology completely for the requirement of high k material; And the high permeability that GTO film has itself (visible light wave range is greater than 80%) meets the requirement of transparent electronics; The 4th, GTO film is in high-purity N
2in atmosphere, short annealing is processed, and is avoiding SiO
2when producing, improved compactness and the electrical properties of GTO grid dielectric materials; The 5th, there is the sample of GTO to put into ion beam sputtering chamber growth, we utilize ion beam cleaning rifle " cleaning " GTO sample surfaces, and the interface pollution thing of avoiding GTO dielectric layer and semiconductor channel interlayer is deteriorated to TFT device property; The 6th, in thin-film transistor, semiconductor channel layer completes in rf magnetron sputtering equipment, and magnetron sputtering technique has that deposition velocity is fast, base material temperature rise is low, little to the damage of rete; Sputtering technology favorable repeatability can obtain the film of even thickness on large area substrates; Different metals, alloy, oxide can mix and simultaneously cosputtering to the first-class advantage of substrate; The 7th, with the alloy semiconductor layer of magnetically controlled sputter method deposition, be a kind of novel quaternary alloy oxide (ITZO), adopt ZTO target (ZnO, TiO
2alloys target purity is 99.99%) and In
2o
3the mode of (purity is 99.99%) target cosputtering; The high transmitance (visible light wave range is greater than 80%) that ITZO film has itself, meets the requirement of transparent electronics; Room temperature preparation condition is compatible mutually with the low temperature manufacturing technology that flat panel display requires; Quaternary alloy amorphous oxide thin film technology is conducive to improve thin film stability in addition, thereby improves TFT device stability; Its General Implementing scheme cost is low, and technique is simple, and principle is reliable, good product performance, and preparation environmental friendliness, application prospect is good, can realize large area and prepare high performance thin-film transistor.
Accompanying drawing explanation:
Fig. 1 is the structural principle schematic diagram of the GTO film prepared on substrate of the present invention.
Fig. 2 is the transistorized structural principle schematic diagram of GTO composite oxide film prepared by the present invention.
Fig. 3 is the output characteristic curve of the thin-film transistor prepared of the present invention, and wherein a is V
gS=0V; B is V
gS=10V; C is V
gS=20V; D is V
gS=30V.
Fig. 4 is the transfer characteristic curve of the thin-film transistor prepared of the present invention, and wherein a is subthreshold swing=64mV/dec; B is threshold voltage=0.19V.
Fig. 5 is that the semiconductor channel layer InTiZnO film that the present invention relates to is at the transmittance curve of visible light wave range.
Fig. 6 is X-ray diffraction (XRD) collection of illustrative plates of the semiconductor channel layer InTiZnO film that the present invention relates to, and ITZO film is noncrystalline state.
Embodiment:
Below by specific embodiment, also further illustrate by reference to the accompanying drawings the present invention.
Embodiment 1:
The present embodiment is prepared a kind of MULTILAYER COMPOSITE oxide GTO high-K medium film transistor of bottom grating structure, and its concrete preparation process is:
(1) adopt technique for atomic layer deposition to prepare GTO high-K medium film, referring to Fig. 1:
Step 1: select P type silicon 100 as substrate, use successively acetone, alcohol Ultrasonic Cleaning substrate each 5 minutes, after repeatedly rinsing with deionized water, high pure nitrogen dries up, and obtains clean substrate;
Step 2: the high k dielectric layer of preparation GTO: clean substrate is put into PE-ALD reaction chamber immediately, is 200 ℃ in temperature, under the condition that reaction chamber pressure is 0.1Torr, with Ti[N (CH
3)
2]
4as the presoma of titanium, [(CH
3)
2gaNH
2]
3as the presoma of gallium, oxygen is as the reaction gas of plasma oxygen, and argon gas is as current-carrying gas, adopts grow on P type (100) the silicon substrate GTO dielectric layer of 36nm of PE-ALD technology; The deposit of GTO is based on [(CH
3)
2gaNH
2]
3, Ti[N (CH
3)
2]
4and the chemical reaction between oxygen:
Ti[N (CH
3)
2]
4+ O
2→ TiO
2+ product
[(CH
3)
2gaNH
2]
3+ O
2→ Ga
2o
3+ product
When forming GTO high K medium layer, monolayer number of deposition cycles is elected as 100 times; Comprise the reaction time of a GTO of deposition: Ti[N (CH
3)
2]
4or [(CH
3)
2gaNH
2]
3burst length t
1it is 1 second; It is t that argon gas is removed the residual gas time
2=50 seconds; The oxygen gas plasma burst length is t
3=1 second; The time that argon gas is removed residual oxygen and reflection product is t
4=50 seconds; The required time of reaction of a GTO of deposition is T=t
1+ t
2+ t
3+ t
4=102 seconds;
Step 3: in high-purity N
2under atmosphere, GTO film sample is carried out to short annealing processing, annealing temperature is 500 ℃, 30 ℃ of programming rate per minutes, and annealing time is 10 minutes;
(2) ion beam cleaning rifle cleans dielectric layer surface:
Step 1: pre-sputtering, GTO sample is put into ion beam chamber inside, high vacuum (3 * 10 to be extracted into
-4pa) after, pass into 4SCCM argon gas, heater current adds to 4A, and discharge voltage is 70V, preheating 5 minutes, and after preheating completes, pre-sputtering is 10 minutes, and now beam intensity is 10mA, and discharge voltage is 70V, and operating air pressure is 4 * 10
-2pa;
Step 2: clean GTO dielectric layer, sample is moved to corresponding target position and test, under the experiment condition of assurance pre-sputtering, GTO film surface is cleaned 1 minute;
Step 3: after to be cleaned in high vacuum (3 * 10
-4pa) under, in being directly transported to magnetron sputtering chamber, ion beam chamber specimen holder, effectively avoid impurity in air to drop down onto the harmful effect that interface causes in sample;
(3) prepare ITZO channel layer: select ITZO channel layer growth parameter(s): background air pressure is 1-2 * 10
-4pa; Target component is ZnO+TiO
2alloys target and In
2o
3target, ZnO and TiO
2purity be 99.99%, In
2o
3purity be 99.99%; Sputtering power is ZTO=70W, In
2o
3=50W; Sputter gas is that Ar flow is 60SCCM, O
2flow is 2.5SCCM; Growth air pressure is 1Pa; Growth temperature is room temperature; Growth time is 20min; Film thickness is 120nm;
(4) adopt the method for vacuum thermal evaporation to prepare source, leak metal electrode: by the mode of thermal evaporation, above ITZO channel layer, with the stainless steel mask plate that breadth length ratio is 1000/100 μ m, prepare the metallic nickel electrode that 100nm is thick, thermal evaporation electric current is 50A;
(5) thin-film transistor of the Ni/ITZO/GTO/Si structure (Fig. 2) of making is tested; The InTiZnO thin-film transistor TFT device of making is tested to (Keithley2612A), and output, transfer characteristic curve are tested as shown in Figure 3,4; ITZO film utilizes Shimadzu UV-2550 test to obtain at the transmittance curve (Fig. 5) of visible ray; The crystallization degree of ITZO film as shown in Figure 6.
Claims (5)
1. the transistorized preparation method of MULTILAYER COMPOSITE oxide high-K medium film, is characterized in that comprising following processing step:
(1), the preparation of GTO high K medium dielectric layer: adopt the [(CH that purity is 100%
3)
2gaNH
2]
3with the purity Ti[N (CH that is 100%
3)
2]
4respectively as Ga
2o
3and TiO
2presoma; The technique for atomic layer deposition growth GTO MULTILAYER COMPOSITE sull strengthening with plasma at room temperature to 600 ℃, the physical thickness of every layer film is 20-40nm; Ga
2o
3and TiO
2film is preparation alternately, and total number of plies is 2-20 layer, obtains laminated film sample; By preparation laminated film sample in high-purity N
2in atmosphere, controlling temperature is 200-600 ℃ of annealing 8-12 minute, completes the preparation of GTO high K medium dielectric layer, obtains the film sample that contains GTO dielectric layer;
(2), the surface clean of film sample: the film sample that contains GTO dielectric layer is put into ion beam sputtering indoor, the Ar that adopts ion beam sputtering technology utilization to ionize out
+clean the surface of film sample, remove surface contaminant; In cleaning process, argon flow amount is 2-6SCCM; Cleaning device operating air pressure is 4 * 10
-2pa; Line is 5-20mA; Scavenging period is 50-70 second, completes the surface clean of film sample, the film sample after being cleaned;
(3), the preparation of ITZO semiconductor channel layer: utilize conventional radiofrequency magnetron sputtering technology, adopt ZnO and TiO
2alloys target and In
2o
3the mode of the double target co-sputtering of target, the ITZO semiconductor channel layer that on the GTO dielectric layer of the film sample after cleaning, room temperature deposition thickness is 20-200nm, obtains channel layer thin film sample; Wherein oxide target material powder purity is all higher than 99.99%;
(4), the preparation of source, leakage metal electrode: utilize conventional vacuum thermal evaporation preparation source, leakage metal electrode on channel layer thin film sample, obtain the ITZO thin-film transistor of the high k dielectric layer of MULTILAYER COMPOSITE oxide GTO, its threshold voltage is 0.19V, subthreshold swing is 64mV/dec, and current on/off ratio is less than 2 * 10
5, high comprehensive performance.
2. the transistorized preparation method of MULTILAYER COMPOSITE oxide high-K medium film according to claim 1, while it is characterized in that employing technique for atomic layer deposition deposition GTO high K medium dielectric layer that step (1) relates to, select heavy doping P type silicon 100 as substrate, by purity, be greater than the alcohol Ultrasonic Cleaning that 99.0% acetone and purity are greater than 99.0% successively, then with deionized water, repeatedly rinse, after nitrogen dries up, silicon substrate is put into cvd reactive chamber; Recycling technique for atomic layer deposition deposition GTO high K medium dielectric layer, adopting respectively purity is 100% [(CH
3)
2gaNH
2]
3with the purity Ti[N (CH that is 100%
3)
2]
4as Ga
2o
3and TiO
2presoma, inert gas Ar is as the carrier gas that transports reaction source, oxygen is as reaction gas, under the effect of plasma, Ga
2o
3and TiO
2presoma and oxygen generation chemical reaction generate Ga
2o
3and TiO
2, its depositing temperature is room temperature to 600 ℃, cvd reactive chamber pressure is 0.1-1Torr; Ga
2o
3and TiO
2successively growth, utilizes deposition technique on silicon substrate, first to deposit 8-12 monolayer Ga
2o
3film, then at Ga
2o
3on film, continue deposition 8-12 monolayer TiO
2film, replaces 2-20 time successively, forms the laminated film sample of 2-20 layer; Deposition one deck Ga
2o or TiO
2comprise the reaction time of film: the inertia current-carrying gas of the gallium source of 0.1-10 second or titanium source gas pulses time, 2-50 second is removed the time that the oxygen gas plasma burst length of residue time, 0.1-10 second and the inertia current-carrying gas of 2-50 second are removed residue.
3. the transistorized preparation method of MULTILAYER COMPOSITE oxide high-K medium film according to claim 1, it is characterized in that it is to utilize ion beam cleaning rifle to clean the dielectric layer surface of film sample that the described employing ion beam sputtering technology of step (2) cleans film sample surface, first the film sample that contains GTO dielectric layer is put into ion beam sputtering chamber interior, being extracted into vacuum pressure is 3 * 10
-4after Pa, pass into argon gas, heater current adds to 4A to tungsten filament preheating, after preheating completes, carries out pre-sputtering, and its beam intensity is 8-12mA, and discharge voltage is 60-80V, and operating air pressure is 4 * 10
-2pa; After pre-sputtering completes, film sample is moved to target position and carry out cleansing medium layer surface, under the experiment condition of assurance pre-sputtering, GTO film surface is cleaned to 50-60 second, effectively remove film sample surface contaminant.
4. the transistorized preparation method of MULTILAYER COMPOSITE oxide high-K medium film according to claim 1, is characterized in that the material ITZO quaternary alloy oxide of the semiconductor channel layer that step (3) is described adopts In
2o
3, TiO
2with conventional radiofrequency magnetron sputtering technology room temperature preparation for ZnO, by changing sputtering power, regulate different atom ratios in film sample, control channel layer ITZO carrier concentration; Or by regulating argon gas, oxygen pneumatic than the resistivity and the carrier concentration that regulate ITZO film.
5. be In
2o
3, TiO
2be to utilize stainless steel mask plate to prepare source-drain electrode with the vacuum thermal evaporation relating in ZnO step (4), electrode raceway groove length-width ratio is 1:4-1:20; Thermal evaporation electric current is 30-50A; The source making, leak electricity very metallic aluminium, gold, nickel electrode, thickness of electrode is 50-200nm.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410210984.6A CN103956325B (en) | 2014-05-19 | 2014-05-19 | The preparation method of a kind of MULTILAYER COMPOSITE oxide compound high K medium thin film transistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410210984.6A CN103956325B (en) | 2014-05-19 | 2014-05-19 | The preparation method of a kind of MULTILAYER COMPOSITE oxide compound high K medium thin film transistor |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103956325A true CN103956325A (en) | 2014-07-30 |
CN103956325B CN103956325B (en) | 2016-06-01 |
Family
ID=51333582
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201410210984.6A Expired - Fee Related CN103956325B (en) | 2014-05-19 | 2014-05-19 | The preparation method of a kind of MULTILAYER COMPOSITE oxide compound high K medium thin film transistor |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN103956325B (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2017031193A1 (en) * | 2015-08-20 | 2017-02-23 | The Hong Kong University Of Science And Technology | Organic-inorganic perovskite materials and optoelectronic devices fabricated by close space sublimation |
CN108893725A (en) * | 2018-08-06 | 2018-11-27 | 吉林大学 | A method of uniform mixing of metal oxide is grown using multistep technique for atomic layer deposition |
CN113394075A (en) * | 2021-05-10 | 2021-09-14 | 上海华力集成电路制造有限公司 | high-K dielectric layer repairing method |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060102968A1 (en) * | 2004-11-15 | 2006-05-18 | International Business Machines Corporation | Nitrogen-containing field effect transistor gate stack containing a threshold voltage control layer formed via deposition of a metal oxide |
US20120061663A1 (en) * | 2010-09-13 | 2012-03-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
CN103117226A (en) * | 2013-02-04 | 2013-05-22 | 青岛大学 | Production method of alloy oxide thin-film transistor |
WO2013084029A1 (en) * | 2011-12-08 | 2013-06-13 | Ecole Polytechnique Federale De Lausanne (Epfl) | Semiconductor electrode comprising a blocking layer |
-
2014
- 2014-05-19 CN CN201410210984.6A patent/CN103956325B/en not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060102968A1 (en) * | 2004-11-15 | 2006-05-18 | International Business Machines Corporation | Nitrogen-containing field effect transistor gate stack containing a threshold voltage control layer formed via deposition of a metal oxide |
US20120061663A1 (en) * | 2010-09-13 | 2012-03-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
WO2013084029A1 (en) * | 2011-12-08 | 2013-06-13 | Ecole Polytechnique Federale De Lausanne (Epfl) | Semiconductor electrode comprising a blocking layer |
CN103117226A (en) * | 2013-02-04 | 2013-05-22 | 青岛大学 | Production method of alloy oxide thin-film transistor |
Non-Patent Citations (1)
Title |
---|
G.X.LIU等: "Nanomixed Ti2-Ga2O3 thin films grown by plasma enhanced atomic layer deposistion (PEALD) method", 《INTERGRATED FERROELECTRICS》 * |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2017031193A1 (en) * | 2015-08-20 | 2017-02-23 | The Hong Kong University Of Science And Technology | Organic-inorganic perovskite materials and optoelectronic devices fabricated by close space sublimation |
US10381564B2 (en) * | 2015-08-20 | 2019-08-13 | The Hong Kong University Of Science And Technology | Organic-inorganic perovskite materials and optoelectronic devices fabricated by close space sublimation |
CN108893725A (en) * | 2018-08-06 | 2018-11-27 | 吉林大学 | A method of uniform mixing of metal oxide is grown using multistep technique for atomic layer deposition |
CN108893725B (en) * | 2018-08-06 | 2020-08-04 | 吉林大学 | Method for growing uniform mixed metal oxide by using multi-step atomic layer deposition technology |
CN113394075A (en) * | 2021-05-10 | 2021-09-14 | 上海华力集成电路制造有限公司 | high-K dielectric layer repairing method |
Also Published As
Publication number | Publication date |
---|---|
CN103956325B (en) | 2016-06-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Huang et al. | High-mobility solution-processed tin oxide thin-film transistors with high-κ alumina dielectric working in enhancement mode | |
CN103258857B (en) | Field-effect transistor using oxide semiconductor and method for manufacturing same | |
JP5307144B2 (en) | Field effect transistor, manufacturing method thereof, and sputtering target | |
JP5395994B2 (en) | Semiconductor thin film, manufacturing method thereof, and thin film transistor | |
JP6296463B2 (en) | Thin film transistor and manufacturing method thereof | |
WO2011132644A1 (en) | Oxide for semiconductor layer of thin-film transistor, sputtering target, and thin-film transistor | |
CN103117226B (en) | Production method of alloy oxide thin-film transistor | |
CN103765596A (en) | Thin film transistor | |
JP2012114367A (en) | Amorphous oxide thin film including tin and thin film transistor | |
CN105489486A (en) | Method for preparing thin-film transistor based on ultra-thin magnesium oxide high-k dielectric layer | |
CN103928350B (en) | The transistorized preparation method of a kind of double channel layer film | |
CN104992981B (en) | Oxide thin film transistor and preparation method thereof and phase inverter and preparation method thereof | |
CN103943683A (en) | Indium tin zinc oxide homogeneous thin film transistor and preparation method thereof | |
Wang et al. | Solution-driven HfLaO x-based gate dielectrics for thin film transistors and unipolar inverters | |
CN103956325B (en) | The preparation method of a kind of MULTILAYER COMPOSITE oxide compound high K medium thin film transistor | |
Zhu et al. | Water-derived all-oxide thin-film transistors with ZrAlO x gate dielectrics and exploration in digital circuits | |
CN109273352A (en) | A kind of preparation method of the polynary amorphous metal oxide thin film transistor (TFT) of high-performance | |
JP5702447B2 (en) | Semiconductor thin film, manufacturing method thereof, and thin film transistor | |
CN107452810A (en) | A kind of metal oxide thin-film transistor and preparation method thereof | |
CN105679680A (en) | Preparation method for high-k ytterbium oxide dielectric film and application of same in thin film transistor | |
Zhang et al. | Performance Analysis of Solution Treatment Amorphous Oxide Semiconductor Switching Devices for Display Backplanes | |
Shi et al. | Fully-transparent Mo-doped ZnO TFTs fabricated in different oxygen partial pressure at low temperature | |
Zhao et al. | IGZO-TFT with High-k HfO2 Dielectric Layer on Flexible Substrate Prepared by In-line HiPIMS System at Room Temperature | |
CN105552130B (en) | A kind of preparation method based on the high k dielectric layer thin film transistor (TFT) of ultra-thin lithia | |
Song et al. | Comparative study of InGaZnO thin-film transistors with single and dual NbLaO gate dielectric layers |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160601 Termination date: 20210519 |