CN103956325A - Multi-layer composite oxide high-k dielectric film transistor manufacturing method - Google Patents

Multi-layer composite oxide high-k dielectric film transistor manufacturing method Download PDF

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CN103956325A
CN103956325A CN201410210984.6A CN201410210984A CN103956325A CN 103956325 A CN103956325 A CN 103956325A CN 201410210984 A CN201410210984 A CN 201410210984A CN 103956325 A CN103956325 A CN 103956325A
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gto
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tio
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CN103956325B (en
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单福凯
刘国侠
刘奥
谭惠月
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Qingdao University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28229Making the insulator by deposition of a layer, e.g. metal, metal compound or poysilicon, followed by transformation thereof into an insulating layer

Abstract

The invention belongs to the semiconductor material film transistor manufacturing technical field and relates to a multi-layer composite oxide high-k dielectric film transistor manufacturing method. According to the method, a GTO multi-layer composite oxide film is grown firstly to obtain a composite film sample; then annealing is conducted on the composite film sample to accomplish the preparation of a GTO high-K dielectric layer, and then a film sample containing the GTO dielectric layer is obtained; the film sample containing the GTO dielectric layer is placed into an ion beam sputtering chamber to clean the surface of the film sample, and then the cleaned film sample is obtained; an ITZO semiconductor channel layer is deposited on the GTO dielectric layer of the cleaned film sample, and then a channel layer film sample is obtained; finally, a source metal electrode and a drain metal electrode are prepared on the channel layer film sample, and then a multi-layer composite oxide GTO high-k dielectric ITZO film transistor is obtained. The method is simple in technology, reliable in principle, low in cost, good in product performance, environmentally friendly and good in application prospects.

Description

The transistorized preparation method of a kind of MULTILAYER COMPOSITE oxide high-K medium film
Technical field:
The invention belongs to semiconductor material thin film transistor preparing technical field, relate to the high k dielectric of a kind of MULTILAYER COMPOSITE oxide (GTO) and novel semi-conductor channel material indium titanium zinc oxide (In-Ti-Zn-O, ITZO) preparation technology of quaternary alloy sull, the particularly transistorized preparation method of a kind of MULTILAYER COMPOSITE oxide GTO high-K medium film.
Background technology:
In recent years, thin-film transistor (Thin Film Transistor, TFT) at driven with active matrix liquid crystal display device (Active Matrix Liquid Crystal Display, AMLCD) in, brought into play important function, technology from low temperature amorphous silicon TFT to high temperature polysilicon TFT is more and more ripe, and application is also from driving LCD (Liquid Crystal Display) to develop into not only can to drive LCD but also can driving OLED (Organic Light Emitting Diodes) and Electronic Paper.Along with semiconductor process technology improves constantly, Pixel Dimensions constantly reduces, the resolution of display screen is also more and more higher, TFT is as driving the switch application of pixel in the display devices such as liquid crystal display (TFT-LCD), wherein the size of grid dielectric material energy gap determines the size of leakage current, and its relative dielectric constant determines the size (being energy consumption size) of device subthreshold swing.Along with the development of large scale integrated circuit, as the characteristic size of the metal oxide semiconductor transistor of si-substrate integrated circuit core devices, constantly reduce always, it reduces rule and follows Moore's Law.The current lithographic dimensioned 28nm that reached, CMOS grid equivalent oxide thickness drops to below 1nm, the thickness of gate oxide approaches atomic distance (IEEE Electron Device Lett.2004,25 (6): 408-410), along with equivalent oxide thickness reduce can cause tunnel effect; Research shows SiO 2thickness while reducing to 1.5nm by 3.5nm grid leakage current by 10 -12a/cm 2increase to 10A/cm 2(IEEE Electron Device Lett.1997,18 (5): 209-211), larger leakage current can cause high power consumption and corresponding heat dissipation problem, this all causes adverse influence for device integrated level, reliability and life-span, is therefore badly in need of the high dielectric material replacement traditional Si O that research and development make new advances 2.At present, extensively adopt high-k (high k) gate medium to increase capacitance density and reduce grid leakage current in MOS integrated circuit technology, high k material is because of its large dielectric constant, with SiO 2there is in the situation of same equivalent gate oxide thickness (EOT) its actual Thickness Ratio SiO 2large is many, thereby has solved SiO 2the problem producing because approaching the physical thickness limit.
The existing novel high-k dielectric material that becomes study hotspot comprises Al 2o 3(Electronical and Solid-State Letters, 12, H123,2009), Y 2o 3(Applied Surface Science.256,2245,2010),, ZrO 2(Applied Physics Letters, 99,232101,2011),, Sc 2o 3(Applied Physics Letters, 101,232109,2012), HfO 2(Journal of Applied Physics, 107,014104,2010) and Ta 2o 5(IEEE Electron Device Letters, 31,1245,2010) etc.; TFT device is film-type structure, and the dielectric constant of its gate dielectric layer, surface roughness, compactness extent are very large to the electric property of TFT.By consulting existing related article, patent, not yet find to utilize the Atomic layer deposition method of plasma enhancing to prepare Ga 2o 3, TiO 2mULTILAYER COMPOSITE oxide (GTO) is as the relevant report of thin-film transistor grid dielectric material.In GTO composite oxides, Ga 2o 3and TiO 2as two kinds of wide bandgap semiconductor (Ga 2o 3energy gap be 4.8eV, TiO 2energy gap be 3.2eV), there is the large (Ga of relative dielectric constant 2o 3dielectric constant is 10-14, TiO 2dielectric constant is 80-160) etc. advantage, its composite construction will be a kind of desirable high-k dielectric material.GTO film prepared by the technique for atomic layer deposition that utilizes plasma to strengthen is as a kind of novel high-k dielectric material, and its energy gap is 4.0eV, and relative dielectric constant reaches 30 (much larger than SiO 2dielectric constant 9 own).In addition, GTO film has very high thermal stability and breakdown field strength, and oxygen atom is had to very strong blocking capability, and therefore, the high k film of GTO prepared by the technique for atomic layer deposition that utilizes plasma to strengthen is suitable as the gate dielectric layer of thin-film transistor very much.
Ald of the prior art (Atomic Layer Deposition, ALD), be called at first atomic layer epitaxy (Atomic Layer Epitaxy, ALE), also referred to as atomic layer chemical vapor deposition (Atomic Layer Chemical Vapor Deposition, ALCVD).Adopt technique for atomic layer deposition to prepare film due to its excellent deposition uniformity and consistency, deposition parameter is as thickness, the high controllability of structure, make it in fields such as micro-nano electronics and nano materials, have a wide range of applications potentiality, therefore adopt ald preparation technology can prepare the GTO high-K medium film of high-quality and accurate thickness.But the general temperature requirement that utilizes ALD deposition techniques film reaches more than 500 ℃, and ald (the Plasma-Enhanced Atomic Layer Deposition that plasma strengthens, PE-ALD) by isoionic humidification, can make film deposition temperature greatly reduce, even at room temperature just can film forming.As a kind of technology of preparing of semiconductor channel layer, rf magnetron sputtering (Radio-Frequency Magnetron Sputtering) has that deposition velocity is fast, base material temperature rise is low, little to the damage of rete; Sputtering technology favorable repeatability can obtain the film of even thickness on large area substrates; Different metals, alloy, oxide can mix, can sputter at the first-class advantage of substrate simultaneously, industrial, be widely used, utilizing radiofrequency magnetron sputtering technology to prepare the high and reproducible new multicomponent semiconductor channel layer of reliability becomes the technology contents that industry is being inquired into.
At present, the preparation of amorphous oxides indium gallium zinc oxygen (IGZO) thin-film transistor and application technology have open source literature, and large quantity research has been done various countries by Japan and Korea S.; Doped gallium (Ga) in indium-zinc oxide (In-Zn-O, IZO) system thus be to solve the too high problem of carrier concentration for the formation in free electron too much in inhibition system and oxygen room.Consider titanium atom (Ti) and oxygen binding ability will higher than the binding ability of Ga atom and oxygen, (titanium atom has lower standard electrode EMF than gallium atom, Chinese Physics Letters, 30, 127301, 2013), can predict that in theory the IZO system of mixing Ti has the effect (concentration of charge carrier is directly connected to the OFF state power consumption size of thin-film transistor) of better inhibition carrier concentration, so a kind of novel quaternary alloy indium titanium zinc oxide (ITZO) will become a kind of transparent amorphous oxides system that gets a good eye value, thin-film transistor that the ITZO of take is channel layer has overcome carrier mobility that non-crystalline silicon tft is lower (generally at 0.1-1.0cm 2v -1s -1in scope) problem, thereby can accomplish high-speed, high brightness, high-contrast display screen information, ITZO film has the feature (being greater than 80% in visible light wave range transmitance) of the high grade of transparency in addition, its TFT is as the pixel switch of AMLCD, to greatly improve the aperture opening ratio of active matrix, when improving brightness, reduce power consumption.Adopt magnetron sputtering technique can realize large area film deposition, compare traditional amorphous silicon and there is higher electron mobility and homogeneity, utilize in addition process annealing technology to make its cost of manufacture cheaper, these character make its transparent electron display device field in future have very wide potential market.
Summary of the invention:
The object of the invention is to overcome the shortcoming that prior art exists, seek design and provide a kind of MULTILAYER COMPOSITE oxide high-K medium film transistorized preparation method, ald and short annealing technology that using plasma strengthens are prepared GTO (Ga 2o 3, TiO 2) MULTILAYER COMPOSITE oxide is as high K medium; At room temperature adopt novel I TZO quaternary alloy semiconductive thin film that radio frequency magnetron sputtering method prepares high permeability, high mobility as channel layer.
To achieve these goals, technical scheme of the present invention comprises following processing step:
(1), the preparation of GTO high K medium dielectric layer: adopt the [(CH that purity is 100% 3) 2gaNH 2] 3with the purity Ti[N (CH that is 100% 3) 2] 4respectively as Ga 2o 3and TiO 2presoma; The technique for atomic layer deposition growth GTO MULTILAYER COMPOSITE sull strengthening with plasma at room temperature to 600 ℃, the physical thickness of every layer is 20-40nm; Ga 2o 3and TiO 2film is preparation alternately, and total number of plies is 2-20 layer, obtains laminated film sample; By preparation laminated film sample in high-purity N 2in atmosphere, controlling temperature is 200-600 ℃ of annealing 8-12 minute, completes the preparation of GTO high K medium dielectric layer, obtains the film sample that contains GTO dielectric layer;
(2), the surface clean of film sample: the film sample that contains GTO dielectric layer is put into ion beam sputtering indoor, the Ar that adopts ion beam sputtering technology utilization to ionize out +clean the surface of film sample, remove surface contaminant; In cleaning process, argon flow amount is 2-6SCCM; Cleaning device operating air pressure is 4 * 10 -2pa; Line is 5-20mA; Scavenging period is 50-70 second, completes the surface clean of film sample, the film sample after being cleaned;
(3), the preparation of ITZO semiconductor channel layer: utilize conventional radiofrequency magnetron sputtering technology, adopt ZnO and TiO 2alloys target and In 2o 3the mode of the double target co-sputtering of target, the ITZO semiconductor channel layer that on the GTO dielectric layer of the film sample after cleaning, room temperature deposition thickness is 20-200nm, obtains channel layer thin film sample; Wherein oxide target material powder purity is all higher than 99.99%;
(4), the preparation of source, leakage metal electrode: utilize conventional vacuum thermal evaporation preparation source, leakage metal electrode on channel layer thin film sample, obtain the ITZO thin-film transistor of the high k dielectric layer of MULTILAYER COMPOSITE oxide GTO, its threshold voltage is 0.19V, subthreshold swing is 64mV/dec, and current on/off ratio is less than 2 * 10 5, high comprehensive performance.
During employing ald (PE-ALD) deposition techniques GTO high K medium dielectric layer that step of the present invention (1) relates to, select heavy doping P type silicon 100 as substrate, by purity, be greater than the alcohol Ultrasonic Cleaning that 99.0% acetone and purity are greater than 99.0% successively, then with deionized water, repeatedly rinse, after nitrogen dries up, silicon substrate is put into deposition (PE-ALD) reative cell; Recycling ald (PE-ALD) deposition techniques GTO high K medium dielectric layer, adopting respectively purity is 100% [(CH 3) 2gaNH 2] 3with the purity Ti[N (CH that is 100% 3) 2] 4as Ga 2o 3and TiO 2presoma, inert gas Ar is as the carrier gas that transports reaction source, oxygen is as reaction gas, under the effect of plasma, Ga 2o 3and TiO 2presoma and oxygen generation chemical reaction generate Ga 2o 3and TiO 2, its depositing temperature is room temperature to 600 ℃, deposition (PE-ALD) reative cell pressure is 0.1-1Torr; Ga 2o 3and TiO 2successively growth, utilizes deposition (PE-ALD) technology on silicon substrate, first to deposit 8-12 monolayer Ga 2o 3film, then at Ga 2o 3on film, continue deposition 8-12 monolayer TiO 2film, replaces 2-20 time successively, forms the laminated film sample of 2-20 layer; Deposition one deck Ga 2o or TiO 2comprise the reaction time of film: the inertia current-carrying gas of the gallium source of 0.1-10 second or titanium source gas pulses time, 2-50 second is removed the time that the oxygen gas plasma burst length of residue time, 0.1-10 second and the inertia current-carrying gas of 2-50 second are removed residue.
It is to utilize ion beam cleaning rifle to clean the dielectric layer surface of film sample that the described employing ion beam sputtering technology of step of the present invention (2) cleans film sample surface, first the film sample that contains GTO dielectric layer is put into ion beam sputtering chamber interior, being extracted into vacuum pressure is 3 * 10 -4after Pa, pass into argon gas, heater current adds to 4A to tungsten filament preheating, after preheating completes, carries out pre-sputtering, and its beam intensity is 8-12mA, and discharge voltage is 60-80V, and operating air pressure is 4 * 10 -2pa; After pre-sputtering completes, film sample is moved to target position and carry out cleansing medium layer surface, under the experiment condition of assurance pre-sputtering, GTO film surface is cleaned to 50-60 second, effectively remove film sample surface contaminant.
Material ITZO (the In of the semiconductor channel layer that step of the present invention (3) is described 2o 3, TiO 2, ZnO) conventional radiofrequency magnetron sputtering technology room temperature preparation for quaternary alloy oxide, regulates different atom ratios in film sample by changing sputtering power, controls channel layer ITZO carrier concentration; Or by regulating argon gas, oxygen pneumatic than the resistivity and the carrier concentration that regulate ITZO film.
The vacuum thermal evaporation relating in step of the present invention (4) is to utilize stainless steel mask plate to prepare source-drain electrode, and electrode raceway groove length-width ratio is 1:4-1:20; Thermal evaporation electric current is 30-50A; The source making, leak electricity very metallic aluminium, gold, nickel electrode, thickness of electrode is 50-200nm.
The present invention compared with prior art, have the following advantages: the one, thin-film transistor medium layer completes in atomic layer deposition apparatus, the relative physics filming equipment of technique for atomic layer deposition has excellent deposition uniformity and consistency, and deposition parameter is as thickness, the high controllability of structure; With respect to other chemical methodes, technique for atomic layer deposition has film densification, film forming one after another advantages of higher; The 2nd, adopt high-purity [(CH 3) 2gaNH 2] 3and Ti[N (CH 3) 2] 4as Ga 2o 3and TiO 2raw material presoma, by control, deposit effectively control gate thickness of dielectric layers of the number of plies, the requirement of the development that meets large scale integrated circuit to accurate control device size; The 3rd, the multilayer materials GTO making belongs to novel high-k dielectric material (having no report), and energy gap is 4.0eV, and dielectric constant reaches 30 (much larger than SiO 2dielectric constant 9 own), its high dielectric property meets modern display technology completely for the requirement of high k material; And the high permeability that GTO film has itself (visible light wave range is greater than 80%) meets the requirement of transparent electronics; The 4th, GTO film is in high-purity N 2in atmosphere, short annealing is processed, and is avoiding SiO 2when producing, improved compactness and the electrical properties of GTO grid dielectric materials; The 5th, there is the sample of GTO to put into ion beam sputtering chamber growth, we utilize ion beam cleaning rifle " cleaning " GTO sample surfaces, and the interface pollution thing of avoiding GTO dielectric layer and semiconductor channel interlayer is deteriorated to TFT device property; The 6th, in thin-film transistor, semiconductor channel layer completes in rf magnetron sputtering equipment, and magnetron sputtering technique has that deposition velocity is fast, base material temperature rise is low, little to the damage of rete; Sputtering technology favorable repeatability can obtain the film of even thickness on large area substrates; Different metals, alloy, oxide can mix and simultaneously cosputtering to the first-class advantage of substrate; The 7th, with the alloy semiconductor layer of magnetically controlled sputter method deposition, be a kind of novel quaternary alloy oxide (ITZO), adopt ZTO target (ZnO, TiO 2alloys target purity is 99.99%) and In 2o 3the mode of (purity is 99.99%) target cosputtering; The high transmitance (visible light wave range is greater than 80%) that ITZO film has itself, meets the requirement of transparent electronics; Room temperature preparation condition is compatible mutually with the low temperature manufacturing technology that flat panel display requires; Quaternary alloy amorphous oxide thin film technology is conducive to improve thin film stability in addition, thereby improves TFT device stability; Its General Implementing scheme cost is low, and technique is simple, and principle is reliable, good product performance, and preparation environmental friendliness, application prospect is good, can realize large area and prepare high performance thin-film transistor.
Accompanying drawing explanation:
Fig. 1 is the structural principle schematic diagram of the GTO film prepared on substrate of the present invention.
Fig. 2 is the transistorized structural principle schematic diagram of GTO composite oxide film prepared by the present invention.
Fig. 3 is the output characteristic curve of the thin-film transistor prepared of the present invention, and wherein a is V gS=0V; B is V gS=10V; C is V gS=20V; D is V gS=30V.
Fig. 4 is the transfer characteristic curve of the thin-film transistor prepared of the present invention, and wherein a is subthreshold swing=64mV/dec; B is threshold voltage=0.19V.
Fig. 5 is that the semiconductor channel layer InTiZnO film that the present invention relates to is at the transmittance curve of visible light wave range.
Fig. 6 is X-ray diffraction (XRD) collection of illustrative plates of the semiconductor channel layer InTiZnO film that the present invention relates to, and ITZO film is noncrystalline state.
Embodiment:
Below by specific embodiment, also further illustrate by reference to the accompanying drawings the present invention.
Embodiment 1:
The present embodiment is prepared a kind of MULTILAYER COMPOSITE oxide GTO high-K medium film transistor of bottom grating structure, and its concrete preparation process is:
(1) adopt technique for atomic layer deposition to prepare GTO high-K medium film, referring to Fig. 1:
Step 1: select P type silicon 100 as substrate, use successively acetone, alcohol Ultrasonic Cleaning substrate each 5 minutes, after repeatedly rinsing with deionized water, high pure nitrogen dries up, and obtains clean substrate;
Step 2: the high k dielectric layer of preparation GTO: clean substrate is put into PE-ALD reaction chamber immediately, is 200 ℃ in temperature, under the condition that reaction chamber pressure is 0.1Torr, with Ti[N (CH 3) 2] 4as the presoma of titanium, [(CH 3) 2gaNH 2] 3as the presoma of gallium, oxygen is as the reaction gas of plasma oxygen, and argon gas is as current-carrying gas, adopts grow on P type (100) the silicon substrate GTO dielectric layer of 36nm of PE-ALD technology; The deposit of GTO is based on [(CH 3) 2gaNH 2] 3, Ti[N (CH 3) 2] 4and the chemical reaction between oxygen:
Ti[N (CH 3) 2] 4+ O 2→ TiO 2+ product
[(CH 3) 2gaNH 2] 3+ O 2→ Ga 2o 3+ product
When forming GTO high K medium layer, monolayer number of deposition cycles is elected as 100 times; Comprise the reaction time of a GTO of deposition: Ti[N (CH 3) 2] 4or [(CH 3) 2gaNH 2] 3burst length t 1it is 1 second; It is t that argon gas is removed the residual gas time 2=50 seconds; The oxygen gas plasma burst length is t 3=1 second; The time that argon gas is removed residual oxygen and reflection product is t 4=50 seconds; The required time of reaction of a GTO of deposition is T=t 1+ t 2+ t 3+ t 4=102 seconds;
Step 3: in high-purity N 2under atmosphere, GTO film sample is carried out to short annealing processing, annealing temperature is 500 ℃, 30 ℃ of programming rate per minutes, and annealing time is 10 minutes;
(2) ion beam cleaning rifle cleans dielectric layer surface:
Step 1: pre-sputtering, GTO sample is put into ion beam chamber inside, high vacuum (3 * 10 to be extracted into -4pa) after, pass into 4SCCM argon gas, heater current adds to 4A, and discharge voltage is 70V, preheating 5 minutes, and after preheating completes, pre-sputtering is 10 minutes, and now beam intensity is 10mA, and discharge voltage is 70V, and operating air pressure is 4 * 10 -2pa;
Step 2: clean GTO dielectric layer, sample is moved to corresponding target position and test, under the experiment condition of assurance pre-sputtering, GTO film surface is cleaned 1 minute;
Step 3: after to be cleaned in high vacuum (3 * 10 -4pa) under, in being directly transported to magnetron sputtering chamber, ion beam chamber specimen holder, effectively avoid impurity in air to drop down onto the harmful effect that interface causes in sample;
(3) prepare ITZO channel layer: select ITZO channel layer growth parameter(s): background air pressure is 1-2 * 10 -4pa; Target component is ZnO+TiO 2alloys target and In 2o 3target, ZnO and TiO 2purity be 99.99%, In 2o 3purity be 99.99%; Sputtering power is ZTO=70W, In 2o 3=50W; Sputter gas is that Ar flow is 60SCCM, O 2flow is 2.5SCCM; Growth air pressure is 1Pa; Growth temperature is room temperature; Growth time is 20min; Film thickness is 120nm;
(4) adopt the method for vacuum thermal evaporation to prepare source, leak metal electrode: by the mode of thermal evaporation, above ITZO channel layer, with the stainless steel mask plate that breadth length ratio is 1000/100 μ m, prepare the metallic nickel electrode that 100nm is thick, thermal evaporation electric current is 50A;
(5) thin-film transistor of the Ni/ITZO/GTO/Si structure (Fig. 2) of making is tested; The InTiZnO thin-film transistor TFT device of making is tested to (Keithley2612A), and output, transfer characteristic curve are tested as shown in Figure 3,4; ITZO film utilizes Shimadzu UV-2550 test to obtain at the transmittance curve (Fig. 5) of visible ray; The crystallization degree of ITZO film as shown in Figure 6.

Claims (5)

1. the transistorized preparation method of MULTILAYER COMPOSITE oxide high-K medium film, is characterized in that comprising following processing step:
(1), the preparation of GTO high K medium dielectric layer: adopt the [(CH that purity is 100% 3) 2gaNH 2] 3with the purity Ti[N (CH that is 100% 3) 2] 4respectively as Ga 2o 3and TiO 2presoma; The technique for atomic layer deposition growth GTO MULTILAYER COMPOSITE sull strengthening with plasma at room temperature to 600 ℃, the physical thickness of every layer film is 20-40nm; Ga 2o 3and TiO 2film is preparation alternately, and total number of plies is 2-20 layer, obtains laminated film sample; By preparation laminated film sample in high-purity N 2in atmosphere, controlling temperature is 200-600 ℃ of annealing 8-12 minute, completes the preparation of GTO high K medium dielectric layer, obtains the film sample that contains GTO dielectric layer;
(2), the surface clean of film sample: the film sample that contains GTO dielectric layer is put into ion beam sputtering indoor, the Ar that adopts ion beam sputtering technology utilization to ionize out +clean the surface of film sample, remove surface contaminant; In cleaning process, argon flow amount is 2-6SCCM; Cleaning device operating air pressure is 4 * 10 -2pa; Line is 5-20mA; Scavenging period is 50-70 second, completes the surface clean of film sample, the film sample after being cleaned;
(3), the preparation of ITZO semiconductor channel layer: utilize conventional radiofrequency magnetron sputtering technology, adopt ZnO and TiO 2alloys target and In 2o 3the mode of the double target co-sputtering of target, the ITZO semiconductor channel layer that on the GTO dielectric layer of the film sample after cleaning, room temperature deposition thickness is 20-200nm, obtains channel layer thin film sample; Wherein oxide target material powder purity is all higher than 99.99%;
(4), the preparation of source, leakage metal electrode: utilize conventional vacuum thermal evaporation preparation source, leakage metal electrode on channel layer thin film sample, obtain the ITZO thin-film transistor of the high k dielectric layer of MULTILAYER COMPOSITE oxide GTO, its threshold voltage is 0.19V, subthreshold swing is 64mV/dec, and current on/off ratio is less than 2 * 10 5, high comprehensive performance.
2. the transistorized preparation method of MULTILAYER COMPOSITE oxide high-K medium film according to claim 1, while it is characterized in that employing technique for atomic layer deposition deposition GTO high K medium dielectric layer that step (1) relates to, select heavy doping P type silicon 100 as substrate, by purity, be greater than the alcohol Ultrasonic Cleaning that 99.0% acetone and purity are greater than 99.0% successively, then with deionized water, repeatedly rinse, after nitrogen dries up, silicon substrate is put into cvd reactive chamber; Recycling technique for atomic layer deposition deposition GTO high K medium dielectric layer, adopting respectively purity is 100% [(CH 3) 2gaNH 2] 3with the purity Ti[N (CH that is 100% 3) 2] 4as Ga 2o 3and TiO 2presoma, inert gas Ar is as the carrier gas that transports reaction source, oxygen is as reaction gas, under the effect of plasma, Ga 2o 3and TiO 2presoma and oxygen generation chemical reaction generate Ga 2o 3and TiO 2, its depositing temperature is room temperature to 600 ℃, cvd reactive chamber pressure is 0.1-1Torr; Ga 2o 3and TiO 2successively growth, utilizes deposition technique on silicon substrate, first to deposit 8-12 monolayer Ga 2o 3film, then at Ga 2o 3on film, continue deposition 8-12 monolayer TiO 2film, replaces 2-20 time successively, forms the laminated film sample of 2-20 layer; Deposition one deck Ga 2o or TiO 2comprise the reaction time of film: the inertia current-carrying gas of the gallium source of 0.1-10 second or titanium source gas pulses time, 2-50 second is removed the time that the oxygen gas plasma burst length of residue time, 0.1-10 second and the inertia current-carrying gas of 2-50 second are removed residue.
3. the transistorized preparation method of MULTILAYER COMPOSITE oxide high-K medium film according to claim 1, it is characterized in that it is to utilize ion beam cleaning rifle to clean the dielectric layer surface of film sample that the described employing ion beam sputtering technology of step (2) cleans film sample surface, first the film sample that contains GTO dielectric layer is put into ion beam sputtering chamber interior, being extracted into vacuum pressure is 3 * 10 -4after Pa, pass into argon gas, heater current adds to 4A to tungsten filament preheating, after preheating completes, carries out pre-sputtering, and its beam intensity is 8-12mA, and discharge voltage is 60-80V, and operating air pressure is 4 * 10 -2pa; After pre-sputtering completes, film sample is moved to target position and carry out cleansing medium layer surface, under the experiment condition of assurance pre-sputtering, GTO film surface is cleaned to 50-60 second, effectively remove film sample surface contaminant.
4. the transistorized preparation method of MULTILAYER COMPOSITE oxide high-K medium film according to claim 1, is characterized in that the material ITZO quaternary alloy oxide of the semiconductor channel layer that step (3) is described adopts In 2o 3, TiO 2with conventional radiofrequency magnetron sputtering technology room temperature preparation for ZnO, by changing sputtering power, regulate different atom ratios in film sample, control channel layer ITZO carrier concentration; Or by regulating argon gas, oxygen pneumatic than the resistivity and the carrier concentration that regulate ITZO film.
5. be In 2o 3, TiO 2be to utilize stainless steel mask plate to prepare source-drain electrode with the vacuum thermal evaporation relating in ZnO step (4), electrode raceway groove length-width ratio is 1:4-1:20; Thermal evaporation electric current is 30-50A; The source making, leak electricity very metallic aluminium, gold, nickel electrode, thickness of electrode is 50-200nm.
CN201410210984.6A 2014-05-19 2014-05-19 The preparation method of a kind of MULTILAYER COMPOSITE oxide compound high K medium thin film transistor Expired - Fee Related CN103956325B (en)

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