CN110226158A - 一种数据预取方法、装置和存储设备 - Google Patents

一种数据预取方法、装置和存储设备 Download PDF

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Publication number
CN110226158A
CN110226158A CN201780002811.7A CN201780002811A CN110226158A CN 110226158 A CN110226158 A CN 110226158A CN 201780002811 A CN201780002811 A CN 201780002811A CN 110226158 A CN110226158 A CN 110226158A
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length
prefetch
degree
access request
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CN110226158B (zh
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谭春华
郏维强
李定
杨文强
王力玉
姬朋立
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1016Performance improvement
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1016Performance improvement
    • G06F2212/1021Hit rate improvement
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1032Reliability improvement, data loss prevention, degraded operation etc
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60Details of cache memory
    • G06F2212/602Details relating to cache prefetching
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7203Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7206Reconfiguration of flash memory system

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

本申请提供了一种数据预取方法和装置。该数据预取方法应用于存储设备中,当第一数据访问请求执行完毕之后,获取目标逻辑块的第一顺序流长度和第一访问次数,所述存储设备的缓存中包括多个逻辑块,所述目标逻辑块以及所述相邻逻辑块均是所述多个逻辑块中的其中之一。接收第二数据访问请求时,将所述第一顺序流长度修改为第二顺序流长度并且将第一访问次数修改为第二访问次数,所述第二数据访问请求用于访问所述目标逻辑块。根据所述第二顺序流长度以及所述第二访问次数计算所述目标逻辑块的顺序度,当所述目标逻辑块的顺序度超过第一预取门限时,执行数据预取操作。可以准确地识别并行顺序流以触发数据预取操作,提高数据命中率。

Description

PCT国内申请,说明书已公开。

Claims (33)

  1. PCT国内申请,权利要求书已公开。
CN201780002811.7A 2017-12-29 2017-12-29 一种数据预取方法、装置和存储设备 Active CN110226158B (zh)

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CN111651120A (zh) * 2020-04-28 2020-09-11 中国科学院微电子研究所 预取数据的方法及装置
WO2022143692A1 (zh) * 2020-12-31 2022-07-07 华为技术有限公司 数据预取的方法、装置和设备

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TWI755878B (zh) * 2020-09-30 2022-02-21 威聯通科技股份有限公司 動態改變資料預取量的方法及使用其之終端裝置
JP2022142843A (ja) * 2021-03-17 2022-10-03 富士通株式会社 制御装置及びデータ読出方法
US11567872B1 (en) * 2021-07-08 2023-01-31 Advanced Micro Devices, Inc. Compression aware prefetch
WO2023013649A1 (ja) * 2021-08-06 2023-02-09 株式会社エヌエスアイテクス データキャッシュ装置およびプログラム

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WO2022143692A1 (zh) * 2020-12-31 2022-07-07 华为技术有限公司 数据预取的方法、装置和设备

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US11099997B2 (en) 2021-08-24
US20200327061A1 (en) 2020-10-15

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