CN110211527A - Micro LED display panel and display device - Google Patents
Micro LED display panel and display device Download PDFInfo
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- CN110211527A CN110211527A CN201910387301.7A CN201910387301A CN110211527A CN 110211527 A CN110211527 A CN 110211527A CN 201910387301 A CN201910387301 A CN 201910387301A CN 110211527 A CN110211527 A CN 110211527A
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- 239000010409 thin film Substances 0.000 claims description 69
- 239000010408 film Substances 0.000 claims description 31
- 239000013078 crystal Substances 0.000 claims description 6
- 239000004065 semiconductor Substances 0.000 claims description 3
- 241001269238 Data Species 0.000 abstract description 2
- 238000005516 engineering process Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- 241000208340 Araliaceae Species 0.000 description 1
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 1
- 235000003140 Panax quinquefolius Nutrition 0.000 description 1
- 238000012512 characterization method Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000005034 decoration Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 235000008434 ginseng Nutrition 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 230000035484 reaction time Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
This application provides a kind of Micro LED display panels, comprising: GOA driving circuit, multiple data lines, multi-strip scanning line and multiple pixel units；The multi-strip scanning line and the multiple data lines are arranged in a crisscross manner, and surround pixel region between adjacent two scan lines and adjacent two datas line to form the pixel region of multiple array arrangements, and each pixel region is provided with a pixel unit；The GOA driving circuit includes multiple cascade GOA units, level-one GOA unit is set in pixel region described in every a line, wherein, GOA unit between line n scan line and the (n+1)th horizontal scanning line is n-th grade of GOA unit, and n-th grade of GOA unit is connect with the line n scan line with the (n+1)th horizontal scanning line respectively.The application, to reduce frame size, improves screen accounting by the way that each GOA unit of GOA driving circuit to be respectively provided in pixel region.
Description
Technical field
This application involves field of display technology, in particular to a kind of Micro LED display panel and display device.
Background technique
Micro-LED is a kind of by LED structure microminiaturization and matrixing, each pixel is operated alone and addressing control
The display technology of system.Due to the brightness of Micro-LED technology, service life, contrast, reaction time, energy consumption, visible angle and resolution
The various indexs such as rate are superior to LCD and OLED technology, are considered as that the display technology of new generation of OLED and tradition LED can be surmounted.
But in the prior art, Micro LED display panel requires that GOA is arranged in the edge of its display area
Circuit, leading to Micro LED display panel, there are frames, and effective display area is smaller, and screen accounting is lower.
Therefore, the prior art is defective, needs to improve.
Summary of the invention
The application provides a kind of Micro LED display panel and display device, and screen accounting can be improved.
This application provides a kind of Micro LED display panels, comprising: GOA driving circuit, a plurality of is swept at multiple data lines
Retouch line and multiple pixel units；
The multi-strip scanning line and the multiple data lines are arranged in a crisscross manner, and adjacent two scan lines and adjacent
Pixel region is surrounded between two data lines to form the pixel region of multiple array arrangements, and each pixel region is provided with described in one
Pixel unit；
The GOA driving circuit includes multiple cascade GOA units, and setting level-one GOA is mono- in pixel region described in every a line
Member, wherein GOA unit between line n scan line and the (n+1)th horizontal scanning line is n-th grade of GOA unit, and n-th grade of GOA
Unit is connect with the line n scan line with the (n+1)th horizontal scanning line respectively.
In Micro LED display panel described herein, the GOA unit includes multiple thin film transistor (TFT)s, described
Multiple thin film transistor (TFT)s are located in different pixel regions.
In Micro LED display panel described herein, n-th grade of GOA unit include first film transistor,
Second thin film transistor (TFT), third thin film transistor (TFT) and the 4th thin film transistor (TFT)；
The drain electrode connection of the grid of the first film transistor and the first film transistor is simultaneously swept with upper level
Retouch signal output end connection, the source electrode of the first film transistor respectively with the drain electrode of the 4th thin film transistor (TFT) and institute
State the grid connection of the second thin film transistor (TFT)；The drain electrode incoming clock signal of second thin film transistor (TFT), second film
The source electrode of transistor and the scan line of line n connect, and the grid of the third thin film transistor (TFT) is connect with (n+1)th grade of scan line,
The drain electrode of the third thin film transistor (TFT) is connect with the scan line of the line n, the source electrode of the third thin film transistor (TFT) and
The source electrode of 4th thin film transistor (TFT) accesses low level signal.
In Micro LED display panel described herein, the 4th thin film transistor (TFT) is located at m column pixel region
Interior, the first film transistor is located in m+1 column pixel region, and second thin film transistor (TFT) is located at m+2 column pixel region
Interior, the third thin film transistor (TFT) is located in m+3 column pixel region.
In Micro LED display panel described herein, the m is equal to 1.
In Micro LED display panel described herein, the Micro LED display panel further includes for providing
The low level signal line of low level signal, the low level signal line extend along the direction of the scan line, and the third is thin
The source electrode of the source electrode of film transistor and the 4th thin film transistor (TFT) is electrically connected with the low level signal line.
In Micro LED display panel described herein, the Micro LED display panel further includes for providing
The clock cable of clock signal, the clock cable extend along the direction of the data line, second film crystal
The drain electrode of pipe is connect with the clock cable.
In Micro LED display panel described herein, the 4th thin film transistor (TFT) of the GOA unit of every a line
In m column pixel region, the first film transistor of the GOA unit of every a line is located in m+1 column pixel region, each
Second thin film transistor (TFT) of capable GOA unit is located in m+2 column pixel region, the third of the GOA unit of every a line
Thin film transistor (TFT) is located in m+3 column pixel region.
In Micro LED display panel described herein, the first film transistor, the second thin film transistor (TFT),
Third thin film transistor (TFT) and the 4th thin film transistor (TFT) are oxide semiconductor thin-film transistor.
A kind of display device, including Micro LED display panel described in any of the above embodiments.
The application is by the way that each GOA unit of GOA driving circuit to be respectively provided in pixel region, to reduce frame
Size improves screen accounting.
Detailed description of the invention
It, below will be to embodiment or the prior art in order to illustrate more clearly of embodiment or technical solution in the prior art
Attached drawing needed in description is briefly described, it should be apparent that, the accompanying drawings in the following description is only some of application
Embodiment for those of ordinary skill in the art without creative efforts, can also be attached according to these
Figure obtains other attached drawings.
Fig. 1 is the structure chart of one of some embodiments of the application Micro LED display panel.
Fig. 2 is the circuit structure diagram of N grades of GOA units in some embodiments of the application.
Specific embodiment
Embodiments of the present invention are described below in detail, the example of the embodiment is shown in the accompanying drawings, wherein from beginning
Same or similar element or element with the same or similar functions are indicated to same or similar label eventually.Below by ginseng
The embodiment for examining attached drawing description is exemplary, and for explaining only the invention, and is not considered as limiting the invention.
In the description of the present invention, it is to be understood that, term " center ", " longitudinal direction ", " transverse direction ", " length ", " width ",
" thickness ", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outside", " up time
The orientation or positional relationship of the instructions such as needle ", " counterclockwise " is to be based on the orientation or positional relationship shown in the drawings, and is merely for convenience of
The description present invention and simplified description, rather than the device or element of indication or suggestion meaning must have a particular orientation, with spy
Fixed orientation construction and operation, therefore be not considered as limiting the invention.In addition, term " first ", " second " are only used for
Purpose is described, relative importance is not understood to indicate or imply or implicitly indicates the quantity of indicated technical characteristic.
" first " is defined as a result, the feature of " second " can explicitly or implicitly include one or more feature.?
In description of the invention, the meaning of " plurality " is two or more, unless otherwise specifically defined.
In the description of the present invention, it should be noted that unless otherwise clearly defined and limited, term " installation ", " phase
Even ", " connection " shall be understood in a broad sense, for example, it may be being fixedly connected, may be a detachable connection, or be integrally connected；It can
To be mechanical connection, it is also possible to be electrically connected or can mutually communicate；It can be directly connected, it can also be by between intermediary
It connects connected, can be the connection inside two elements or the interaction relationship of two elements.For the ordinary skill of this field
For personnel, the specific meanings of the above terms in the present invention can be understood according to specific conditions.
In the present invention unless specifically defined or limited otherwise, fisrt feature second feature "upper" or "lower"
It may include that the first and second features directly contact, also may include that the first and second features are not direct contacts but pass through it
Between other characterisation contact.Moreover, fisrt feature includes the first spy above the second feature " above ", " above " and " above "
Sign is right above second feature and oblique upper, or is merely representative of first feature horizontal height higher than second feature.Fisrt feature exists
Second feature " under ", " lower section " and " following " include that fisrt feature is directly below and diagonally below the second feature, or is merely representative of
First feature horizontal height is less than second feature.
Following disclosure provides many different embodiments or example is used to realize different structure of the invention.In order to
Simplify disclosure of the invention, hereinafter the component of specific examples and setting are described.Certainly, they are merely examples, and
And it is not intended to limit the present invention.In addition, the present invention can in different examples repeat reference numerals and/or reference letter,
This repetition is for purposes of simplicity and clarity, itself not indicate between discussed various embodiments and/or setting
Relationship.In addition, the present invention provides various specific techniques and material example, but those of ordinary skill in the art can be with
Recognize the application of other techniques and/or the use of other materials.
It is one of some embodiments of the invention Micro LED display panel please refer to Fig. 1 and Fig. 2, Fig. 1
Structure chart.The Micro LED display panel includes: GOA driving circuit, multiple data lines Dm, multi-strip scanning line G (n), multiple pictures
Plain unit, low level line VSS, clock cable CK.
Wherein, the multi-strip scanning line G (n) and the multiple data lines Dm are arranged in a crisscross manner, and sweep described in adjacent two
It retouches and surrounds pixel region 100 between line G (n) and adjacent two datas line Dm to form the pixel region 100 of multiple array arrangements, it is each
The pixel region sets 100 and is equipped with a pixel unit.
Specifically, which includes multiple cascade GOA units 200, is set in pixel region 100 described in every a line
Set level-one GOA unit 200, wherein the GOA unit 200 between line n scan line G (n) and the (n+1)th horizontal scanning line G (n+1) is
N-th grade of GOA unit, and n-th grade of GOA unit respectively with the line n scan line G (n) and the (n+1)th horizontal scanning line G (n+1)
Connection.
In some embodiments, which includes multiple thin film transistor (TFT)s, and the multiple thin film transistor (TFT) is located at
In different pixel regions.GOA unit connects to be formed using thin film transistor (TFT) belongs to the prior art, can use various connection sides
Formula forms various GOA units.
Specifically, in the present embodiment, which includes first film transistor T11, the second film crystal
Pipe T21, third thin film transistor (TFT) T31 and the 4th thin film transistor (TFT) T41；The grid of first film transistor T11 with it is described
The drain electrode of first film transistor T11 is connected and is connect with the scanning signal output end of upper level, the first film transistor
The source electrode of T11 connects with the grid of the drain electrode of the 4th film crystal T41 pipe and the second thin film transistor (TFT) T21 respectively
It connects；The drain electrode incoming clock signal of the second thin film transistor (TFT) T21, the source electrode and line n of the second thin film transistor (TFT) T21
Scan line connection, the grid of the third thin film transistor (TFT) T31 connect with (n+1)th grade of scan line, the third film crystal
The drain electrode of pipe T31 is connect with the scan line of the line n, the source electrode of the third thin film transistor (TFT) T31 and described 4th thin
The source electrode of film transistor T41 accesses low level signal.
Wherein, the 4th thin film transistor (TFT) T41 is located in m column pixel region 100, and described first film transistor T11
In in m+1 column pixel region 100, the second thin film transistor (TFT) T21 is located in m+2 column pixel region 100, the third film
Transistor T31 is located in m+3 column pixel region 100.Wherein, which is equal to 1.
The low level signal line VSS is for providing low level signal, and the low level signal line VSS is along the scan line
Direction extend, the source electrode of the source electrode of the third thin film transistor (TFT) T31 and the 4th thin film transistor (TFT) T41 with it is described low
Level signal line VSS electrical connection.
Clock cable CK extends for providing clock signal, clock cable CK along the direction of the data line,
The drain electrode of second thin film transistor (TFT) is connect with the clock cable.
Wherein, the 4th thin film transistor (TFT) of the GOA unit of every a line is located in m column pixel region, the GOA of every a line
The first film transistor of unit is located in m+1 column pixel region, second film crystal of the GOA unit of every a line
Pipe is located in m+2 column pixel region, and the third thin film transistor (TFT) of the GOA unit of every a line is located in m+3 column pixel region.
So as to reduce the item number of clock cable, all GOA units is allowed to share this clock cable.
In some embodiments, first film transistor T11, the second thin film transistor (TFT) T21, third thin film transistor (TFT)
T31 and the 4th thin film transistor (TFT) T41 is NMOS tube, and is oxide semiconductor thin-film transistor.
The application is by the way that each GOA unit of GOA driving circuit to be respectively provided in pixel region, to reduce frame
Size improves screen accounting.
Present invention also provides a kind of display devices, including Micro LED display panel described in any of the above embodiments.
Although above preferred embodiment is not to limit in conclusion the application is disclosed above with preferred embodiment
The application processed, those skilled in the art are not departing from spirit and scope, can make various changes and profit
Decorations, therefore the protection scope of the application subjects to the scope of the claims.
Claims (10)
1. a kind of Micro LED display panel characterized by comprising GOA driving circuit, multiple data lines, multi-strip scanning line
And multiple pixel units；
The multi-strip scanning line and the multiple data lines are arranged in a crisscross manner, and adjacent two scan lines and two adjacent
Pixel region is surrounded between data line to form the pixel region of multiple array arrangements, each pixel region is provided with a pixel
Unit；
The GOA driving circuit includes multiple cascade GOA units, and level-one GOA unit is arranged in pixel region described in every a line,
In, the GOA unit between line n scan line and the (n+1)th horizontal scanning line is n-th grade of GOA unit, and n-th grade of GOA unit is divided
It is not connect with the line n scan line with the (n+1)th horizontal scanning line.
2. Micro LED display panel according to claim 1, which is characterized in that the GOA unit includes multiple films
Transistor, the multiple thin film transistor (TFT) are located in different pixel regions.
3. Micro LED display panel according to claim 2, which is characterized in that n-th grade of GOA unit includes the
One thin film transistor (TFT), the second thin film transistor (TFT), third thin film transistor (TFT) and the 4th thin film transistor (TFT)；
The drain electrode connection of the grid of the first film transistor and the first film transistor is simultaneously believed with the scanning of upper level
The connection of number output end, the source electrode of the first film transistor respectively with the drain electrode of the 4th thin film transistor (TFT) and described the
The grid of two thin film transistor (TFT)s connects；The drain electrode incoming clock signal of second thin film transistor (TFT), second film crystal
The source electrode of pipe and the scan line of line n connect, and the grid of the third thin film transistor (TFT) is connect with (n+1)th grade of scan line, described
The drain electrode of third thin film transistor (TFT) is connect with the scan line of the line n, the source electrode of the third thin film transistor (TFT) and described
The source electrode of 4th thin film transistor (TFT) accesses low level signal.
4. Micro LED display panel according to claim 3, which is characterized in that the 4th thin film transistor (TFT) is located at
In m column pixel region, the first film transistor is located in m+1 column pixel region, and second thin film transistor (TFT) is located at m
In+2 column pixel regions, the third thin film transistor (TFT) is located in m+3 column pixel region.
5. Micro LED display panel according to claim 4, which is characterized in that the m is equal to 1.
6. Micro LED display panel according to claim 4, which is characterized in that the Micro LED display panel is also
Including for providing the low level signal line of low level signal, the low level signal line prolongs along the direction of the scan line
It stretches, source electrode and the low level signal line of the source electrode of the third thin film transistor (TFT) and the 4th thin film transistor (TFT) are electrically connected
It connects.
7. Micro LED display panel according to claim 6, which is characterized in that the Micro LED display panel is also
Including for providing the clock cable of clock signal, the clock cable extends along the direction of the data line, described
The drain electrode of second thin film transistor (TFT) is connect with the clock cable.
8. Micro LED display panel according to claim 4, which is characterized in that described the of the GOA unit of every a line
Four thin film transistor (TFT)s are located in m column pixel region, and the first film transistor of the GOA unit of every a line is located at m+1 column
In pixel region, second thin film transistor (TFT) of the GOA unit of every a line is located in m+2 column pixel region, and the GOA of every a line is mono-
The third thin film transistor (TFT) of member is located in m+3 column pixel region.
9. Micro LED display panel according to claim 4, which is characterized in that the first film transistor, second
Thin film transistor (TFT), third thin film transistor (TFT) and the 4th thin film transistor (TFT) are oxide semiconductor thin-film transistor.
10. a kind of display device, which is characterized in that including the described in any item Micro LED display surfaces of such as claim 1-9
Plate.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910387301.7A CN110211527A (en) | 2019-05-10 | 2019-05-10 | Micro LED display panel and display device |
| PCT/CN2019/105882 WO2020228204A1 (en) | 2019-05-10 | 2019-09-16 | Micro led display panel and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910387301.7A CN110211527A (en) | 2019-05-10 | 2019-05-10 | Micro LED display panel and display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110211527A true CN110211527A (en) | 2019-09-06 |
Family
ID=67787041
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910387301.7A Pending CN110211527A (en) | 2019-05-10 | 2019-05-10 | Micro LED display panel and display device |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN110211527A (en) |
| WO (1) | WO2020228204A1 (en) |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110706599A (en) * | 2019-10-25 | 2020-01-17 | 深圳市华星光电技术有限公司 | Display panel and display device |
| CN111413835A (en) * | 2020-04-27 | 2020-07-14 | 武汉华星光电技术有限公司 | Array substrate and display panel |
| CN111474782A (en) * | 2020-04-29 | 2020-07-31 | 深圳市华星光电半导体显示技术有限公司 | Display panel and electronic device |
| CN111798765A (en) * | 2020-07-08 | 2020-10-20 | Tcl华星光电技术有限公司 | Preparation method of display panel and display device |
| WO2020228204A1 (en) * | 2019-05-10 | 2020-11-19 | 深圳市华星光电半导体显示技术有限公司 | Micro led display panel and display device |
| CN114664245A (en) * | 2022-05-25 | 2022-06-24 | 惠科股份有限公司 | Driving substrate and display panel thereof |
| CN114664250A (en) * | 2022-04-08 | 2022-06-24 | 武汉华星光电半导体显示技术有限公司 | Display panel and display device |
| CN115079477A (en) * | 2022-05-25 | 2022-09-20 | 重庆惠科金渝光电科技有限公司 | Driving substrate and display panel thereof |
| US11462576B2 (en) | 2020-07-08 | 2022-10-04 | Tcl China Star Optoelectronics Technology Co., Ltd. | Display panel, manufacturing method thereof, and display device |
| CN115953983A (en) * | 2023-03-09 | 2023-04-11 | 惠科股份有限公司 | Display panel, driving method of display panel, and display device |
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