CN101609233B - Liquid crystal display panel - Google Patents

Liquid crystal display panel Download PDF

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Publication number
CN101609233B
CN101609233B CN 200810067937 CN200810067937A CN101609233B CN 101609233 B CN101609233 B CN 101609233B CN 200810067937 CN200810067937 CN 200810067937 CN 200810067937 A CN200810067937 A CN 200810067937A CN 101609233 B CN101609233 B CN 101609233B
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China
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pixel
film transistor
thin film
tft
electrode
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CN 200810067937
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CN101609233A (en
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苏欣
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Innolux Shenzhen Co Ltd
Chi Mei Optoelectronics Corp
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Innolux Shenzhen Co Ltd
Chi Mei Optoelectronics Corp
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Abstract

The invention provides a liquid crystal display panel, which comprises a plurality of scanning drivers for generating scanning signals, a plurality of data drivers for generating display signals, a plurality of scanning lines connected with the scanning drivers, a plurality of data wires connected with the data drivers and a plurality of pixel pairs, wherein each pixel pair is driven by one of the scanning lines and one of the data wires; each pixel pair comprises a first pixel and a second pixel; the first pixel comprises a first thin film transistor controlling the first pixel; the second pixel comprises a second thin film transistor controlling the second pixel; the first thin film transistor is a P-channel transistor, and the second thin film transistor is a N-channel transistor simultaneously; or, the first thin film transistor is an N-shaped channel transistor, and the second thin film transistor is a P-shaped channel transistor; and the first pixel and the second pixel connected with each data wire are distributed on both sides of the data wire.

Description

Display panels
Technical field
The invention relates to a kind of display panels.
Background technology
Display panels has the characteristics such as low diathermaneity, frivolous and power consumption are low because of it, and is therefore day by day extensive on using, and along with the ripe and innovation of correlation technique, its kind is also day by day various.
Seeing also Fig. 1, is a kind of electrical block diagram of prior art display panels.This display panels 1 comprises the m bar one to one thin film transistor (TFT) 14 of the sweep trace 11, n bar space at interval and the data line 12 vertical with this sweep trace 11, pixel electrode 13 that a plurality of m of being * n (m>1, n>1) matrix is arranged and a plurality of and this pixel electrode 13 that is parallel to each other.The drain electrode of each thin film transistor (TFT) 14 (not indicating) is electrically connected to corresponding pixel electrode 13.(grid of the thin film transistor (TFT) 14 that the pixel electrode 13 of the row of 1≤i≤m) is electrically connected (indicating) is electrically connected to i bar sweep trace 11, and (source electrode (indicating) of the thin film transistor (TFT) 14 that the pixel electrode 13 of row of 1≤j≤n) is electrically connected is electrically connected to j bar data line 12 to be positioned at j to be positioned at i.
This display panels 1 also comprises a plurality of data drivers 15 and a plurality of scanner driver 16.This data driver 15 sequentially is connected to these many data lines 12 and is used for providing gray scale voltage, this scanner driver 16 sequentially to be connected to this multi-strip scanning line 11 for sweep signal is provided.
During this display panels 1 work, this scanner driver 16 sequentially scans this multi-strip scanning line 11.Being driven the thin film transistor (TFT) 14 that the sweep trace 11 of device 16 scanning connected by this scanning all opens, meanwhile this data driver 15 inputs to gray scale voltage the pixel electrode 13 of correspondence by the source drain of these many data lines 12 and this thin film transistor (TFT) that is opened 14, has realized the loading of one-row pixels electrode 13 gray scale voltages.So repeat, this m bar sweep trace 11 is sequentially all scanned after, just realized the demonstration of a frame picture.
But not only the demand of large scale liquid crystal TV suddenly increases at present, and " full HD (Full High Definition, Full HD) " LCD TV has become the high-end product in TV market.So-called " full HD " refers to that vertical resolution is 1920 * 1080.Yet the increase of resolution certainly will cause this display panels 1 sweep trace 11 and the quantity m of data line 12, the increase of n.Because each scanner driver 16 and data driver 15 lead-out terminals are limited, so this display panels 1 needs as realizing that high definition then needs more scanner driver 16 and data driver 15 to drive sweep trace 11 and the data line 12 of increase.
Seeing also Fig. 2, is the electrical block diagram of the display panels of another kind of prior art.This display panels 2 comprises 2m bar be parallel to each other sweep trace 21, n/2 bar space and data line 22, a plurality of be n * m (m>1 vertical with this sweep trace 21 at interval, n>1, and n is even number) pixel electrode 23 arranged of matrix and a plurality of and this pixel electrode 23 thin film transistor (TFT) 24 one to one.The drain electrode of each thin film transistor (TFT) 24 (not indicating) is electrically connected to corresponding pixel electrode 23.((thin film transistor (TFT) 24 grids (indicating) that the pixel electrode 23 of row of 1≤J≤n/2) is electrically connected are electrically connected to 2i-1 bar sweep trace 21 to the row 2j-1 of 1≤i≤m) to be positioned at i; Be positioned at thin film transistor (TFT) 24 grids that the pixel electrode 23 of the capable 2j of i row is electrically connected and be electrically connected to 2i bar sweep trace 21; The source electrode (indicating) that is positioned at the thin film transistor (TFT) 24 that is electrically connected of pixel electrode 23 of 2j-1 and 2j row is electrically connected to j bar data line 22 simultaneously.Change a kind of saying, every delegation pixel electrode 23 is divided into a plurality of pixel electrodes to 29, each pixel electrode comprises two adjacent pixel electrodes 23 to 29, each pixel electrode is connected to same data line 22 via different thin film transistor (TFT) 24 respectively to 29 two pixel electrodes 23, and this pixel electrode is connected to different sweep trace 21 (being generally and two sweep traces 21 of this pixel electrode to 29 adjacent both sides) to this two pixel electrode 23 of 29 via this two thin film transistor (TFT) 24.
This display panels 2 also comprises a plurality of data drivers 25 and a plurality of scanner driver 26.This data driver 25 sequentially is connected to these many data lines 22 and is used for providing gray scale voltage, this scanner driver 26 sequentially to be connected to this multi-strip scanning line 21 for sweep signal is provided.
During this display panels 2 work, this scanner driver 26 sequentially scans this multi-strip scanning line 21.When this scanner driver 26 is scanned up to 2i-1 bar sweep trace, the thin film transistor (TFT) 24 that odd number during i is capable (namely be positioned at 2j-1 row) pixel electrode 23 connects is opened, this data driver 25 inputs to gray scale voltage the pixel electrode 23 of correspondence by the source drain of these many data lines 22 and this thin film transistor (TFT) that is opened 24, realized the loading of odd pixel electrode 23 gray scale voltages in this row; Next, when this scanner driver 26 is scanned up to 2i bar sweep trace, the thin film transistor (TFT) 24 that even number during i is capable (namely be positioned at 2j row) pixel electrode 23 connects is opened, this data driver 25 inputs to gray scale voltage the pixel electrode 23 of correspondence by the source drain of these many data lines 22 and this thin film transistor (TFT) that is opened 24, realized the loading of even pixel electrode 23 gray scale voltages in this row.So repeat, after this m bar sweep trace 21 is sequentially all scanned, just realized the demonstration of a frame picture.
This shows, this display panels 2 has reduced the data line 22 of half quantity compared to this display panels 1, therefore the sweep trace 21 of the quantity that doubles can reduce the data driver 25 of half quantity, the scanner driver 26 of the quantity that doubles.Because each pixel comprises three sub-pixel R, G, B in order to realize full-color demonstration, therefore, for example resolution is actual 5760 data lines and 1080 sweep traces of comprising of display panels of 1920 * 1080.So, adopt the structure such as display panels 2 can reduce by 2880 data lines and only increase by 1080 sweep traces, the data driver quantity that then can reduce is greater than the scanner driver quantity that increases, thus this display panels 2 less cost.
But this scanner driver 26 is expensive, and this scanner driver 26 of a large amount of uses still causes these display panels 2 costs higher.
Seeing also Fig. 3, is the electrical block diagram of the display panels of another prior art.This display panels 200 comprises m/2 bar be parallel to each other sweep trace 210, n bar space and data line 220, a plurality of be n * m (m>1 vertical with this sweep trace 210 at interval, n>1, and m is even number) pixel electrode 230 arranged of matrix and a plurality of and this pixel electrode 230 thin film transistor (TFT) 240 one to one.The drain electrode of each thin film transistor (TFT) 240 (not indicating) is electrically connected to corresponding pixel electrode 230.Being positioned at 2i-1, capable (thin film transistor (TFT) 240 grids that 1≤i≤m/2) and the capable pixel electrode 230 of 2i are electrically connected (indicating) are electrically connected to i bar sweep trace 210; (source electrode (indicating) of the thin film transistor (TFT) 240 that the pixel electrode 230 of 1≤j≤n) is electrically connected is electrically connected to j bar data line 220 simultaneously to be positioned at j row.Wherein, be positioned at the thin film transistor (TFT) 240 that the capable pixel electrode of 2i-1 230 is electrically connected and be P type channel thin-film transistor, be positioned at the thin film transistor (TFT) 240 that the capable pixel electrode of 2i 230 is electrically connected and be the N-type channel thin-film transistor.Change a kind of saying, each row pixel electrode 230 transmits gray scale voltage by the data line 220 of a correspondence, and per two row pixel electrodes 33 are by the 31 corresponding controls of a sweep trace, and odd-numbered line thin film transistor (TFT) 34 is P type raceway groove, and even number line thin film transistor (TFT) 34 is the N-type raceway groove.
During this display panels 3 work, this scanner driver 36 sequentially scans this multi-strip scanning line 31.When this scanner driver 36 is scanned up to i bar sweep trace, this scanner driver 36 offers first these i bar sweep trace 31 1 negative pulses opens the thin film transistor (TFT) 34 of the P type raceway groove that the capable pixel electrode 33 of 2i-1 connects, this data driver 35 inputs to gray scale voltage the pixel electrode 33 of correspondence by the source drain of these many data lines 32 and this thin film transistor (TFT) that is opened 34, realized the loading of capable pixel electrode 33 gray scale voltages of 2i-1; Next, this scanner driver 36 offers these i bar sweep trace 31 1 positive pulses opens the thin film transistor (TFT) 34 of the N-type raceway groove that the capable pixel electrode 33 of 2i connects, this data driver 35 inputs to corresponding pixel electrode 33 with the source drain of gray scale voltage by this many data lines 32 and this thin film transistor (TFT) that is opened 34, realized 2i capable in the loading of even pixel electrode 33 gray scale voltages.So repeat, after this m/2 bar sweep trace 31 is sequentially all scanned, just realized the demonstration of a frame picture.
As seen, this display panels 3 has further reduced the sweep trace 31 of half quantity compared to this display panels 2, therefore can further reduce the scanner driver 36 of half quantity.
But general data driver inner structure wants complicated a lot of compared to scanner driver, so the price of data driver also exceeds much compared to scanner driver.This display panels 3 can't further reduce the quantity of data driver 35 so that this display panels 3 costs are still higher.And, on describe in detail, the quantity of the data line of general display panels is all far more than the quantity of sweep trace, and data line and sweep trace are generally made by lighttight metal material, so this display panels 3 can't further reduce the quantity of data line 32 so that the opening of this display panels 3 is still lower.
Summary of the invention
In order to solve the problem that prior art display panels aperture opening ratio is lower, cost is higher, be necessary to provide higher, the lower-cost display panels of a kind of aperture opening ratio real in essential.
A kind of display panels, it comprises a plurality of scanner drivers for generation of sweep signal, a plurality of data drivers for generation of display, many the sweep traces that are connected to this scanner driver, many the data lines that are connected to this data driver and a plurality of pixel pair, each pixel is to being driven by one of those sweep traces and one of those data lines, wherein, this pixel is to comprising one first pixel and one second pixel, this first pixel comprises the first film transistor of this first pixel of control, this second pixel comprises the second thin film transistor (TFT) of this second pixel of control, this the first film transistor is p channel transistor, this second thin film transistor (TFT) is the N channel transistor simultaneously, perhaps this first film transistor is the N-type channel transistor, this second thin film transistor (TFT) is P type channel transistor simultaneously, and this first pixel that each data line connects and this second pixel distribution are in these data line both sides.
A kind of display panels, it comprises a plurality of scanner drivers for generation of sweep signal, a plurality of data drivers for generation of display, the m bar is used for the sweep trace of this sweep signal of transmission, the n bar is used for the data line of this data-signal of transmission, 2n * m is the capable 2n row of m and arranges one to one thin film transistor (TFT) of pixel electrode and a plurality of and this pixel electrode, the pixel electrode of the correspondence of the drain electrode connection of each thin film transistor (TFT); Wherein, the source electrode of the corresponding thin film transistor (TFT) of pixel electrode of 2j-1 row and this 2j row is connected to j bar data line and grid is connected to same sweep trace in twos, two thin film transistor (TFT)s that are connected to same sweep trace in 2j-1 row and this 2j row are respectively P type channel transistor and N-type channel transistor, this first pixel that each data line connects and this second pixel distribution are in these data line both sides, m>1 wherein, n>1,1≤i≤n.
Compared with prior art, display panels of the present invention since this first pixel of connecting of each data line and this second pixel distribution in these data line both sides, make each bar data line drive two row pixels, and then further reduced data line, thereby aperture opening ratio is higher.The minimizing of data line makes the quantity of the data driver that this display panels adopts also less simultaneously, so this display panels cost is lower.
Description of drawings
Fig. 1 is a kind of electrical block diagram of prior art display panels.
Fig. 2 is the electrical block diagram of the display panels of another kind of prior art.
Fig. 3 is the electrical block diagram of the display panels of another prior art.
Fig. 4 is the electrical block diagram of display panels the first embodiment of the present invention.
Fig. 5 is the oscillogram that scanner driver shown in Figure 4 is respectively loaded on the sweep signal G1 to Gm of the 1st to m bar sweep trace.
Fig. 6 is the electrical block diagram of display panels the second embodiment of the present invention.
Fig. 7 is the electrical block diagram of display panels the 3rd embodiment of the present invention.
Embodiment
Seeing also Fig. 4, is the electrical block diagram of display panels the first embodiment of the present invention.This display panels 3 comprise the m bar be parallel to each other sweep trace 31, n bar space and the data line 32 that intersects with this sweep trace 31 at interval, a plurality of pixel to 30, a plurality of data driver 35 and a plurality of scanner driver 36.Each this sweep trace 31 and each these data line 32 infall are provided with these a plurality of pixels to one of 30, and this sweep trace 31 is used for this pixel corresponding to driving to 30 with this data line 32.This data driver 35 is electrically connected to this data line 32 and is used for providing display, this scanner driver 36 to be electrically connected to this turntable driving line 31 for sweep signal is provided.
Each pixel comprises one first pixel 310 and one second pixel 320 to 30, and each first pixel 310 comprises a pixel electrode 33 and a first film transistor 341, and each second pixel 320 comprises a pixel electrode 33 and one second thin film transistor (TFT) 342.Each pixel all is connected to same sweep trace 31 to first and second thin film transistor (TFT) 341 of 30,342 grid (not indicating), and this pixel extremely all is connected to same data line 32 to first and second thin film transistor (TFT) 341 of 30,342 source electrode (not indicating).Wherein, this first film transistor 341 is P type channel transistor, and this second thin film transistor (TFT) 342 is the N-type channel transistor.
Pixel electrode that each data line 32 connects 33 evenly and be symmetrically distributed in this data line 32 both sides, and each pixel to this first pixel 310 of 30 be connected the second pixel 320 and be positioned at corresponding these sweep trace 31 homonymies that connect, be positioned at corresponding data line 32 both sides that connect, and make these a plurality of pixels be 2n * m (m>1 to 30 these included a plurality of pixel electrodes 33, n>1) matrix is spaced, and this first pixel 310 and this second pixel 320 all are arranged alternately along each column or row.
Change a kind of saying, quantity along the one-row pixels electrode 33 of sweep trace 31 directions is 2n, quantity along a row pixel electrode 33 of data line 32 directions is m, is positioned at the 2j-1 row and is connected with 2j that (pixel electrode 33 of 1≤j≤n) is electrically connected to j bar data line 32 by the thin film transistor (TFT) 34 of correspondence connection.
Seeing also Fig. 5, is the oscillogram that scanner driver shown in Figure 4 is respectively loaded on the sweep signal G1 to Gm of the 1st to m bar sweep trace.Within the frame T time, each sweep signal G1 to Gm includes an adjacent positive pulse and a negative pulse.The pulse of these a plurality of sweep signal G1 to Gm sequentially produces, and namely the same time only has a sweep signal to be in pulse condition.
When the 1st sweep trace 31 was in positive pulse, whole the second thin film transistor (TFT)s 342 that link to each other with the 1st sweep trace 31 were opened, and display is loaded on the pixel electrode 33 of this second pixel 320 by this n bar data line 32.When the 1st sweep trace 31 was in negative pulse, the whole the first film transistors 341 that link to each other with the 1st sweep trace 31 were opened, and display is loaded on the pixel electrode 33 of this first pixel 310 by this n bar data line 32.The drive principle of the 2nd to m bar sweep trace 31 is identical with the 1st sweep trace 31.
Compared to prior art, display panels 3 of the present invention is respectively P type and N-type channel transistor owing to being connected to first and second thin film transistor (TFT) 341,342 of same sweep trace 31 and same data line 32, and this first pixel 310 and this second pixel 320 that each data line 32 connects are distributed in this data line 32 both sides, therefore can utilize a data line 32 to drive two row pixels 310,320, make these sweep trace 31 quantity increased one times and these data line 32 negligible amounts half.Because data line 32 quantity are much larger than these sweep trace 31 quantity generally speaking, so these display panels 3 aperture opening ratios are higher.Again because the minimizing of these data line 32 quantity so that the negligible amounts of the data driver 35 that this display panels 3 adopts, so these display panels 3 costs are lower.
Seeing also Fig. 6, is the electrical block diagram of display panels the second embodiment of the present invention.This display panels 4 is substantially identical with this display panels 3 of the first embodiment, its key distinction is: each pixel to this first pixel 410 of 40 be connected the second pixel 420 and be positioned at corresponding these sweep trace 41 both sides that connect, be positioned at corresponding data line 42 homonymies that connect, and make these a plurality of pixels be 2n * m matrix to 40 these included a plurality of pixel electrodes 43 to be spaced.
Seeing also Fig. 7, is the electrical block diagram of display panels the 3rd embodiment of the present invention.This display panels 5 is substantially identical with this display panels 3 of the first embodiment, its key distinction is: each pixel is connected to one of two adjacent sweep traces sweep trace to the transistorized grid correspondence of 50 the first film, the grid correspondence of the second thin film transistor (TFT) is connected to another sweep trace of two adjacent sweep traces, and a pixel is positioned at corresponding data line 52 both sides that connect to the first film transistor AND gate the second thin film transistor (TFT) of 50, and makes these a plurality of pixels be 2n * m matrix to 50 these included a plurality of pixel electrodes 53 to be spaced.
The present invention is not limited to the described of above-mentioned embodiment, also can have other change design.As: in first, second and third embodiment, this first pixel 310,410,510 and this second pixel 320,420,520 only be arranged alternately along a direction in the each column or row direction.

Claims (5)

1. display panels, it comprises a plurality of scanner drivers for generation of sweep signal, a plurality of data drivers for generation of display, many the sweep traces that are connected to this scanner driver, many the data lines that are connected to this data driver and a plurality of pixel pair, each pixel is to being driven by one of those sweep traces and one of those data lines, wherein, this pixel is to comprising one first pixel and one second pixel, this first pixel only has the first film transistor of the first pixel electrode and this first pixel electrode of control, this second pixel only has the second thin film transistor (TFT) of the second pixel electrode and this second pixel electrode of control, the transistorized drain electrode of this first film is electrically connected to this pixel electrode of this first pixel, the drain electrode of this second thin film transistor (TFT) is connected to the pixel electrode of this second pixel, the transistorized grid of this first film that each pixel is right and the grid of this second thin film transistor (TFT) are electrically connected to this pixel to the sweep trace of correspondence, the transistorized source electrode of this first film that each pixel is right and the source electrode of this second thin film transistor (TFT) are electrically connected to this pixel to the data line of correspondence, this the first film transistor is p channel transistor, this second thin film transistor (TFT) is the N channel transistor simultaneously, perhaps this first film transistor is the N-type channel transistor, this second thin film transistor (TFT) is P type channel transistor simultaneously, it is characterized in that: this first pixel that each data line connects and this second pixel distribution are in these data line both sides; This first pixel and this second pixel that each pixel is right are positioned at this pixel to the sweep trace homonymy of correspondence, and are positioned at this pixel to the data line both sides of correspondence.
2. display panels as claimed in claim 1 is characterized in that: this first pixel that each data line connects and this second pixel are to be evenly distributed on this data line both sides.
3. display panels as claimed in claim 2 is characterized in that: this first pixel that each data line connects and this second pixel are evenly and are symmetrically distributed in this data line both sides.
4. display panels, it comprises a plurality of scanner drivers for generation of sweep signal, a plurality of data drivers for generation of display, many the sweep traces that are connected to this scanner driver, many the data lines that are connected to this data driver and a plurality of pixel pair, each pixel is to being driven by one of two adjacent those sweep traces and those data lines, wherein, this pixel lays respectively at this pixel to the both sides of the data line of correspondence to comprising one first pixel and one second pixel, this first pixel only has the first film transistor of the first pixel electrode and this first pixel electrode of control, this second pixel only has the second thin film transistor (TFT) of the second pixel electrode and this second pixel electrode of control, the transistorized drain electrode of this first film is electrically connected to this pixel electrode of this first pixel, the drain electrode of this second thin film transistor (TFT) is connected to the pixel electrode of this second pixel, the transistorized grid correspondence of this first film that each pixel is right is connected to one of these two adjacent sweep traces sweep trace, the grid correspondence of this second thin film transistor (TFT) is connected to another sweep trace of these two adjacent sweep traces, the transistorized source electrode of this first film that each pixel is right and the source electrode of this second thin film transistor (TFT) are electrically connected to this pixel to the data line of correspondence, this the first film transistor is p channel transistor, this second thin film transistor (TFT) is the N channel transistor simultaneously, perhaps this first film transistor is the N-type channel transistor, this second thin film transistor (TFT) is P type channel transistor simultaneously, it is characterized in that: this first pixel that each data line connects and this second pixel distribution are in these data line both sides.
5. display panels, it comprises a plurality of scanner drivers for generation of sweep signal, a plurality of data drivers for generation of display, many the sweep traces that are connected to this scanner driver, many the data lines that are connected to this data driver and a plurality of pixel pair, each pixel is to being driven by one of those sweep traces and one of those data lines, wherein, this pixel is to comprising one first pixel and one second pixel, this first pixel only has the first film transistor of the first pixel electrode and this first pixel electrode of control, this second pixel only has the second thin film transistor (TFT) of the second pixel electrode and this second pixel electrode of control, the transistorized drain electrode of this first film is electrically connected to this pixel electrode of this first pixel, the drain electrode of this second thin film transistor (TFT) is connected to the pixel electrode of this second pixel, the transistorized grid of this first film that each pixel is right and the grid of this second thin film transistor (TFT) are electrically connected to this pixel to the sweep trace of correspondence, the transistorized source electrode of this first film that each pixel is right and the source electrode of this second thin film transistor (TFT) are electrically connected to this pixel to the data line of correspondence, this the first film transistor is p channel transistor, this second thin film transistor (TFT) is the N channel transistor simultaneously, perhaps this first film transistor is the N-type channel transistor, this second thin film transistor (TFT) is P type channel transistor simultaneously, it is characterized in that: this first pixel and this second pixel that each pixel is right are positioned at this pixel to the sweep trace both sides of correspondence, and are positioned at this pixel to the homonymy of the data line of correspondence.
CN 200810067937 2008-06-20 2008-06-20 Liquid crystal display panel Expired - Fee Related CN101609233B (en)

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CN102955309B (en) * 2012-10-15 2015-12-09 京东方科技集团股份有限公司 A kind of array base palte, display panel, display device and driving method thereof
CN103926776B (en) * 2013-12-24 2017-03-15 厦门天马微电子有限公司 The driving method of array base palte, display floater, display device and array base palte
CN105096866A (en) * 2015-08-07 2015-11-25 深圳市华星光电技术有限公司 Liquid crystal display and control method thereof
CN110211527A (en) * 2019-05-10 2019-09-06 深圳市华星光电半导体显示技术有限公司 Micro LED display panel and display device
CN111123595A (en) * 2019-12-31 2020-05-08 惠州视维新技术有限公司 Panel and driving method
CN111261123A (en) * 2020-03-06 2020-06-09 Tcl华星光电技术有限公司 Display panel and driving method thereof
CN111564132A (en) * 2020-05-29 2020-08-21 厦门天马微电子有限公司 Shift register, display panel and display device
CN115079479A (en) * 2022-07-08 2022-09-20 苏州华星光电技术有限公司 Display panel and display device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1979622A (en) * 2005-12-02 2007-06-13 群康科技(深圳)有限公司 Liquid crystal display, its drive circuit and driving method
CN101017265A (en) * 2007-03-12 2007-08-15 友达光电股份有限公司 Control device of pixel and display device using same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1979622A (en) * 2005-12-02 2007-06-13 群康科技(深圳)有限公司 Liquid crystal display, its drive circuit and driving method
CN101017265A (en) * 2007-03-12 2007-08-15 友达光电股份有限公司 Control device of pixel and display device using same

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
JP特开平6-22250A 1994.01.28

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Applicant after: Qunkang Technology (Shenzhen) Co., Ltd.

Co-applicant after: Chimei Optoelectronics Co., Ltd.

Address before: 518109 Longhua, Shenzhen, town, Foxconn science and Technology Industrial Park E District, building 1, floor 4,

Applicant before: Qunkang Technology (Shenzhen) Co., Ltd.

Co-applicant before: Innolux Display Group

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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20130116

Termination date: 20180620

CF01 Termination of patent right due to non-payment of annual fee