CN110176866A - A kind of 2N inverter parallel system and its control method - Google Patents
A kind of 2N inverter parallel system and its control method Download PDFInfo
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- CN110176866A CN110176866A CN201910286900.XA CN201910286900A CN110176866A CN 110176866 A CN110176866 A CN 110176866A CN 201910286900 A CN201910286900 A CN 201910286900A CN 110176866 A CN110176866 A CN 110176866A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/12—Arrangements for reducing harmonics from ac input or output
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/539—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
- H02M7/5395—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/12—Arrangements for reducing harmonics from ac input or output
- H02M1/123—Suppression of common mode voltage or current
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/493—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode the static converters being arranged for operation in parallel
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
Abstract
The invention discloses a kind of 2N inverter parallel system and control method, a different name end of the coupling inductance a connects a phase of first inverter and the second inverter, connect after another different name end is in parallel with the input terminal of a separate inductor a；And so on, the connection relationship of the coupling inductance b and coupling inductance c；The output end of identical separate inductor is in parallel；Each separate inductor is used to inhibit the circulation between inverter unit；Each coupling inductance is used to inhibit the circulation in each inverter unit.Based on above-mentioned inverter parallel system, control method of the invention includes: to calculate the rising edge and failing edge of switching pulse, and obtain pwm signal according to synchronous sawtooth carrier wave and pulse phase shifting angle；The control to 2N inverter parallel structure is realized by pwm signal.Present invention combination coupling inductance and the advantage of separate inductor inhibit 2N inverter loop current, realize the expansion and its control of the inverter parallel system based on coupling inductance.
Description
Technical field
The invention belongs to field of power electronics, more particularly, to a kind of 2N inverter parallel system and its controlling party
Method.
Background technique
Voltage source inverter is widely used in many power conversion applications, and usually parallel running is higher to obtain
Electric current is exported, system nominal power is effectively improved.The shunt chopper degree of modularity is high, is suitble to use fault-toleranr technique, guarantee
The reliability of system.Staggeredly pulsewidth modulation have reduce electrical current harmonic and passive device loss ability, increasingly by
The attention of people.In addition, the zero common mode modulation based on two inverter parallel systems can theoretically realize zero common-mode voltage, it can be bright
Aobvious inhibition system common-mode electric current and common mode EMI.When being modulated using staggeredly pulsewidth modulation or zero common mode, the instantaneous electricity that is artificially introduced
Pressure difference results in the appearance of circulation problem.Since circulation can bring biggish power loss, makes power device overstress, make inductance
Saturation, it is therefore necessary to be resolved.
Currently, there are mainly three types of hardware modes to inhibit circulation: (1) isolating transformer；(2) coupling inductance；(3) independent electrical
Sense.Wherein, simplest is to flank in system dc side or exchange into isolating transformer, blocks closed loop flow path, however is isolated and becomes
The major defect of depressor is to need that a volume is big, expensive Industrial Frequency Transformer, and therefore, it is not preferred.Coupling inductance
It can be realized being highly coupled for bridge arm in parallel, main magnetic circuit is mainly used to circulation between inhibition bridge arm, and leakage inductance is as line inductance, tool
There is higher power density.Since coupling inductance cannot be designed as arbitrary number, be more suitable for it is fixed or peanut and
Connection system.Separate inductor is mostly used to limit circulation currently, being directed to N number of inverter parallel system, but its bulking value is obvious
Greater than coupling inductance；Coupling inductance is mainly used for inhibiting two inverter parallel systems, can not directly be extended to multiple inverters
System；Zero common mode modulation algorithm is suitable for two parallelly connected reverse converter systems, can not directly be extended to multiple inverter systems.
Summary of the invention
In view of the drawbacks of the prior art, the purpose of the present invention is to provide a kind of 2N inverter parallel system and its controls
Method, it is intended to solve the problems, such as that coupling inductance and the modulation of zero common mode can not be extended to multiple inverter parallel systems.
To achieve the above object, the present invention provides a kind of 2N inverter parallel systems, comprising: N number of inverter unit
With 3N separate inductor；The inverter unit include the first inverter, the second inverter, coupling inductance a, coupling inductance b and
Coupling inductance c；
A different name end of the coupling inductance a connects a phase of first inverter and the second inverter, another different name
It is connect after end is in parallel with the input terminal of a separate inductor a；
A different name end of the coupling inductance b connects the b phase of first inverter and the second inverter, another different name
It is connect after end is in parallel with the input terminal of a separate inductor b；
A different name end of the coupling inductance c connects the c phase of first inverter and the second inverter, another different name
It is connect after end is in parallel with the input terminal of a separate inductor c；
The output end of each separate inductor a is in parallel；The output end of each separate inductor b is in parallel；The output end of each separate inductor b is simultaneously
Connection；
Each separate inductor is used to inhibit the circulation between inverter unit；Each coupling inductance is for inhibiting each inversion
Circulation in device unit.
Based on 2N inverter parallel system proposed by the present invention, the present invention provides corresponding control methods, comprising:
S1: according to the pulse phase shifting angle sawtooth carrier wave synchronous with clock, the rising edge and failing edge of switching pulse are calculated；
S2: the size between rising edge and failing edge by comparing synchronous sawtooth carrier wave, switching pulse obtains PWM letter
Number；
S3: the shutdown and conducting of each switching tube in inverter are controlled by pwm signal, and then is realized to 2N inverter simultaneously
It is coupled the modulation of structure.
Preferably, in above-mentioned steps S1, the pulse phase shifting angle includes: pulse angle of phase displacement and inversion in inverter unit
Pulse angle of phase displacement between device unit；
The production method of pulse angle of phase displacement in the inverter unit is the cross lode based on the synchronous sawtooth carrier wave of clock
Wide modulation or zero common mode pulsewidth modulation；
The selection at the pulse phase shifting angle between the inverter unit can optimize electric current output harmonic wave；When total using zero in unit
When mould is modulated and modulation ratio is greater than 0.6, the unit can be reduced when phase shifting angle is set as 90 degree between unit to the greatest extent by coupling
The circulation peak value for closing inductance reduces setting for the unit coupling inductance to reduce the maximum saturation flux density of the unit coupling inductance
Count volume and weight.
Preferably, in above-mentioned steps S1, the method for the rising edge and failing edge that calculate switching pulse includes:
S1.1 calculates pulse switch according to the peak value of sawtooth carrier wave, the pulse switch duty when pulse phase shifting angle of setting
Initial rising edge and failing edge:
The initial rising edge of S1.2 pulse switch is compared with the peak value of sawtooth carrier wave respectively with failing edge, if on initial
It rises along the peak value for being less than or equal to sawtooth carrier wave with failing edge, then retains initial rising edge and failing edge；Otherwise, rising edge is updated
With failing edge；
Difference of the updated rising edge between initial rising edge and the peak value of sawtooth carrier wave, updated failing edge
For the difference between initial falling edge and the peak value of sawtooth carrier wave；
Specific manifestation are as follows:
(1) rising edge and failing edge are calculated:
(2) compare Rx,j,iSize, F with PRDx,j,iWith the size of PRD, F is updatedx,j,i、Rx,j,i；
Specific update method are as follows:
If Rx,j,i≤ PRD, then:
Otherwise,
If Fx,j,i≤ PRD, then:
Otherwise
Wherein, Fx,j,iIndicate the failing edge of i-th of inverter pwm pulse of x phase j unit, Rx,j,iIndicate x phase j unit i-th
The rising edge of a inverter pwm pulse, d indicate the duty ratio of PWM, and shift_in and shift_out respectively indicate pwm pulse list
Phase shift angle in first between unit, shift indicate the total phase shift angle (shift=shift_in+shift_ of pwm pulse
Out), range is from 0 to 1, indicates from 0 degree to 360 degree, and PRD table shows the peak value of sawtooth wave.
In S2 step, the method that obtains pwm signal are as follows:
When the failing edge of switching pulse is greater than rising edge, if sawtooth carrier wave falls between, pwm pulse output is high
Level；Otherwise, pwm pulse exports low level；
When the rising edge of switching pulse is greater than failing edge, if sawtooth carrier wave falls between, pwm pulse output is low
Level；Otherwise, pwm pulse exports high level.
Contemplated above technical scheme through the invention, compared with prior art, can obtain the utility model has the advantages that
(1) one aspect of the present invention provides 2N inverter parallel system, uses coupling inductance, unit in inverter unit
Between carried out by separate inductor in parallel, not only combine the high advantage of coupling inductance power density, carried out inside inverter unit
The shortcomings that inhibiting circulation, while overcoming coupling inductance to be unable to multi-inverter parallel using separate inductor, realize with 2 inverters and
3 coupling inductances are the extension of unit；On the other hand the present invention provides the control methods to 2N inverter parallel system, will
The zero common mode modulation algorithm suitable for two shunt choppers has been generalized to 2N inverter parallel system, solves coupling inductance
The problem of being only applicable to the loop current suppression of fixed or peanut inverter parallel system.
(2) in the present invention, it when using the modulation of zero common mode in inverter unit and modulation ratio is greater than 0.6, is moved between unit
Phase angle, which is set as 90 degree, can utmostly reduce circulation peak value of the unit Jing Guo coupling inductance, to reduce unit coupling electricity
The maximum saturation flux density of sense reduces the design volume and weight of the unit coupling inductance.
(3) present invention is directed to 2N inverter parallel system, proposes corresponding modulator approach, each inverter is through identical
The pulse angle of phase displacement that sawtooth carrier wave and same procedure obtain, can effectively synchronize the output of each inverter pwm pulse signal, real
The accurate control of existing pulse position.
Detailed description of the invention
Fig. 1 is a kind of structural schematic diagram of four inverter parallel systems provided by the invention；
Fig. 2 is the structural schematic diagram of four traditional inverter parallels；
Fig. 3 is coupling inductance schematic diagram；
Fig. 4 (a) is that schematic diagram is realized in the control of the pwm pulse as F > R provided by the invention；
Fig. 4 (b) is that schematic diagram is realized in the control of the pwm pulse as F < R provided by the invention；
Unit interior circulation and common-mode voltage schematic diagram between unit when Fig. 5 is shift_out=0 provided by the invention；
Circulation and common-mode voltage signal between unit in unit when Fig. 6 is shift_out=0.25 provided by the invention
Figure.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, with reference to the accompanying drawings and embodiments, right
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.
The present invention provides a kind of 2N inverter parallel systems, comprising: N number of inverter unit and 3N separate inductor；
The inverter unit includes the first inverter, the second inverter, coupling inductance a, coupling inductance b and coupling inductance c；
A different name end of the coupling inductance a connects a phase of first inverter and the second inverter, another different name
It is connect after end is in parallel with the input terminal of a separate inductor a；
A different name end of the coupling inductance b connects the b phase of first inverter and the second inverter, another different name
It is connect after end is in parallel with the input terminal of a separate inductor b；
A different name end of the coupling inductance c connects the c phase of first inverter and the second inverter, another different name
It is connect after end is in parallel with the input terminal of a separate inductor c；
The output end of each separate inductor a is in parallel；The output end of each separate inductor b is in parallel；The output end of each separate inductor b is simultaneously
Connection；
Each separate inductor is used to inhibit the circulation between inverter unit；Each coupling inductance is for inhibiting each inversion
Circulation in device unit.
As shown in Figure 1, embodiment provides a kind of structural schematic diagram of four inverter parallel systems, including first unit
And second unit, as shown in Figure 1, two inverters pass through circulation in coupling inductance inhibition unit in unit；By only between unit
Vertical inductance inhibits circulation between unit.Four traditional inverter parallel structures are illustrated in figure 2, are pressed down using single separate inductor
Circulation processed needs 12 separate inductors using traditional parallel-connection structure altogether；According to parallel-connection structure proposed by the present invention, need altogether
Want 6 coupling inductances and 6 separate inductors.The design of coupling inductance is without the concern for output current phase, only by high frequency circulating currents peak
Value determines, thus has apparent weight and volume advantage.Therefore, it using topology in parallel proposed by the present invention, can significantly mention
Rise system power-density.
Fig. 3 gives a typical coupling inductance schematic diagram, and there are two winding W and W altogether for the coupling inductance*, two lines
Circle has identical the number of turns, is reversely wound on magnetic core.ia1And ia2For bridge arm current in parallel, φa1And φa2For its corresponding magnetic flux.Reason
By upper ia1And ia2Fundametal compoment is identical, and magnetic core main magnetic circuit is mainly determined by circulation in unit, and leakage inductance mainly acts on output
Circulation between phase current and unit.
As can be seen from Figure 3, there are four ports for coupling inductance, form two pairs of different name ends, i.e. ia1With ia2Input terminal is a pair of of different name
End, other two port are another pair different name end；
It need to indicate, to ensure that sampled signal is consistent with pwm signal, be controlled using master-slave controller, from controller
Sampled signal is sent to master controller, while receiving duty cycle signals；Pwm signal is transmitted to by generating from controller
IGBT driving board；To guarantee carrier wave consistency, master controller is by synchronous signal line to respectively synchronizing from the carrier wave of inverter；
In order to guarantee the consistency of modulated signal, master controller while output duty cycle.
Based on 2N inverter parallel structure proposed by the present invention, the present invention provides corresponding control methods, comprising:
S1: according to the pulse phase shifting angle sawtooth carrier wave synchronous with clock, the rising edge and failing edge of switching pulse are calculated；
S2: the size between rising edge and failing edge by comparing synchronous sawtooth carrier wave, switching pulse obtains PWM letter
Number；
S3: the shutdown and conducting of each switching tube in inverter are controlled by pwm signal, and then is realized to 2N inverter simultaneously
It is coupled the modulation of structure.
Preferably, in above-mentioned steps S1, the pulse phase shifting angle includes: pulse angle of phase displacement and inversion in inverter unit
Pulse angle of phase displacement between device unit；
Staggeredly pulsewidth modulation or zero of the generation of pulse angle of phase displacement in the inverter unit based on synchronous sawtooth carrier wave
Common mode pulsewidth modulation；
Preferably, in above-mentioned steps S1, the method for the rising edge and failing edge that calculate switching pulse includes:
S1.1 calculates pulse switch according to the peak value of sawtooth carrier wave, the pulse switch duty when pulse phase shifting angle of setting
Initial rising edge and failing edge:
The initial rising edge of S1.2 pulse switch is compared with the peak value of sawtooth carrier wave respectively with failing edge, if on initial
It rises along the peak value for being less than or equal to sawtooth carrier wave with failing edge, then retains initial rising edge and failing edge；Otherwise, rising edge is updated
With failing edge；
Difference of the updated rising edge between initial rising edge and the peak value of sawtooth carrier wave, updated failing edge
For the difference between initial falling edge and the peak value of sawtooth carrier wave；
Fig. 4 (a) and Fig. 4 (b) gives pwm pulse control schematic diagram of the invention, and 4 inverters are carried using synchronous sawtooth
Bobbi relatively generates pulse.In order to realize the control of pulse position, each switching pulse is controlled respectively using two comparand registers
Rising edge (R) and failing edge (F), pwm pulse relatively obtained by carrier wave and corresponding reference wave.It specifically includes:
(1) rising edge and failing edge are calculated:
(2) compare Rx,j,iSize, F with PRDx,j,iWith the size of PRD, F is updatedx,j,i、Rx,j,i；
Specific update method are as follows:
If Rx,j,i≤ PRD, then:
Otherwise,
If Fx,j,i≤ PRD, then:
Otherwise
Wherein, Fx,j,iIndicate the failing edge of i-th of inverter pwm pulse of x phase j unit, Rx,j,iIndicate x phase j unit i-th
The rising edge of a inverter pwm pulse, d indicate the duty ratio of PWM, and shift_in and shift_out respectively indicate pwm pulse list
Phase shift angle in first and outside unit, shift indicate the total phase shift angle (shift=shift_in+shift_ of pwm pulse
Out), range is from 0 to 1, indicates from 0 degree to 360 degree, and PRD table shows the peak value of sawtooth wave.
In S2 step, the method that obtains pwm signal are as follows:
As shown in Fig. 4 (a), when the failing edge of switching pulse be greater than rising edge (F > R) when, if sawtooth carrier wave between the two it
Between, then pwm pulse exports high level；Otherwise, pwm pulse exports low level；
As shown in Fig. 4 (b), when the rising edge of switching pulse be greater than failing edge (R > F) when, if sawtooth carrier wave between the two it
Between, then pwm pulse exports low level；Otherwise, pwm pulse exports high level.
The present invention obtains pwm pulse position by taking zero common mode modulation algorithm as an example, by controlling 2N inverter parallel system,
Realize the loop current suppression in each inverter unit between unit, specific as follows:
Inverter in first unit and second unit is all made of zero common mode modulation algorithm, and pwm pulse position can between unit
Carry out phase shift；
Fig. 5 is that pulse phase shifting angle is 0 degree between first unit and second unit, i.e. when shift_out=0, the first inverter
Circulation and common-mode voltage schematic diagram in unit and the second inverter unit and its between unit, due to the first inverter unit with
Pulse phase shifting angle between second inverter unit is 0 degree, i.e. the first inverter unit and the second inverter unit impulsive synchronization, the
Circulation between one inversion unit and the second inverter unit is 0, high frequency ring in the first inverter unit and the second inverter unit
Stream is consistent, and common-mode voltage is always 0 at this time, and output current phase THD is 1.78%.
Fig. 6 is that the pulse angle of phase displacement between the first inverter unit and the second inverter unit is 90 degree, i.e. shift_out=
When 0.25, circulation and common-mode voltage schematic diagram in the first inverter and the second inverter unit and its between unit, due to the
Pulse angle of phase displacement between one inverter unit and the second inverter unit is 90 degree, i.e. the first inverter unit and the second inverter
Unit pulse is asynchronous, has high frequency circulating currents, the first inverter unit and second between the first inverter and the second inverter at this time
High frequency circulating currents are inconsistent in inverter unit, and the second inverter unit inner ring stream peak value is smaller, at this point, common-mode voltage is always 0,
Output current phase THD is 0.67%, and output current quality is improved.
As it will be easily appreciated by one skilled in the art that the foregoing is merely illustrative of the preferred embodiments of the present invention, not to
The limitation present invention, any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should all include
Within protection scope of the present invention.
Claims (9)
1. a kind of 2N inverter parallel system characterized by comprising N number of inverter unit and 3N separate inductor；It is described
Inverter unit includes the first inverter, the second inverter, coupling inductance a, coupling inductance b and coupling inductance c；
A different name end of the coupling inductance a connects a phase of first inverter and the second inverter, and another different name end is simultaneously
It is connect after connection with the input terminal of a separate inductor a；
A different name end of the coupling inductance b connects the b phase of first inverter and the second inverter, and another different name end is simultaneously
It is connect after connection with the input terminal of a separate inductor b；
A different name end of the coupling inductance c connects the c phase of first inverter and the second inverter, and another different name end is simultaneously
It is connect after connection with the input terminal of a separate inductor c；
The output end of each separate inductor a is in parallel；The output end of each separate inductor b is in parallel；The output end of each separate inductor c is in parallel；
Each separate inductor is used to inhibit the circulation between inverter unit；Each coupling inductance is for inhibiting each inverter list
Circulation in member.
2. 2N inverter parallel system as described in claim 1, which is characterized in that the pulsion phase in the inverter unit
Staggeredly pulsewidth modulation or zero common mode pulsewidth modulation of the angle based on the synchronous sawtooth carrier wave of clock is moved to generate.
3. 2N inverter parallel system as claimed in claim 1 or 2, which is characterized in that have arteries and veins between the inverter unit
Rush angle of phase displacement.
4. the control method based on 2N inverter parallel system described in claim 1 characterized by comprising
S1: according to the pulse phase shifting angle sawtooth carrier wave synchronous with clock, the rising edge and failing edge of switching pulse are calculated；
S2: rising edge and failing edge by comparing synchronous sawtooth carrier wave, switching pulse obtain pwm signal；
S3: the shutdown and conducting of each switching tube in inverter are controlled by pwm signal, and then is realized to 2N inverter parallel knot
The control of structure.
5. control method as claimed in claim 4, which is characterized in that the pulse phase shifting angle includes: in inverter unit
Pulse angle of phase displacement between pulse angle of phase displacement and inverter unit.
6. control method as claimed in claim 5, which is characterized in that the generation of the pulse angle of phase displacement in the inverter unit
Method is staggeredly pulsewidth modulation or the zero common mode pulsewidth modulation based on the synchronous sawtooth carrier wave of clock.
7. control method as claimed in claim 6, which is characterized in that modulated and modulated using zero common mode when in inverter unit
When than being greater than 0.6, phase shifting angle is set as 90 degree between unit.
8. control method as claimed in claim 4, which is characterized in that the step S1 includes:
S1.1: according to the peak value of sawtooth carrier wave, the pulse switch duty when pulse phase shifting angle of setting, calculate pulse switch just
Beginning rising edge and failing edge:
S1.2: comparing the initial rising edge of pulse switch and the peak value of sawtooth carrier wave, if initial rising edge is carried less than or equal to sawtooth
The peak value of wave then retains initial rising edge；Otherwise, difference of the rising edge between initial rising edge and the peak value of sawtooth carrier wave is updated
Value；
And the initial falling edge of pulse switch and the peak value of sawtooth carrier wave are compared, if initial falling edge is less than or equal to sawtooth carrier wave
Peak value then retains initial failing edge；Otherwise, difference of the failing edge between initial falling edge and the peak value of sawtooth carrier wave is updated.
9. control method as claimed in claim 8, which is characterized in that the acquisition methods of the pwm signal are as follows:
When the failing edge of switching pulse is greater than rising edge, if sawtooth carrier wave falls between, the high electricity of pwm pulse output
It is flat；Otherwise, pwm pulse exports low level；
When the rising edge of switching pulse is greater than failing edge, if sawtooth carrier wave falls between, pwm pulse exports low electricity
It is flat；Otherwise, pwm pulse exports high level.
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