CN110176435B - 物理量传感器和半导体器件 - Google Patents

物理量传感器和半导体器件 Download PDF

Info

Publication number
CN110176435B
CN110176435B CN201910112771.2A CN201910112771A CN110176435B CN 110176435 B CN110176435 B CN 110176435B CN 201910112771 A CN201910112771 A CN 201910112771A CN 110176435 B CN110176435 B CN 110176435B
Authority
CN
China
Prior art keywords
adhesive layer
sensor chip
sensor
physical quantity
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201910112771.2A
Other languages
English (en)
Other versions
CN110176435A (zh
Inventor
黑川景亮
马渡和明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Publication of CN110176435A publication Critical patent/CN110176435A/zh
Application granted granted Critical
Publication of CN110176435B publication Critical patent/CN110176435B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032—Packages or encapsulation
    • B81B7/0045—Packages or encapsulation for reducing stress inside of the package structure
    • B81B7/0048—Packages or encapsulation for reducing stress inside of the package structure between the MEMS die and the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92—Specific sequence of method steps
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2201/00—Specific applications of microelectromechanical systems
    • B81B2201/02—Sensors
    • B81B2201/0228—Inertial sensors
    • B81B2201/0235—Accelerometers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2201/00—Specific applications of microelectromechanical systems
    • B81B2201/02—Sensors
    • B81B2201/0228—Inertial sensors
    • B81B2201/0242—Gyroscopes
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2201/00—Specific applications of microelectromechanical systems
    • B81B2201/02—Sensors
    • B81B2201/0264—Pressure sensors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29075—Plural core members
    • H01L2224/29076—Plural core members being mutually engaged together, e.g. through inserts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29075—Plural core members
    • H01L2224/29078—Plural core members being disposed next to each other, e.g. side-to-side arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29075—Plural core members
    • H01L2224/2908—Plural core members being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H01L2224/29191—The principal constituent being an elastomer, e.g. silicones, isoprene, neoprene
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H01L2224/29291—The principal constituent being an elastomer, e.g. silicones, isoprene, neoprene
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/29386—Base material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/2939—Base material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/2939—Base material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H01L2224/29391—The principal constituent being an elastomer, e.g. silicones, isoprene, neoprene
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83862—Heat curing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83909—Post-treatment of the layer connector or bonding area
    • H01L2224/8391—Cleaning, e.g. oxide removal step, desmearing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852—Applying energy for connecting
    • H01L2224/85201—Compression bonding
    • H01L2224/85205—Ultrasonic bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/146—Mixed devices
    • H01L2924/1461—MEMS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Dispersion Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Pressure Sensors (AREA)
  • Measuring Fluid Pressure (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Die Bonding (AREA)

Abstract

一种物理量传感器，包括：传感器芯片(3)，具有输出对应于物理量的信号的传感器部分；支撑构件(1)，传感器芯片安装到其上；粘合层(2)，设置在支撑构件的侧面(1a)上，所述粘合层支撑传感器芯片；以及导线(4)，在传感器芯片的侧面(3a)上电连接到传感器芯片，传感器芯片的侧面与粘合层相对。本文的粘合层包括表现出膨胀特性的材料，其中，随着剪切速率增大，剪切应力以多维函数增大。

Description

物理量传感器和半导体器件
技术领域
本公开内容涉及物理量传感器和半导体器件。
背景技术
传统上已知物理量传感器，其包括(i)传感器芯片，其具有用于输出对应于物理量的信号的传感器部分，(ii)支撑构件，其上安装有传感器芯片，(iii)粘合层，其设置在支撑构件上并支撑传感器芯片，以及(iv)导线，其电连接到传感器芯片。这种物理量传感器包括专利文献1中描述的传感器。
专利文献1中描述的物理量传感器具有如下配置，其中具有传感器部分的传感器芯片作为支撑构件安装在基板上，其间插入有粘合层，并且导线在传感器芯片的与面向粘合层的一个侧面相对的另一侧面上电连接到传感器芯片。
专利文献1：JP 2005-228777A
发明内容
此类物理量传感器例如可以通过在制备的支撑构件上涂敷含有粘合材料的涂层溶液以形成粘合层，将传感器芯片安装在粘合层上，然后执行导线与传感器芯片的引线键合以相互电连接来获得。
此处，当通过诸如超声波加压的方法执行引线键合时，为了稳定引线键合，优选的是，超声波的能量传递到传感器芯片，不会通过粘合层逸出。即，从确保引线键合的稳定性的观点来看，优选的是，粘合层由可变形性较小的材料制成，以防止传递到传感器芯片的能量从传感器芯片逸出。即，优选粘合层由具有高弹性的硬质材料制成。
另一方面，在此类物理量传感器中，支撑构件和传感器芯片由具有不同线性膨胀系数的材料制成；当发生温度变化时，通过粘合层在传感器芯片中产生由于线性膨胀系数的差异引起的热应力。为了减轻由支撑构件和传感器芯片之间的线性膨胀系数的差异引起的热应力并确保可靠性，优选的是，粘合层由易于弹性变形的并且不太可能会将由于支撑构件的热量引起的变形传递到传感器芯片的材料制成。即，优选地，粘合层被配置为包括具有低弹性的柔软材料。
换言之，用于此类物理量传感器的粘合层在确保引线键合的稳定性和确保温度变化的可靠性方面要求具有相反的特性；很难满足同时这两个要求。这不限于安装传感器芯片的情况，并且这同样适用于使用不输出对应于物理量的电信号的半导体芯片的半导体器件。
本公开内容的目的是提供物理量传感器和半导体器件，物理量传感器和半导体器件中的每者包括能够实现引线键合稳定性和温度变化可靠性的粘合层。
为了实现上述目的，根据本公开内容的第一示例，提供物理量传感器以包括(i)传感器芯片，其具有输出对应于物理量的信号的传感器部分，(ii)支撑构件，传感器芯片安装到其上，(iii)粘合层，其设置在支撑构件的侧面上以支撑传感器芯片，和(iv)导线，其在传感器芯片的与粘合层相对的侧面上电连接到传感器芯片。粘合层包括表现出膨胀特性的材料，其中，随着剪切速率增大，剪切应力以多维函数增大。
在这样的配置中，粘合层具有表现出膨胀特性的材料，随着剪切速率增大，剪切应力以多维函数增大。
结果，物理量传感器设置有粘合层，该粘合层具有表现出膨胀特性的材料，使得当施加更大的剪切速率时，剪切应力以多维函数变得更大。因此，当施加大的剪切速率(即，突然的外力)时，支撑传感器芯片的粘合层表现出高剪切应力，即，作为硬特性的高弹性；当施加小的剪切速率时，粘合层表现出作为软特性的低弹性。
因此，提供粘合层以当由于引线键合引起的突然外力施加到传感器芯片时表现出高弹性，并且在执行引线键合之后表现出低弹性。这实现了确保引线键合的稳定性并通过减轻热应力来确保可靠性的物理量传感器。
根据本公开内容的第二示例，提供了一种半导体器件，包括(i)电路芯片；(ii)支撑构件，电路芯片安装到其上；粘合层，设置在支撑构件的侧面上以支撑电路芯片；及导线，在电路芯片的与粘合层相对的侧面上电连接到电路芯片。粘合层包括表现出膨胀特性的材料，其中，随着剪切速率增大，剪切应力以多维函数增大。
第二示例的上述配置可以提供半导体器件，其中，与根据第一示例的物理量传感器类似，可以确保引线键合的稳定性并通过减轻热应力来确保可靠性，并且减轻施加到电路芯片的热应力抑制了电路电特性的变化。
附图说明
根据以下参考附图的详细描述，本公开内容的上述和其他目的、特征和优点将变得更加明显。在附图中：
图1是示出根据第一实施例的物理量传感器的横截面的示意性横截面图；
图2是示出改性粘合层的膨胀特性、剪切应力或粘度与剪切速率的关系的示意图；
图3是示出根据第二实施例的物理量传感器的横截面的示意性横截面图；
图4是示出根据第三实施例的物理量传感器的横截面的示意性横截面图；
图5是示出根据第四实施例的物理量传感器的横截面的示意性横截面图；
图6是示出根据第四实施例的物理量传感器的修改示例中的横截面的示意性横截面图；
图7是示出根据第五实施例的物理量传感器的横截面的示意性横截面图。
图8是示出根据第五实施例的物理量传感器的修改示例的横截面的示意性横截面图；以及
图9是示出根据另一实施例的物理量传感器的横截面的示意性横截面图。
具体实施方式
在下文中，将参考附图描述本公开内容的实施例。将用相同的附图标记表示相同或等同的部分来描述以下实施例。
(第一实施例)
将参考图1和图2描述根据第一实施例的物理量传感器。该实施例的物理量传感器应用于例如安装在诸如汽车的车辆中的物理量传感器，以输出与施加到车辆或其组成部分的物理量相对应的信号。
在图1中，为了使物理量传感器的配置更容易理解，厚度和尺寸被夸大和变形。此外，为了易于理解，可以将图1的上侧描述为物理量传感器的上侧或前侧；可以将图1的下侧描述为物理量传感器的下侧或后侧。这可以适用于图3至图9的其他附图。在图2中，为了便于观察，改性粘合层21的剪切应力(ST)用实线表示，改性粘合层21的粘度(VI)用虚线表示。
如图1所示，该实施例的物理量传感器包括支撑构件1、粘合层2、传感器芯片3和导线4。物理量传感器被配置为向导线4输出与作用在传感器芯片3上的物理量相对应的信号。
如图1所示，支撑构件1是具有前侧面1a(也可以称为表面1a)的支撑件。传感器芯片3经由粘合层2安装在支撑构件1的前侧面1a上。支撑构件1以诸如基板、引线框架、壳体部件等的形式配置，并且取决于物理量传感器的预期用途，由诸如树脂材料或导电金属材料的预定材料制成。例如，当该实施例的物理量传感器被配置为压力传感器时，支撑构件1可以是包括树脂材料的树脂模制体，或者可以是由金属材料制成的壳体。
如图1所示，粘合层2是设置在支撑构件1的前侧面1a上的层，用于将传感器芯片3安装在支撑构件1上，并且用例如分配器(dispenser)等形成。粘合层2包括一种材料，当施加慢剪切刺激，即施加缓慢的外力时，该材料表现出低弹性，而当施加较快的剪切刺激(例如，施加突然的外力)时，该材料表现出高弹性。即，粘合层2包括表现出膨胀特性的材料。
具体地，粘合层2在施加快剪切刺激(例如，后面描述的导线4与传感器芯片3的引线键合)的状态下表现出高弹性，并且在连接导线4之后施加例如热应力的慢剪切刺激的状态下表现出低弹性。即，粘合层2具有表现出膨胀特性的材料，其中导线4与传感器芯片3的引线键合中的弹性模量高于在将导线4连接到传感器芯片3之后的弹性模量。
此处，“高弹性”表示其弹性模量为100MPa至30GPa，“低弹性”表示其弹性模量为0.1MPa至10MPa。
在本实施例中，如图1所示，粘合层2被配置为包括表现出上述膨胀特性的膨胀性流体，并且整个粘合层2制成表现出膨胀特性的改性粘合层21。在本实施例中，粘合层2由表现出高弹性的高弹性材料和表现出低弹性的低弹性材料的混合物制成。
例如，(i)诸如SiO2的无机材料和/或(ii)诸如聚乙烯的热塑性树脂的有机材料，和/或诸如酚醛树脂的热固性树脂可用作高弹性材料。另一方面，有机粘合剂材料(例如硅树脂、聚丙烯酸酯、全氟聚醚)可用作低弹性材料。在这种情况下，高弹性材料是例如粒径为10μm或更大的粒状材料，以在混合物中表现出膨胀特性。另外，为了确保在混合物中表现出膨胀特性的宽区域，优选高弹性材料相对于整个混合物的含量为50体积％或更高。具体地，例如，粘合层2可以采用如下材料，其中诸如SiO2的高弹性材料和诸如硅酮的低弹性材料混合在诸如乙酸乙烯酯树脂类型或环氧树脂类型的乳液(emulsion)中，高弹性材料含量为50体积％或更高。
例如，如上所述，改性粘合层21由具有高弹性和低弹性的材料制成，并且满足以下表达式(1)和(2)，即具有膨胀特性。
T＝μ×vn...(1)
η＝μ×v(n-1)...(2)
在表达式(1)或表达式(2)中，T是在混合物中产生的剪切应力(单位：Pa)，v是在混合物中产生的剪切速率(单位：sec-1)，并且η是混合物中的粘度(单位：Pa×sec)。此外，μ是常数，而n是大于2(二)的数。即，如图2所示，改性粘合层21具有这样的性质：随着施加到改性粘合层21的剪切速率增大(即，随着剪切刺激变得更快)，改性粘合层21的粘度η和改性粘合层21中产生的剪切应力T以多维函数增大。稍后将描述该改性粘合层21的效果。
如图1所示，例如，传感器芯片3形成为具有一个侧面3a(其可以称为第一侧面)的矩形板形状，以设置成使得与一个侧面3a相对的相对侧面3b(其可以称为作为第二侧面或另一侧面)与粘合层2接触；传感器芯片3由诸如Si的半导体材料制成。传感器芯片3包括传感器部分(未示出)，该传感器部分输出对应于诸如压力、加速度、角速度等的一个物理量的信号；传感器部分(其也可以称为传感器)形成在一个侧面3a上。传感器芯片3通过半导体工艺制造。传感器芯片3包括形成在一个侧面3a上的电极焊盘(未示出)；如图1所示，导线4连接到电极焊盘。
另外，例如，当输出对应于压力的信号时，传感器部分被配置为包括隔膜(diaphragm)或表测电阻(gauge resistance)。传感器部分具有根据待检测物理量的配置。
导线4是用于将传感器芯片3与其他构件电连接的构件，例如由诸如铝或金的导电金属材料制成，并且被使用引线键合连接。在本实施例中，导线4将传感器芯片3与支撑构件1电连接。然而，传感器芯片3可以电连接到另一个构件(未示出)。可以根据物理量传感器的目的适当地改变导线4的数量和连接部分。
以上是本实施例的物理量传感器的基本配置。取决于传感器芯片3的类型，本实施例的物理量传感器例如是压力传感器、加速度传感器、陀螺仪传感器等，并且根据目的可以包括其他构件等(未示出)。
接下来，将描述表现出膨胀特性的改性粘合层21的效果。
当导线4通过诸如超声波加压等的引线键合连接到传感器芯片3时，改性粘合层21表现出高弹性并且不易变形；这可以防止施加到传感器芯片3上的力逸出到外面并提供稳定引线键合的效果。
另一方面，在连接导线4之后，改性粘合层21表现出低弹性并且处于柔软状态。此处，假设本实施例的物理量传感器暴露于发生诸如冷却/加热循环的温度变化的环境的情况。在这种情况下，例如，在主要由Si制成的传感器芯片3中，由于传感器芯片3和由例如树脂材料制成的支撑构件1之间的线性膨胀系数的差异而产生热应力。然而，如上所述，改性粘合层21在连接线4之后(即在没有施加突然外力的情况下)表现出低弹性并且处于柔软状态。由此减轻了施加到传感器芯片3的热应力并确保了可靠性。
亦即是，改性粘合层21在导线4的引线键合时表现出高弹性以使其坚硬，而在引线键合之后的状态下表现出低弹性以使其柔软。这提供了确保引线键合的稳定性并通过减轻传感器芯片3上的热应力来确保可靠性的配置。
根据本公开内容的发明人的研究，当导线4连接到布置在粘合层2上的传感器芯片3时，传感器芯片3到粘合层2中的下沉的减少(下文中称为“芯片幅度”)提供改善引线键合稳定性的趋势。具体地，根据本发明人的研究，芯片幅度与(i)传感器芯片3和粘合层2之间的接触面积和(ii)粘合层2的弹性模量中的每一个成反比。
近年来，需要利用这种物理量传感器来减小传感器芯片3的尺寸，但是从引线键合的稳定性的观点来看，传感器芯片3的小型化可能是不合适的，因为与粘合层2的接触面积变小。然而，通过用表现出膨胀特性的改性粘合层21形成粘合层2，可以增大引线键合时粘合层2的弹性模量，并且可以降低芯片幅度。因此，即使传感器芯片3小型化，也预期本实施例的物理量传感器具有比以前更多地确保引线键合的稳定性的效果。
接下来，将描述制造本实施例的物理量传感器的方法的示例。然而，除了粘合层2形成为包括膨胀性流体的改性粘合层21这一事实之外，可以采用与这种传统物理量传感器相同的制造方法。因此，此处将简要描述除形成粘合层2的步骤之外的步骤。
例如，制备通过压缩成型等形成的树脂模制体作为支撑构件1。用例如分配器将膨胀性流体涂敷到树脂模制体的前侧面1a上以形成粘合层2。膨胀性流体例如通过以预定比例混合诸如硅树脂的低弹性材料和诸如SiO2的高弹性材料并搅拌来获得。
随后，制备通过半导体工艺制造的传感器芯片3。传感器芯片3放置在粘合层2上，使得与一个侧面3a相对的相对侧面3b面向粘合层2。此后，导线4连接到(i)传感器芯片3的一个侧面3a和(ii)支撑构件1，例如通过利用超声波压力施加的引线键合。最后，例如，通过加热和干燥除去粘合层2中包含的过量溶剂等，可以制造本实施例的物理量传感器。
注意，上述制造方法仅是示例并且可以适当地改变；例如，可以在引线键合之前执行干燥。例如，假设在引线键合之前干燥粘合层2的情况。在这种情况下，加热和干燥可以去除在粘合层2中包含的过量溶剂等，或者可以促进支撑构件1和传感器芯片3之间的连接。此后，通过以与上述相同的方式进行引线键合将导线4连接到传感器芯片3。
根据本实施例，物理量传感器包括粘合层2，粘合层2完全由改性粘合层21制成，改性粘合层21在引线键合时表现出高弹性并且在引线键合之后表现出低弹性。这实现了物理量传感器，其既可以确保引线键合的稳定性，又可以通过减轻热应力来确保可靠性。另外，本实施例的物理量传感器是即使传感器芯片3尺寸减小也能够比以前更多地确保引线键合的稳定性的物理量传感器。
(第二实施例)
将参考图3描述第二实施例的物理量传感器。在图3中，如图1所示，厚度和尺寸被夸大和变形。
如图3所示，该实施例的物理量传感器与第一实施例的不同之处在于，粘合层2包括(i)表现出膨胀特性的膨胀部分211和(ii)低弹性粘合剂22。在本实施例中，将主要描述这个差异。
在该实施例中，如图3所示，粘合层2包括多个膨胀部分211和低弹性粘合剂22。例如，通过用分配器等共同涂敷多个膨胀部分211和低弹性粘合剂22而形成粘合层2。即，在本实施例中，粘合层2由仅部分地表现出膨胀特性的材料制成。
膨胀部分211例如是如第一实施例中的高弹性材料和低弹性材料的混合物：然而，在本实施例中，膨胀部分211不是单层而是颗粒形状，例如，扁球形或长球形。例如，如图3所示，膨胀部分211分别布置在粘合层2中；每个膨胀部分211布置成接触支撑构件1和传感器芯片3。
注意，膨胀部分211可以配置为使得粘合层2在对传感器芯片3执行引线键合时不向支撑构件1传递由于引线键合而引起的外力。因此不需要所有膨胀部分211与支撑构件1和传感器芯片3都接触。此外，每个膨胀部分211的形状或膨胀部分211在粘合层2的层平面方向上的布置是自由选择的。
低弹性粘合剂22由表现出(i)有机类型的低弹性，所述有机类型例如硅树脂、聚丙烯酸酯、全氟聚醚等，和(ii)粘合性的材料制成；低弹性粘合剂22形成为单层，其中分散有多个膨胀部分211。低弹性粘合剂22可以采用在这种传统物理量传感器中使用的任何低弹性粘合剂。
根据该实施例，物理量传感器被配置为包括粘合层2，粘合层2通过包括膨胀部分211和低弹性粘合剂22而用作改性粘合层21。即使这样的配置也可以实现能够提供与第一实施例相同效果的物理量传感器。
(第三实施例)
将参考图4描述第三实施例的物理量传感器。在图4中，类似于图1，厚度和尺寸被夸大和变形。
如图4所示，根据本实施例的物理量传感器与第一实施例的不同之处在于：(i)粘合层2被配置为包括改性粘合层21和低弹性粘合剂22，以及(ii)改性粘合层21在横截面图中布置在传感器芯片3的导线4连接到的区域的直接下方(immediately below)。在本实施例中，将主要描述这个差异。
在该实施例中，如图4所示，粘合层2被配置为包括(i)设置在预定位置的改性粘合层21和(ii)低弹性粘合剂22。例如，它可以通过用分配器等单独涂敷(即涂覆)和形成改性粘合层21和低弹性粘合剂22而获得。
在本实施例中，例如，如图4所示，从与传感器芯片3的一个侧面3a垂直的方向看，即在垂直于一个侧面3a的方向上，改性粘合层21布置在粘合层2的导线4连接到的区域的直接下方的区域中。
在下文中，为了简化说明，以下定义如下：传感器芯片3的导线4连接到的一个侧面3a的一部分被称为“导线连接部分”；与导线连接部分相邻或围绕导线连接部分的一个侧面3a的区域被定义为“导线相邻区域”；包括导线连接部分和导线相邻区域的区域统称为“导线连接区域”。
从垂直于一个侧面3a的方向看，改性粘合层21设置在粘合层2的传感器芯片3的一个侧面3a的导线连接区域的外周突出到的区域中。换言之，如图4所示，改性粘合层21在横截面图中与导线连接区域平行设置。该配置实现了粘合层2，其帮助防止施加到导线连接部分的力逸出到支撑构件1，有助于确保引线键合的稳定性。
注意，从垂直于一个侧面的方向观察的导线连接区域的面积(即，区域的尺寸)可以自由选择，并且可以定义为可以确保引线键合的稳定性的程度。
在本实施例中，低弹性粘合剂22设置在粘合层2中与设置改性粘合层21的部分不同的剩余部分中。
根据本实施例，物理量传感器可以提供与第一实施例相同的效果。
(第四实施例)
将参考图5描述根据第四实施例的物理量传感器。在图5中，类似于图1，厚度和尺寸被夸大和变形。
该实施例的物理量传感器与第一实施例的不同之处在于，如图5所示，(i)粘合层2被配置为包括改性粘合层21和低弹性粘合剂22，和(ii)支撑构件1、低弹性粘合剂22和改性粘合层21从下侧按此顺序依次堆叠或层叠，而低弹性粘合剂22和改性粘合层21形成具有双层结构的粘合层2。在本实施例中，将主要描述这个差异。
在本实施例中，如图5所示，在支撑构件1的前侧面1a上，低弹性粘合剂22和改性粘合层21从下侧按此顺序堆叠，而低弹性粘合剂22和改性粘合层21形成包括在粘合层2中的双层结构。换言之，粘合层2具有双层结构，其中层合两个不同的层，并且其中一层是改性粘合层21。粘合层2通过例如用分配器等涂覆并形成低弹性粘合剂22，然后在低弹性粘合剂22上涂覆并形成改性粘合层21而获得。
如图5所示，改性粘合层21在横截面图中设置在低弹性粘合剂22上，并且设置在传感器芯片3的直接下方，以便接触与传感器芯片3的一个侧面3a相对的相对侧面3b。
如图5所示，低弹性粘合剂22层叠在支撑构件1的前侧面1a上。
根据本实施例，表现出膨胀特性的改性粘合层21设置在传感器芯片3的正下方；物理量传感器设置为具有粘合层2，该粘合层2能够确保引线键合的稳定性并通过缓和施加到传感器芯片3的热应力来确保可靠性。因此，根据本实施例的物理量传感器可以提供与第一实施例相同的效果。
(第四实施例的修改示例)
将参考图6描述第四实施例的物理量传感器的修改示例。在图6中，类似于图1，厚度和尺寸被夸大和变形。
该修改示例与第四实施例的不同之处在于，如图6所示，在粘合层2中，改性粘合层21和低弹性粘合剂22从下侧按此顺序堆叠。在该修改示例中，例如，与上述第四实施例相反，粘合层2通过用分配器等按此顺序涂覆并形成改性粘合层21和低弹性粘合剂22而获得。
在这种配置下，如图6所示，由于改性粘合层21预先形成在传感器芯片3直接下方的区域中，所以低弹性粘合剂22的厚度薄。在传感器芯片3的导线连接区域正下方的低弹性粘合剂22较薄，并且改性粘合层21设置成比低弹性粘合剂22更靠近支撑构件1。这实现了粘合层2的形成，其有助于防止在引线键合期间施加到传感器芯片3的外力逸出。
此修改示例的物理量传感器也可以提供与上述第四实施例相同的效果。
(第五实施例)
将参考图7描述第五实施例的物理量传感器。在图7中，如图1中所示，厚度和尺寸被夸大和变形。
如图7所示，该实施例的物理量传感器包括：(i)第一基板31，其具有用于输出对应于传感器芯片3的物理量的信号的传感器部分(未示出)，以及(ii)第二基板32；第二基板32和第一基板31从图7中的下侧到上侧按此顺序堆叠，改性粘合层21介于它们之间。此外，在本实施例的物理量传感器中，传感器芯片3安装到支撑构件1，使得第二基板32经由低弹性粘合剂22布置成面对支撑构件1的前侧面1a。此外，在本实施例的物理量传感器中，第一基板31的与面对改性粘合层21的侧面相对的侧面被定义为一个侧面3a；导线4连接到该一个侧面3a。在上述方面，该实施例的物理量传感器与第一实施例存在差异。在本实施例中，将主要描述这个差异。
第一基板31和第二基板32例如主要被配置为由诸如Si的半导体材料制成。如图7所示，传感器芯片3由经由改性粘合层21层合的第一基板31和第二基板32形成。在本实施例中，例如，传感器芯片3被配置为用作加速度传感器或角速度传感器，输出对应于加速度或角速度的信号。
利用这样的配置，当导线4通过引线键合连接到第一基板31的一个侧面3a时，在横截面图中设置在第一基板31正下方的改性粘合层21表现出高弹性以帮助防止施加到第一基板31的力逸出。即，本实施例的物理量传感器具有能够确保导线4的引线键合的稳定性的结构。另一方面，当热应力施加到第一基板31时，改性粘合层21表现出低弹性，使得通过改性粘合层21减轻该热应力，提供能够确保可靠性的结构。
本实施例可以实现提供与第一实施例相同的效果的物理量传感器。
(第五实施例的修改示例)
将参考图8描述第五实施例的物理量传感器的修改示例。在图8中。类似于图1，厚度和尺寸被夸大和变形。
该修改示例与第五实施例的不同之处在于，如图8所示，粘合层2配置为使得改性粘合层21和低弹性粘合剂22的垂直布置与上述第五实施例的垂直布置相反。
即使采用这样的配置，如图8所示，改性粘合层21设置在传感器芯片3的直接下方，即，在第二基板32正下方的区域中；这抑制了在引线键合时施加到传感器芯片3的外力逸出。
在该修改示例的物理量传感器中，也能够提供与第五实施例相同的效果。
(其他实施例)
注意，在每个上述实施例中描述的物理量传感器是本公开内容的物理量传感器的示例，不限于上述实施例中的每一个，并且可以在本公开内容的范围内适当地改变。
(1)例如，作为示例，上述实施例中的每一个描述了具有其中具有传感器部分(未示出)的传感器芯片3暴露于外部的结构的物理量传感器。然而，传感器芯片3可以用诸如硅胶的低弹性材料覆盖，这取决于物理量传感器的预期用途。
具体地，例如，当物理量传感器被配置为压力传感器时，如图9所示，粘合层2、传感器芯片3和导线4可以被配置为用诸如硅胶的低弹性材料5覆盖。在这种情况下，例如，如图9所示，支撑构件1是具有凹部11和内部布线12的树脂模制体，而传感器芯片3经由粘合层2设置在凹部11的底部。导线4连接到传感器芯片3的一个侧面3a，而传感器芯片3通过导线4电连接到设置在凹部11底侧上的内部布线12；内部布线12的一端从树脂模制体(即支撑构件1)露出。在这样的配置中，低弹性材料5填充凹部11并覆盖粘合层2、传感器芯片3和导线4。在这种情况下，当外部压力施加到低弹性材料5时，低弹性材料5变形并且传感器芯片3的传感器部分(未示出)输出对应于变形的信号。以这种方式，传感器芯片3可以用低弹性材料等覆盖到不干扰传感器部分(未示出)的操作的程度。
(2)第五实施例及其修改示例描述了如下示例，其中如第一实施例中的用于支撑第一基板31或第二基板32的改性粘合层21形成为膨胀性流体。然而，在第五实施例的改性粘合层21中可以采用第二至第四实施例中的粘合层2的配置。
(3)作为示例，上述实施例中的每一个描述了物理量传感器，该物理量传感器包括传感器芯片3，该传感器芯片3设置有输出对应于物理量的电信号的传感器部分。然而，传感器芯片3可以是不包括上述传感器部分的半导体芯片。例如，可以采用半导体器件，其中电路芯片(即，具有IC而不是传感器芯片3的半导体芯片)经由粘合层2安装到支撑构件1，同时导线4连接到电路芯片。这实现了一种半导体器件，其确保了引线键合的稳定性和之后的应力缓和。注意，除了仅用电路芯片代替传感器芯片3之外，该半导体器件的结构基本上与上述实施例中图1和图3至8中所示的结构相同。
另外，当热应力作用在电路芯片上时，电路芯片的布线微小地变形，并且存在电路的电特性会由于压电效应而波动的可能性。然而，该电特性波动会通过在引线键合之后提供应力缓和的粘合层2来抑制。还预期具有经由具有表现出膨胀特性的材料的粘合层2安装到其上的电路芯片的半导体器件具有用于抑制由于热应力引起的电特性波动的结构。同样地，还预期每个上述实施例的物理量传感器具有抑制由于热应力的缓和引起的电特性变化的效果。

Claims (4)

1.一种物理量传感器，包括：
传感器芯片，所述传感器芯片具有输出对应于物理量的信号的传感器；
支撑构件，所述传感器芯片安装到所述支撑构件；
粘合层，所述粘合层设置在所述支撑构件的侧面上，所述粘合层支撑所述传感器芯片；以及
导线，所述导线在所述传感器芯片的侧面上电连接到所述传感器芯片，所述传感器芯片的所述侧面与所述粘合层相对，
其中，所述粘合层包括表现出膨胀特性的材料，其中，随着剪切速率增大，剪切应力以多维函数增大，
所述粘合层部分地由包括表现出所述膨胀特性的所述材料的改性粘合层制成，
在所述传感器芯片的所述侧面上，所述传感器芯片的所述导线连接到的部分被定义为导线连接部分，
在所述传感器芯片的所述侧面上，与所述导线连接部分相邻的区域被定义为导线相邻区域，
在所述传感器芯片的所述侧面上，包括所述导线连接部分和所述导线相邻区域的区域被定义为导线连接区域，
在所述粘合层中，从垂直于所述传感器芯片的所述侧面的方向观察的所述导线连接区域的突出被定义为突出区域，
所述粘合层的所述突出区域是包括表现出所述膨胀特性的所述材料的所述改性粘合层，并且
所述粘合层的剩余部分由表现出比所述改性粘合层低的弹性的低弹性材料制成。
2.根据权利要求1所述的物理量传感器，其中：
所述传感器芯片被配置为包括(i)具有所述传感器的第一基板和(ii)从垂直于所述传感器芯片的所述侧面的方向观察时设置在所述第一基板直接下方的第二基板，所述第一基板与所述第二基板层合；并且
所述粘合层由所述改性粘合层制成，其设置在所述第二基板上以支撑所述第一基板。
3.根据权利要求1所述的物理量传感器，其中：
所述传感器芯片被配置为包括(i)具有所述传感器的第一基板和(ii)从垂直于所述传感器芯片的所述侧面的方向观察时设置在所述第一基板直接下方的第二基板，所述第一基板和所述第二基板层合；并且
所述粘合层由所述改性粘合层制成，其设置在所述第二基板下方以支撑所述第二基板。
4.一种半导体器件，包括：
电路芯片；
支撑构件，所述电路芯片安装到所述支撑构件；
粘合层，所述粘合层设置在所述支撑构件的侧面上，所述粘合层支撑所述电路芯片；以及
导线，所述导线在所述电路芯片的侧面上电连接到所述电路芯片，所述电路芯片的所述侧面与所述粘合层相对，
其中，所述粘合层包括表现出膨胀特性的材料，其中，随着剪切速率增大，剪切应力以多维函数增大，
所述粘合层部分地由包括表现出所述膨胀特性的所述材料的改性粘合层制成，
在所述电路芯片的所述侧面上，所述电路芯片的所述导线连接到的部分被定义为导线连接部分，
在所述电路芯片的所述侧面上，与所述导线连接部分相邻的区域被定义为导线相邻区域，
在所述电路芯片的所述侧面上，包括所述导线连接部分和所述导线相邻区域的区域被定义为导线连接区域，
在所述粘合层中，从垂直于所述电路芯片的所述侧面的方向观察的所述导线连接区域的突出被定义为突出区域，
所述粘合层的所述突出区域是包括表现出所述膨胀特性的所述材料的所述改性粘合层，并且
所述粘合层的剩余部分由表现出比所述改性粘合层低的弹性的低弹性材料制成。
CN201910112771.2A 2018-02-20 2019-02-13 物理量传感器和半导体器件 Active CN110176435B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018027846A JP7091696B2 (ja) 2018-02-20 2018-02-20 物理量センサおよび半導体装置
JP2018-027846 2018-12-20

Publications (2)

Publication Number Publication Date
CN110176435A CN110176435A (zh) 2019-08-27
CN110176435B true CN110176435B (zh) 2023-10-24

Family

ID=67481734

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910112771.2A Active CN110176435B (zh) 2018-02-20 2019-02-13 物理量传感器和半导体器件

Country Status (4)

Country Link
US (3) US20190256349A1 (zh)
JP (1) JP7091696B2 (zh)
CN (1) CN110176435B (zh)
DE (1) DE102019201492B4 (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6816603B2 (ja) 2017-03-27 2021-01-20 セイコーエプソン株式会社 物理量センサー、電子機器、および移動体
EP3929540A1 (en) * 2020-06-26 2021-12-29 TE Connectivity Norge AS Attachment system for attaching a sensor to a substrate, method of attaching a sensor to a substrate
DE102020128095A1 (de) 2020-10-26 2022-04-28 Tdk Corporation Sensoranordnung und Verfahren zur Herstellung einer Sensoranordnung

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0745642A (ja) * 1993-07-30 1995-02-14 Nippondenso Co Ltd 半導体装置
JPH11148068A (ja) * 1997-11-18 1999-06-02 Shinko Electric Ind Co Ltd 異方性応力緩衝体及びそれを用いた半導体装置
WO2015198808A1 (ja) * 2014-06-23 2015-12-30 日立オートモティブシステムズ株式会社 半導体装置、該半導体装置の製造方法及び該半導体装置を用いたセンサ

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4906596A (en) 1987-11-25 1990-03-06 E. I. Du Pont De Nemours & Co. Die attach adhesive composition
JP3233535B2 (ja) * 1994-08-15 2001-11-26 株式会社東芝 半導体装置及びその製造方法
JPH09199549A (ja) * 1996-01-22 1997-07-31 Denso Corp ワイヤボンディング方法
JP2891184B2 (ja) * 1996-06-13 1999-05-17 日本電気株式会社 半導体装置及びその製造方法
JPH11279504A (ja) * 1998-03-27 1999-10-12 Asahi Glass Co Ltd フッ素系接着剤組成物
KR100352865B1 (ko) * 1998-04-07 2002-09-16 신꼬오덴기 고교 가부시키가이샤 반도체 장치 및 그 제조방법
US20040038442A1 (en) * 2002-08-26 2004-02-26 Kinsman Larry D. Optically interactive device packages and methods of assembly
US8513375B2 (en) * 2003-05-05 2013-08-20 Designer Molecules, Inc. Imide-linked maleimide and polymaleimide compounds
WO2010019832A2 (en) * 2008-08-13 2010-02-18 Designer Molecules, Inc. Amide-extended crosslinking compounds and methods for use thereof
JP4337570B2 (ja) 2004-02-10 2009-09-30 株式会社デンソー センサ装置およびその製造方法
JP4492432B2 (ja) * 2005-05-13 2010-06-30 株式会社デンソー 物理量センサ装置の製造方法
US20090236715A1 (en) * 2008-03-18 2009-09-24 Kazuaki Ano Semiconductor package structure with laminated interposing layer
JP5161284B2 (ja) * 2010-10-14 2013-03-13 電気化学工業株式会社 電子部品の製造方法
JP5161283B2 (ja) * 2010-10-14 2013-03-13 電気化学工業株式会社 電子部品の製造方法
JP5373736B2 (ja) * 2010-10-28 2013-12-18 信越化学工業株式会社 接着剤組成物及び接着剤シート、半導体装置保護用材料、及び半導体装置
JP5975621B2 (ja) * 2011-11-02 2016-08-23 リンテック株式会社 ダイシングシートおよび半導体チップの製造方法
US9574959B2 (en) * 2014-09-02 2017-02-21 Apple Inc. Various stress free sensor packages using wafer level supporting die and air gap technique
KR20160088746A (ko) * 2015-01-16 2016-07-26 에스케이하이닉스 주식회사 반도체 패키지 및 반도체 패키지의 제조방법
US9905532B2 (en) * 2016-03-09 2018-02-27 Toyota Motor Engineering & Manufacturing North America, Inc. Methods and apparatuses for high temperature bonding and bonded substrates having variable porosity distribution formed therefrom
JPWO2018030140A1 (ja) * 2016-08-08 2019-06-06 ソニーセミコンダクタソリューションズ株式会社 撮像素子、製造方法、および電子機器
US10938021B2 (en) * 2016-08-31 2021-03-02 The Regents Of The University Of California Devices comprising carbon-based material and fabrication thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0745642A (ja) * 1993-07-30 1995-02-14 Nippondenso Co Ltd 半導体装置
JPH11148068A (ja) * 1997-11-18 1999-06-02 Shinko Electric Ind Co Ltd 異方性応力緩衝体及びそれを用いた半導体装置
WO2015198808A1 (ja) * 2014-06-23 2015-12-30 日立オートモティブシステムズ株式会社 半導体装置、該半導体装置の製造方法及び該半導体装置を用いたセンサ

Also Published As

Publication number Publication date
JP7091696B2 (ja) 2022-06-28
US20190256349A1 (en) 2019-08-22
JP2019145645A (ja) 2019-08-29
US20220242723A1 (en) 2022-08-04
CN110176435A (zh) 2019-08-27
DE102019201492B4 (de) 2023-03-09
US20200407216A1 (en) 2020-12-31
DE102019201492A1 (de) 2019-08-22

Similar Documents

Publication Publication Date Title
US20220242723A1 (en) Physical quantity sensor and semiconductor device
US20020005072A1 (en) Sensor held by base having lead
US7871865B2 (en) Stress free package and laminate-based isolator package
CN1323289C (zh) 容纳在壳体中的压力传感器
US7216545B2 (en) Acid-resistant pressure sensor
US9560744B2 (en) Component and method for producing a component
US10800651B2 (en) Low stress integrated device packages
WO2012070166A1 (ja) 変換体モジュール及びその製造方法
CN111422820B (zh) 传感器的封装结构及封装方法
JP2019158623A (ja) センサ装置およびその製造方法
US10928263B2 (en) Sensor device having adhesive between sensor portion and casing portion
US6313514B1 (en) Pressure sensor component
CN209544339U (zh) 半导体装置
JP2008192984A (ja) 半導体装置及びその製造方法
CN116573605A (zh) Mems压力传感器的封装方法及封装结构
US7589399B2 (en) Semiconductor device, lead frame used in the semiconductor device and electronic equipment using the semiconductor device
CN111473893B (zh) 力量传感器
US11685646B2 (en) Sensor and package assembly thereof
EP1505856A2 (en) Circuit board and semiconductor device using the same
JP2012086345A (ja) Ｍｅｍｓデバイス、その製造方法、及びそれを有する半導体装置
JP4269487B2 (ja) 圧力センサの製造方法
JP2001304999A (ja) 圧力センサ
KR19980026241A (ko) 이방성 전도막을 이용한 적층 칩 패키지
JPH10107204A (ja) 半導体装置及びその製造方法
CN111473894B (zh) 力量传感器

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant