CN110085705A - The forming method of semiconductor devices - Google Patents
The forming method of semiconductor devices Download PDFInfo
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- CN110085705A CN110085705A CN201910362708.4A CN201910362708A CN110085705A CN 110085705 A CN110085705 A CN 110085705A CN 201910362708 A CN201910362708 A CN 201910362708A CN 110085705 A CN110085705 A CN 110085705A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 77
- 238000000034 method Methods 0.000 title claims abstract description 34
- 238000009792 diffusion process Methods 0.000 claims abstract description 123
- 239000000758 substrate Substances 0.000 claims abstract description 41
- 238000010438 heat treatment Methods 0.000 claims abstract description 17
- 238000000137 annealing Methods 0.000 claims description 12
- 239000000463 material Substances 0.000 claims description 8
- 229910052796 boron Inorganic materials 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 3
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- 238000003384 imaging method Methods 0.000 description 4
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
- H01L31/0264—Inorganic materials
- H01L31/0312—Inorganic materials including, apart from doping materials or other impurities, only AIVBIV compounds, e.g. SiC
- H01L31/03125—Inorganic materials including, apart from doping materials or other impurities, only AIVBIV compounds, e.g. SiC characterised by the doping material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier
- H01L31/103—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier being of the PN homojunction type
- H01L31/1037—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier being of the PN homojunction type the devices comprising active layers formed only by AIVBVI compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
- H01L31/1864—Annealing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
A kind of forming method of semiconductor devices, comprising: semiconductor substrate is provided；Diode doped layer is formed in the semiconductor substrate；Top area in diode doped layer forms top layer doped layer, and the conduction type of the top layer doped layer is opposite with the conduction type of diode doped layer；The method for forming top layer doped layer includes: to form diffusion layer on the surface of the diode doped layer, has diffusion ion in the diffusion layer, the conduction type of the diffusion ion is opposite with the conduction type of diode doped layer；It is heat-treated, the diffusion ion in diffusion layer is made to enter the top area in diode doped layer；After carrying out the heat treatment, the diffusion layer is removed.The method improves the performance of semiconductor devices.
Description
Technical field
The present invention relates to field of semiconductor manufacture more particularly to a kind of forming methods of semiconductor devices.
Background technique
Photodiode (Photo-Diode) be it is a kind of can complete optical signal to electric signal conversion function device.Light
Electric diode includes n-type doping layer and p-type doped layer.
Clamp diode (Pinned Photodiode, PPD) is a kind of important photodiode, clamp diode packet
Include the first doped layer, positioned at the second doped layer of the first doped layer bottom and in the first doped layer top area top
The conduction type of doped layer, the conduction type of the second doped layer and the first doped layer is on the contrary, the conduction type for pushing up doped layer
It is opposite with the conduction type of the first doped layer.
However, the performance for the semiconductor devices that existing clamp diode is constituted need to be improved.
Summary of the invention
Problems solved by the invention is to provide a kind of forming method of semiconductor devices, to improve the property of semiconductor devices
Energy.
To solve the above problems, the present invention provides a kind of forming method of semiconductor devices, comprising: provide semiconductor lining
Bottom；Diode doped layer is formed in the semiconductor substrate；Top area in the diode doped layer forms top layer
The conduction type of doped layer, the top layer doped layer is opposite with the conduction type of diode doped layer；Form the top layer doping
The method of layer includes: to form diffusion layer on the surface of the diode doped layer, has diffusion ion in the diffusion layer, described
The conduction type of diffusion ion is opposite with the conduction type of diode doped layer；Be heat-treated, make diffusion in diffusion layer from
Son enters the top area in diode doped layer；After carrying out the heat treatment, the diffusion layer is removed.
Optionally, the top layer doped layer with a thickness of 10 nanometers~80 nanometers.
Optionally, the material of the diffusion layer includes doped boron-silicon glass, and the diffusion ion includes boron ion.
Optionally, the method for forming the diffusion layer includes: using depositing operation on the surface of the diode doped layer
It forms diffusion layer and adulterates diffusion ion in situ in diffusion layer during deposit and spread layer.
Optionally, the heat treatment includes annealing.
Optionally, the annealing includes rapid thermal treatment or spike annealing.
Optionally, the temperature of the heat treatment is 500 degrees Celsius~900 degrees Celsius.
Optionally, the diffusion layer with a thickness of 0.2 micron~0.7 micron.
Optionally, the conduction type of the diode doped layer is N-type, and the conduction type of the semiconductor substrate is p-type；
The conduction type of the top layer doped layer is p-type.
Optionally, before being heat-treated, the concentration of diffusion ion is 5E18atom/cm in the diffusion layer3~
5E21atom/cm3；After being heat-treated, the concentration of diffusion ion is 1E18atom/cm in top layer doped layer3~
1E20atom/cm3。
Compared with prior art, technical solution of the present invention has the advantage that
In the forming method for the semiconductor devices that technical solution of the present invention provides, the top in the diode doped layer
Region forms top layer doped layer, avoids the light in the diode doped layer of semiconductor substrate surface defect and top layer doped layer bottom
Raw Carrier recombination forms dark current, and then inhibits the loss of the photo-generated carrier in diode doped layer.Due to the top layer
Doped layer is formed by the top area that the diffusion ion in diffusion layer enters in diode doped layer, therefore in top layer doped layer
The concentration of diffusion ion is gradually successively decreased from outside to inside in a thickness direction, the concentration peak of diffusion ion in this way in top layer doped layer
For value in the case where certain value, the concentration that top layer adulterates the diffusion ion of layer surface is larger, in this way in inhibition diode doped layer
Photo-generated carrier loss degree it is larger.Secondly as in top layer doped layer the concentration of diffusion ion in a thickness direction by
It is outer gradually to successively decrease to interior, therefore in the case that the peak concentration of diffusion ion keeps certain in top layer doped layer, top layer doping
The thickness of layer is smaller, and such top layer doped layer occupies the less region of diode doped layer, stores photoproduction in diode doped layer
The ability of carrier is higher.To sum up, the performance of semiconductor devices is improved.
Detailed description of the invention
Fig. 1 is a kind of structural schematic diagram of semiconductor devices；
Fig. 2 to Fig. 9 is the structural schematic diagram of semiconductor devices forming process in one embodiment of the invention.
Specific embodiment
As described in background, the performance for the semiconductor devices that the prior art is formed is poor.
A kind of semiconductor devices, comprising: photodiode, photodiode include: semiconductor substrate 100, semiconductor lining
There is p-type trap ion in bottom 100；Diode doped layer 110 in semiconductor substrate 100, diode doped layer 110 are led
Electric type is N-type；The top layer doped layer 120 of top area in diode doped layer 110 has P in top layer doped layer 120
Type conductive ion.
The effect of the top layer doped layer 120 includes: to avoid 200 surface defect of semiconductor substrate and top layer doped layer 120
Photo-generated carrier in the diode doped layer 110 of bottom is compounded to form dark current, inhibits the photoproduction in diode doped layer 110
Carrier loss.
The top layer doped layer 120 is formed using ion implantation technology, and P-type conduction ion is dense in top layer doped layer 120
Gaussian Profile is presented along thickness direction in the top area spent in diode doped layer 110.
Due to P-type conduction ion in top layer doped layer 120 concentration diode doped layer 110 top area along thickness
It spends direction and Gaussian Profile is presented, therefore the peak concentration of P-type conduction ion keeps certain situation in top layer doped layer 120
Under, the thickness of top layer doped layer 120 is larger, can occupy the more region of diode doped layer 110 in this way, diode is caused to adulterate
The ability that layer 110 stores photo-generated carrier is poor.Secondly, the concentration of P-type conduction ion is in thickness direction in top layer doped layer 120
Upper first increases and then decreases, in the case where causing the peak concentration of the P-type conduction ion in top layer doped layer 120 to keep certain, top
The concentration of layer 120 surface P-type conduction ion of doped layer is smaller, in this way the photo-generated carrier damage in inhibition diode doped layer 110
The ability of consumption is poor.
To sum up, lead to the degradation of semiconductor devices.
On this basis, the present invention provides a kind of forming method of semiconductor devices, comprising: is formed in the semiconductor substrate
Diode doped layer；Top area in diode doped layer forms top layer doped layer, the conduction type of top layer doped layer with
The conduction type of diode doped layer is opposite；The method for forming top layer doped layer includes: to be formed on the surface of diode doped layer
Diffusion layer has diffusion ion, the conduction type phase of the conduction type and diode doped layer of the diffusion ion in diffusion layer
Instead；It is heat-treated, the diffusion ion in diffusion layer is made to enter the top area in diode doped layer；The expansion is removed later
Dissipate layer.The method improves the performance of semiconductor devices.
To make the above purposes, features and advantages of the invention more obvious and understandable, with reference to the accompanying drawing to the present invention
Specific embodiment be described in detail.
Fig. 2 to Fig. 9 is the structural schematic diagram of semiconductor devices forming process in one embodiment of the invention.
With reference to Fig. 2, semiconductor substrate 200 is provided.
The material of the semiconductor substrate 200 includes monocrystalline silicon.
There is trap ion, the conduction type of trap ion and subsequent diode doped layer are led in the semiconductor substrate 200
Electric type is opposite.
In the present embodiment, the conduction type of trap ion is p-type.
In the present embodiment, further includes: form isolation structure 201 in part semiconductor substrate 200.The isolation structure
201 material includes silica.The region where semiconductor substrate 200 except isolation structure 201 is active area.
With continued reference to Fig. 2, diode doped layer 210 is formed in the semiconductor substrate 200.
The conductive-type of the semiconductor substrate 200 of the conduction type and 210 bottom of diode doped layer of diode doped layer 210
Type is opposite.
In the present embodiment, after forming isolation structure 201, diode doped layer 210 is formed.
The top surface of the diode doped layer 210 is flushed with the surface of semiconductor substrate 200.
The semiconductor substrate 200 of 210 bottom of the diode doped layer 210 and diode doped layer constitutes photodiode
Main part.
There are Doped ions in the diode doped layer 210.In the present embodiment, the diode doped layer 210 is led
Electric type is N-type, and the conduction type of the Doped ions is N-type.
The technique for forming diode doped layer 210 is ion implantation technology.
Then, the top area in the diode doped layer 210 forms top layer doped layer, the top layer doped layer
Conduction type is opposite with the conduction type of diode doped layer 210.
The method for forming the top layer doped layer includes: to form diffusion layer, institute on the surface of the diode doped layer 210
Stating has diffusion ion in diffusion layer, the conduction type of the diffusion ion is opposite with the conduction type of diode doped layer 210；
It is heat-treated, the diffusion ion in diffusion layer is made to enter the top area in diode doped layer 210；Carry out the heat treatment
Afterwards, the diffusion layer is removed.
It is that example is illustrated by imaging sensor of semiconductor devices in the present embodiment, the shape of the semiconductor devices
At method further include: before forming top layer doped layer, formed in the semiconductor substrate 200 of 210 side of diode doped layer
Gate structure is transmitted, the transmission gate structure has the first opposite side and second side, and the diode doped layer 210 is located at
Transmit the first side of gate structure；After forming the transmission gate structure, diffusion layer is formed；After carrying out the heat treatment, in institute
It states in the semiconductor substrate 200 of second side of transmission gate structure and forms floating diffusion region.The transmission gate structure is corresponding to be passed
Defeated transistor, source region of the diode doped layer 210 as transmission transistor, the floating diffusion region is as transmission transistor
Drain region.
In the present embodiment, image taking sensor is that 4T structure is example, imaging sensor further include: reset transistor, source
Follow transistor and selection transistor.In other embodiments, imaging sensor is the knot being extended in 4T structure basis
Structure, such as 5T structure or 6T structure.
With reference to Fig. 3, transmission gate structure 220 is formed in the semiconductor substrate 200 of 210 side of diode doped layer.
The transmission gate structure 220 has the first opposite side and second side, and the diode doped layer 210, which is located at, to be passed
In the semiconductor substrate 220 of defeated 220 first side of gate structure.
The transmission gate structure 220 includes transmission gate dielectric layer 221 and the transmission grid on transmission gate dielectric layer 221
Electrode layer 222.The material of the transmission gate dielectric layer 221 is silica, and the material of the transmission gate electrode layer 222 is polycrystalline
Silicon.
With reference to Fig. 4, in the semiconductor substrate 200 of transmission 220 first side of gate structure and transmission gate structure 220
Lightly doped district 230 is respectively formed in the semiconductor substrate 200 of second side.
In the present embodiment, the conduction type of the lightly doped district 230 is N-type.
Lightly doped district 230 in semiconductor substrate 200 for transmitting 220 first side of gate structure, lightly doped district 230 are located at
Between diode doped layer 210 and transmission gate structure 220.
Have in the lightly doped district 230 and ion is lightly doped, the concentration that ion is lightly doped in lightly doped district 230 is small
The concentration of floating diffusion ion in subsequent floating diffusion region 270, and be less than diode doped layer 210 in Doped ions it is dense
Degree.
With reference to Fig. 5, side wall 240 is formed in the side wall of transmission gate structure 220.
The side wall of transmission 220 first side of gate structure and the side wall of transmission 220 second side of gate structure are all covered with
Side wall 240.The side wall 240 of the side wall of side wall and second side for transmission 220 first side of gate structure, side wall 240
In in lightly doped district 230.
In the present embodiment, after forming lightly doped district 230, side wall 240 is formed.
With reference to Fig. 6, diffusion layer 250 is formed on the surface of the diode doped layer 210, is had in the diffusion layer 250
The conduction type of diffusion ion, diffusion ion is opposite with the conduction type of diode doped layer.
In the present embodiment, the conduction type of diode doped layer 210 is N-type, correspondingly, the conduction type of diffusion ion is
P-type.
In the present embodiment, after forming transmission gate structure 220, lightly doped district 230 and side wall 240, diffusion layer 250 is formed.
The diffusion ion includes boron ion or indium ion.
In the present embodiment, the material of the diffusion layer 250 is doped boron-silicon glass, and the diffusion ion is boron ion.
The method for forming the diffusion layer 250 includes: the surface shape using depositing operation in the diode doped layer 210
At diffusion layer 250, during deposit and spread layer 250, diffusion ion is adulterated in situ in diffusion layer 250.
It should be noted that during deposit and spread layer 250, also except 210 surface of diode doped layer half
It deposited the material of diffusion layer 250 on conductor substrate；Using the expansion except the surface of etching technics removal diode doped layer 210
Layer 250 is dissipated, the diffusion layer 250 on 210 surface of diode doped layer is retained.
The diffusion layer 250 with a thickness of 0.2 micron~0.7 micron.
The concentration of diffusion ion is 5E18atom/cm in the diffusion layer 2503~5E21atom/cm3。
If the concentration of diffusion ion is too small in the diffusion layer 250, lead to diffusion ion in subsequent top layer doped layer
Concentration is smaller, and top layer doped layer inhibits the ability of the photo-generated carrier loss in diode doped layer poor；If the diffusion layer
The concentration of diffusion ion is excessive in 250, then diffusion of the diffusion ion in diode doped layer is larger, is unfavorable for reducing top
The thickness of layer doped layer.
It with reference to Fig. 7, is heat-treated, enters the diffusion ion in the diffusion layer 250 in diode doped layer 210
Top area, the top area in the diode doped layer 210 form top layer doped layer 260.
Diffusion ion in the diffusion layer 250 enters the top area in diode doped layer 210 with diffusion way.
After being heat-treated, the concentration of diffusion ion is 1E18atom/cm in top layer doped layer 2603~1E20atom/
cm3。
The heat treatment includes annealing.The annealing includes rapid thermal treatment or spike annealing.At the heat
Reason includes: that annealing time is shorter using the benefit of rapid thermal treatment or spike annealing, to the heat of other structures in semiconductor devices
It influences smaller；Since annealing time is shorter, the area of diffusion of the diffusion ion in diode doped layer 210 reduces, this
Sample is conducive to reduce the thickness of top layer doped layer.
In one embodiment, the temperature of the heat treatment is 500 degrees Celsius~900 degrees Celsius.The temperature of the heat treatment
Degree select this range meaning be: if the temperature of the heat treatment less than 500 degrees Celsius, to the driving capability of diffusion ion
Deficiency is unfavorable for diffusion ion and diffuses into diode doped layer 210；If the temperature of the heat treatment is greater than 900 degrees Celsius,
Then cause diffusion ion diffusion in diode doped layer 210 larger, is unfavorable for forming the lesser top layer doped layer of thickness
260。
In the present embodiment, the diode doped layer 210, the semiconductor substrate 200 positioned at 210 bottom of diode doped layer
And top layer doped layer 260 constitute photodiode, photodiode be clamp diode (Pinned Photodiode,
PPD)。
The concentration of diffusion ion is higher than the concentration of trap ion in semiconductor substrate 200 in the top layer doped layer 260.
The effect of the top layer doped layer 260 includes: to avoid 200 surface defect of semiconductor substrate and top layer doped layer 260
Photo-generated carrier in the diode doped layer 210 of bottom is compounded to form dark current.
The top layer doped layer 260 with a thickness of 10 nanometers~80 nanometers, such as 20 nanometers, 25 nanometers, 30 nanometers, 40 receive
Rice, 50 nanometers, 60 nanometers, 70 nanometers or 80 nanometers.
In the present embodiment, the thickness of top layer doped layer 260 is smaller, and top layer doped layer occupies the less area of diode doped layer
Domain, the ability that photo-generated carrier is stored in diode doped layer 210 are higher.
In the present embodiment, the thickness of top layer doped layer 260 is greater than 10 nanometers, and avoiding, which reduces top layer doped layer 260, inhibits two
The ability of photo-generated carrier loss in pole pipe doped layer 210.
In the present embodiment, the concentration of diffusion ion is larger in top layer doped layer 260, and spread in top layer doped layer 260 from
The concentration of son is gradually successively decreased from outside to inside in a thickness direction, and the concentration of the diffusion ion on 260 surface of top layer doped layer is larger, this
Sample inhibits the degree of the photo-generated carrier loss in diode doped layer 210 larger.
With reference to Fig. 8, after carrying out the heat treatment, in the semiconductor substrate 200 of second side of the transmission gate structure 220
Middle formation floating diffusion region 270.
The floating diffusion region 270 (Floating Diffusion, FD) is the drain region of transmission transistor.
Doped N-type ion in the floating diffusion region 270, the p-type of floating diffusion region 270 and 270 bottom of floating diffusion region
Well region constitutes PN junction diode.For the PN junction diode when reverse-biased, floating diffusion region 270, which has, is converted into voltage for charge signal
The capacitor function of signal.The surface of floating diffusion region 270 needs to be sheltered with light shield layer, prevents floating diffusion region 270 corresponding
PN junction diode carries out photoelectric conversion, avoids generating noise.
For transmitting the lightly doped district 230 of second side of gate structure 220, lightly doped district 230 is located at transmission gate structure
Between 220 and floating diffusion region 270.
With reference to Fig. 9, after carrying out the heat treatment, diffusion layer 250 is removed.
In the present embodiment, after forming floating diffusion region 270, diffusion layer 250 is removed.In other embodiments, described in progress
After heat treatment, and before forming floating diffusion region, diffusion layer is removed.
In the present embodiment, the semiconductor devices is imaging sensor, the forming method of the semiconductor devices further include:
Reset gate structure is formed on semiconductor substrate 200；It is formed in the semiconductor substrate of reset gate structure side and resets leakage
Area, the reset drain region are connect with power supply line, and the floating diffusion region is located at the other side semiconductor of the reset gate structure
In substrate, source region of the floating diffusion region as reset transistor；Source is formed on semiconductor substrate 200 follows grid knot
Structure, the source follow gate structure to be electrically connected with floating diffusion region；The semiconductor of gate structure side is followed to serve as a contrast in the source
Source is formed in bottom and follows drain region, and the source follows drain region to connect with power supply line；The half of the gate structure other side is followed in the source
Source is formed in conductor substrate follows source region；Selection gate structure is formed on semiconductor substrate 200；In the selection gate structure
Selection source region is formed in the semiconductor substrate of side, the selection source region connects column sense line；It is another in the selection gate structure
Selection drain region is formed in the semiconductor substrate of side, selects drain region and the source that source region is followed to be electrically connected, alternatively, selection drain region
Source region is followed to be overlapped with the source.
Although present disclosure is as above, present invention is not limited to this.Anyone skilled in the art are not departing from this
It in the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
Subject to the range of restriction.
Claims (10)
1. a kind of forming method of semiconductor devices characterized by comprising
Semiconductor substrate is provided；
Diode doped layer is formed in the semiconductor substrate；
Top area in the diode doped layer forms top layer doped layer, the conduction type and two of the top layer doped layer
The conduction type of pole pipe doped layer is opposite；
The method for forming the top layer doped layer includes: to form diffusion layer, the diffusion on the surface of the diode doped layer
There is diffusion ion, the conduction type of the diffusion ion is opposite with the conduction type of diode doped layer in layer；Carry out hot place
Reason, makes the diffusion ion in diffusion layer enter the top area in diode doped layer；After carrying out the heat treatment, described in removal
Diffusion layer.
2. the forming method of semiconductor devices according to claim 1, which is characterized in that the top layer doped layer with a thickness of
10 nanometers~80 nanometers.
3. the forming method of semiconductor devices according to claim 1, which is characterized in that the material of the diffusion layer includes mixing
Pyrex, the diffusion ion include boron ion.
4. the forming method of semiconductor devices according to claim 1, which is characterized in that form the method packet of the diffusion layer
It includes: diffusion layer being formed on the surface of the diode doped layer using depositing operation and is being spread during deposit and spread layer
Diffusion ion is adulterated in situ in layer.
5. the forming method of semiconductor devices according to claim 1, which is characterized in that the heat treatment includes at annealing
Reason.
6. the forming method of semiconductor devices according to claim 5, which is characterized in that the annealing includes fast speed heat
Processing or spike annealing.
7. the forming method of semiconductor devices according to claim 1, which is characterized in that the temperature of the heat treatment is 500
Degree Celsius~900 degrees Celsius.
8. the forming method of semiconductor devices according to claim 1, which is characterized in that the diffusion layer with a thickness of 0.2
Micron~0.7 micron.
9. the forming method of semiconductor devices according to claim 1, which is characterized in that the conduction of the diode doped layer
Type is N-type, and the conduction type of the semiconductor substrate is p-type；The conduction type of the top layer doped layer is p-type.
10. the forming method of semiconductor devices according to claim 1, which is characterized in that described before being heat-treated
The concentration of diffusion ion is 5E18atom/cm in diffusion layer3~5E21atom/cm3；After being heat-treated, in top layer doped layer
The concentration of diffusion ion is 1E18atom/cm3~1E20atom/cm3。
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910362708.4A CN110085705A (en) | 2019-04-30 | 2019-04-30 | The forming method of semiconductor devices |
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| WO2007139257A1 (en) * | 2006-05-25 | 2007-12-06 | Pixelplus Co., Ltd. | Active pixel having pinned photodiode with coupling capacitor and method for sensing a signal thereof |
| CN105514214A (en) * | 2014-10-10 | 2016-04-20 | 意法半导体有限公司 | Pinned photodiode with low dark current |
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| US20040014332A1 (en) * | 2002-07-16 | 2004-01-22 | Fairchild Imaging | Large area, fast frame rate charge coupled device |
| CN1841791A (en) * | 2004-12-03 | 2006-10-04 | 豪威科技有限公司 | Image sensor pixel having photodiode with indium pinning layer |
| WO2007139257A1 (en) * | 2006-05-25 | 2007-12-06 | Pixelplus Co., Ltd. | Active pixel having pinned photodiode with coupling capacitor and method for sensing a signal thereof |
| CN105514214A (en) * | 2014-10-10 | 2016-04-20 | 意法半导体有限公司 | Pinned photodiode with low dark current |
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