CN104916655A - Image sensor and manufacturing method thereof, and method for reducing electrical mutual interference - Google Patents
Image sensor and manufacturing method thereof, and method for reducing electrical mutual interference Download PDFInfo
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- CN104916655A CN104916655A CN201510367294.6A CN201510367294A CN104916655A CN 104916655 A CN104916655 A CN 104916655A CN 201510367294 A CN201510367294 A CN 201510367294A CN 104916655 A CN104916655 A CN 104916655A
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- 238000004519 manufacturing process Methods 0.000 title abstract description 5
- 239000000758 substrate Substances 0.000 claims abstract description 63
- 239000004065 semiconductor Substances 0.000 claims abstract description 49
- 238000002955 isolation Methods 0.000 claims abstract description 45
- 238000000137 annealing Methods 0.000 claims abstract description 11
- 238000005468 ion implantation Methods 0.000 claims description 19
- 238000009792 diffusion process Methods 0.000 claims description 16
- 238000002360 preparation method Methods 0.000 claims description 12
- 239000001307 helium Substances 0.000 claims description 5
- 229910052734 helium Inorganic materials 0.000 claims description 5
- GPRLSGONYQIRFK-UHFFFAOYSA-N hydron Chemical compound [H+] GPRLSGONYQIRFK-UHFFFAOYSA-N 0.000 claims description 5
- 150000002500 ions Chemical class 0.000 abstract description 32
- 238000005036 potential barrier Methods 0.000 abstract description 5
- 230000005012 migration Effects 0.000 abstract description 2
- 238000013508 migration Methods 0.000 abstract description 2
- 238000002347 injection Methods 0.000 abstract 1
- 239000007924 injection Substances 0.000 abstract 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
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- 238000009826 distribution Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
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- 238000006243 chemical reaction Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
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- H—ELECTRICITY
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
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Abstract
The present invention provides an image sensor and a manufacturing method thereof, and a method for reducing electrical mutual interference. In a structure of a pixel unit having a light-emitting diode and a pixel unit circuit, ions are injected into a region in a semiconductor substrate and corresponding to the lower part of a shallow trench isolation structure, to form an ion injection region. These injected ions form a plurality of gaps upon annealing. The gaps are potential barriers of electron migration. Since the region below the light-emitting diode and the pixel unit circuit is a non-exhaustion region, the electrons in the non-exhaustion region are prevented from the adjacent pixel units, and thus the electrical mutual interference caused to the adjacent pixels is reduced.
Description
Technical field
The present invention relates to technical field of semiconductors, be specifically related to a kind of method and a kind of cmos image sensor and preparation method thereof that reduce cmos image sensor electrical mutual disturbance.
Background technology
Cmos image sensor (CIS), due to its manufacturing process and existing integrated circuit fabrication process compatibility, its performance is compared than original charge coupled device ccd simultaneously and is had many good qualities.Drive circuit and pixel can integrate by cmos image sensor, simplify hardware designs, also reduce the power consumption of system simultaneously.CIS, can also real time processed images information owing to just can take out the signal of telecommunication while collection light signal, and speed is faster than ccd image sensor.Cmos image sensor also has low price, and bandwidth is comparatively large, blur prevention, the flexibility of access and the advantage of larger activity coefficient.
Traditional active pixel uses photodiode as image sensing device.Common active pixel cell is made up of three transistors and a N+/P-photodiode, and this structure is applicable to the CMOS manufacturing process of standard.For in the spatial distribution of the mixing up design of photodiode, space charge region also must be made to avoid concentrated area, the complex centres such as crystal defect, to reduce the dark current of pixel.And now the size of pixel reduces gradually, the trap capacity that photodiode holds electronics also diminishes thereupon, so to light catch and photosignal has a certain impact.Have two kinds of selections for cmos image sensor now, a kind of is combine with the photodiode of standard CMOS process compatibility and 3 transistors, ensures the area of photodiode with this.Another kind is the dot structure had compared with low-dark current be not combined with 4 transistors with the so-called pinned photodiode (comprising N-layer, the P+ articulamentum formed thereon) with high trap capacity of standard CMOS process compatibility.When illumination, photodiode produces electric charge at N-place, and at this moment transfer pipeline is closed condition.Then transfer pipeline is opened, and will store transferring charge in the photodiode to floating node, after transmission, and transfer pipeline closedown, and wait for entering of illumination next time.Charge signal on floating node is subsequently for adjusting amplifier transistor.After reading, floating point is reset to a reference voltage by the reset transistor with reset gate.
Substrate region beyond the space charge region that incident light arrives at photodiode, the and during electron hole pair produced by photoelectric effect, its electronics also in substrate, edge, space charge region can be arrived by diffusion and absorb by space charge region.But due to the no regularity of electrons spread, it in substrate and hole-recombination, also may may be swept the space charge region of other pixels after substrate migration one segment distance, thus cause a kind of disturbing mutually newly between pixel, be referred to as electrical mutual disturbance.Electrical mutual disturbance can introduce some false signals to pixel equally, imageing sensor signal to noise ratio is reduced, poor quality images.Under the irradiation of high light, this electrical mutual disturbance can be very serious, the light induced electron now not only produced outside light sensitive diode space charge region can spread at substrate, and also may be again diffused in substrate by the electronics that diode space charged region has been collected, and in final image, introduce some defects, as halation.Reason is pixel, its electronics number that can hold is limited, once P-N junction departs from reverse-biased state after collecting enough electronics and enters equilibrium state, spilling is diffused in substrate by its unnecessary electronics, and have very most of by absorb by the pixel of being close to, neighboring pixel brightness is increased, forms halation.
The photodiode area of existing back-illuminated cmos image sensors and the circuit region of pixel cell are in same layer, ensure that large fill factor just needs to reduce the circuit region area of pixel cell.Someone proposes a kind of pixel circuit region and the overlapped distribution mode of photodiode area for this reason, under photodiode being placed in pixel unit circuit district, and in conjunction with diffusion region photodiode being connected with pinning layer by one and realizing electronics to be passed to by transfer pipeline the function of floating point.This structure, the area of photodiode is expanded, improves the fill factor of pixel cell, and large photodiode can accept more light, improve the absorption to oblique light, add the efficiency of opto-electronic conversion.
BSI structure is soi device substantially, and wherein substrate isolation is disposed by BEOL dielectric layer and relatively large body silicon in silicon effective coverage.If when the thickness of silicon effective coverage is thicker, the distance between back surface and front surface is enough large to make front surface temperature significantly lower than rear surface temperature.Although this thicker back surface effectively can isolate the impact of rear surface annealing on the BEOL of front surface, thicker back surface can make the electronics being diffused into rear surface have an opportunity by being diffused into the pixel cell closed on, thus causes large electrical mutual disturbance.Therefore in order to reduce electrical mutual disturbance, back surface in usual BSI technology, all can be made to be thinned to certain thickness (being less than 4um).For the structure having large fill factor, the region residing for photodiode, below image element circuit district, makes the thickness of back surface increase, and makes the photodiode area of adjacent pixel unit distance more close simultaneously.Because the absorbability of silicon is very weak, many light induced electrons are created on outside depletion region, and these electronics can move towards all directions, and electronics may move with the concentration gradient of electronics, can enter the pixel cell closed on and cause large electrical mutual disturbance.
Summary of the invention
In order to overcome above problem, the present invention aims to provide a kind of method and cmos image sensor and preparation method thereof that reduce cmos image sensor electrical mutual disturbance, by by ion implantation to the corresponding position of the fleet plough groove isolation structure of pixel cell, stop the diffusion of electronics.
In order to achieve the above object, the invention provides a kind of method reducing cmos image sensor electrical mutual disturbance, it comprises:
Step 01: semi-conductive substrate is provided, and multiple fleet plough groove isolation structure is formed in described Semiconductor substrate, and the photodiode area formed between adjacent fleet plough groove isolation structure and pixel unit circuit region; Fleet plough groove isolation structure is for isolating adjacent pixel unit circuit region;
Step 02: in described Semiconductor substrate and ion implantation is carried out, to form ion implanted region in the region corresponded to below described fleet plough groove isolation structure;
Step 03: through annealing process, forms multiple space in described ion implanted region.
Preferably, described pixel unit circuit region is positioned at the top of described photodiode area.
Preferably, the top of described ion implanted region is equal to or higher than the bottom of described photodiode area, and does not contact with described fleet plough groove isolation structure.
Preferably, in described step 02, described ion implantation is injected into described Semiconductor substrate from the described Semiconductor substrate back side.
Preferably, in described step 02, described ion implantation adopts hydrogen ion or helium ion.
Preferably, described cmos image sensor is the cmos image sensor that two, four of front illuminated or eight photodiodes share the diffusion point that floats, or shares the cmos image sensor of the diffusion point that floats for two, four of back-illuminated type or eight photodiodes.
To achieve these goals, present invention also offers a kind of cmos image sensor, comprise: Semiconductor substrate, be arranged in the pixel cell of Semiconductor substrate, each pixel cell comprises pixel unit circuit region and photodiode area, be positioned at the fleet plough groove isolation structure of the both sides of each described pixel cell, be positioned at the non-depleted region below described pixel cell, and close to the colored filter of the described semiconductor substrate surface of described photodiode area and dimpling lens; It is characterized in that, also comprise: in the semiconductor substrate and to correspond to the lower zone of described fleet plough groove isolation structure be the ion implanted region with multiple space; The top of described ion implanted region is higher than described non-depleted region and with bottom described fleet plough groove isolation structure do not contact, and the bottom of described ion implanted region penetrates the described Semiconductor substrate back side.
Preferably, comprise: be described photodiode area below described pixel unit circuit region, described photodiode area is connected in conjunction with diffusion region by one with described pixel unit circuit region, is positioned at the fleet plough groove isolation structure of each described pixel unit circuit both sides; And be positioned at colored filter and the dimpling lens at the described Semiconductor substrate back side; The top of described ion implanted region is equal to or higher than the bottom of described photodiode area; The bottom of described ion implanted region contacts with described colored filter.
To achieve these goals, present invention also offers a kind of preparation method of cmos image sensor, it comprises:
Step 11: semi-conductive substrate is provided, and multiple fleet plough groove isolation structure is formed in described Semiconductor substrate, and the photodiode area formed between adjacent fleet plough groove isolation structure and pixel unit circuit region; Fleet plough groove isolation structure is for isolating adjacent pixel unit circuit region;
Step 12: in described Semiconductor substrate and ion implantation is carried out, to form ion implanted region in the region corresponded to below described fleet plough groove isolation structure;
Step 13: through annealing process, forms multiple space in described ion implanted region;
Step 14: form filter and dimpling lens successively at the described semiconductor substrate surface close to described photodiode area.
Preferably, in described step 12, described ion implantation is injected into described Semiconductor substrate from the described Semiconductor substrate back side.
Preferably, in described step 12, described ion implantation adopts hydrogen ion or helium ion.
The method of minimizing cmos image sensor electrical mutual disturbance of the present invention, and cmos image sensor and preparation method thereof, in the pixel cell structure with photodiode and pixel unit circuit, ion implantation is carried out at the lower zone corresponding to fleet plough groove isolation structure region, these ions injected form multiple space after annealing, these spaces become the potential barrier of electron transfer, because the region below photodiode and pixel unit circuit is non-depleted region, thus stop that the electrons spread of non-depleted region is to contiguous pixel cell, to reduce the electrical mutual disturbance between neighborhood pixels.
Accompanying drawing explanation
Fig. 1 is the schematic flow sheet of the method for the minimizing cmos image sensor electrical mutual disturbance of a preferred embodiment of the present invention
Fig. 2 is the structural representation of the cmos image sensor of a preferred embodiment of the present invention
Fig. 3 is the schematic flow sheet of the preparation method of the cmos image sensor of a preferred embodiment of the present invention
Embodiment
For making content of the present invention clearly understandable, below in conjunction with Figure of description, content of the present invention is described further.Certain the present invention is not limited to this specific embodiment, and the general replacement known by those skilled in the art is also encompassed in protection scope of the present invention.
Below in conjunction with accompanying drawing 1-3 and specific embodiment, method and cmos image sensor and preparation method thereof to minimizing cmos image sensor electrical mutual disturbance of the present invention are described in further detail.It should be noted that, accompanying drawing all adopt simplify very much form, use non-ratio accurately, and only in order to object that is convenient, that clearly reach aid illustration the present embodiment.
The method of minimizing cmos image sensor electrical mutual disturbance of the present invention goes for the cmos image sensor that two, four of front illuminated or eight photodiodes share the diffusion point that floats, or two of back-illuminated type, four or eight photodiodes share the cmos image sensor of the diffusion point that floats.
Referring to Fig. 1, is the schematic flow sheet of the method for the minimizing cmos image sensor electrical mutual disturbance of a preferred embodiment of the present invention.In the present embodiment, for back-illuminated cmos image sensors, reduce the method for back-illuminated cmos image sensors electrical mutual disturbance, comprising:
Step 01: semi-conductive substrate is provided, and form multiple fleet plough groove isolation structure in the semiconductor substrate, and the photodiode area formed between adjacent fleet plough groove isolation structure and pixel unit circuit region;
Concrete, Semiconductor substrate can be, but not limited to as silicon substrate; Fleet plough groove isolation structure is for isolating adjacent pixel cell; Pixel unit circuit region is positioned at the top of photodiode area, and pixel unit circuit comprises transfer pipeline, reset transistor, amplifier tube and selection pipe, has pinning layer in the side of transfer pipeline, and pinning layer connects in conjunction with diffusion region by one with photodiode area; Pixel unit circuit region comprises grid, is positioned at the pinning layer of grid one deck; Below pinning layer and the region of close grid is positioned in conjunction with diffusion region.
Step 02: in Semiconductor substrate and ion implantation is carried out, to form ion implanted region in the region corresponded to below fleet plough groove isolation structure;
Concrete, ion implantation is injected into Semiconductor substrate from the Semiconductor substrate back side, can adopt hydrogen ion or helium ion during ion implantation, the top of the ion implanted region obtained is equal to or higher than the bottom in pixel diode region, and does not contact with fleet plough groove isolation structure; By this step 02, ion implanted region can be formed in the Semiconductor substrate below fleet plough groove isolation structure, and avoid the contact of fleet plough groove isolation structure and ion implanted region.Why the top of ion implanted region will be equal to or higher than the bottom of photodiode area, is that the ion in the Semiconductor substrate in order to stop below photodiode enters into contiguous pixel cell,
Step 03: through annealing process, forms multiple space in ion implanted region.
Concrete, through annealing, the space formed in ion implanted region is a potential barrier for electronics, and these potential barriers block the electrons spread of non-depleted region in neighborhood pixels unit.Such as, ion implanted region forms micropore district.
Two, four, eight photodiodes that the method for above-mentioned minimizing back-illuminated cmos image sensors electrical mutual disturbance is applicable to existing back-illuminated type share the CMOS image sensor structure of the diffusion point that floats.
In one embodiment of the invention, additionally provide a kind of cmos image sensor, for back-illuminated cmos image sensors, refer to Fig. 2, a pixel cell in back-illuminated cmos image sensors in this embodiment comprises: P type semiconductor substrate 1, be arranged in the N-type photodiode area 2 of P type semiconductor substrate 1, be positioned at the pixel unit circuit region XS above N-type photodiode area 2, pixel unit circuit region XS is positioned at P type semiconductor substrate 1 surface, pixel unit circuit region XS comprises transfer pipeline ZY, reset transistor FW, amplifier tube FD and selection pipe XZ, a side bottom of transfer pipeline ZY there is pinning layer 3 and be positioned at be connected with pinning layer 3 below pinning layer 3 in conjunction with diffusion region KS, this bottom in conjunction with diffusion region KS connects N-type photodiode area 2, fleet plough groove isolation structure STI is positioned at the both sides of this pixel unit circuit region XS, for isolating adjacent pixel cell.In semiconductor substrate 1 and correspond to the lower zone of fleet plough groove isolation structure STI and have ion implanted region 4, this ion implanted region 4 has multiple space; The cross section of this ion implanted region 4 is strip, and the top of this ion implanted region 4 does not contact with fleet plough groove isolation structure STI, preferably, lower than the top of N-type photodiode area 2; The bottom of this ion implanted region 4 is equal to or higher than the bottom of photodiode area 2; The bottom of this ion implanted regions 4 is penetrated into the back side of P type semiconductor substrate 1, and contacts with colored filter 5; And at the back side of P type semiconductor substrate 1, there are colored filter 5 and dimpling lens 6 successively downwards.
Additionally provide a kind of preparation method of cmos image sensor in one embodiment of the invention, refer to Fig. 3, for back-illuminated cmos image sensors, the preparation method of back-illuminated cmos image sensors comprises in this embodiment:
Step 11: semi-conductive substrate is provided, and form multiple fleet plough groove isolation structure in the semiconductor substrate, and the pixel diode region formed between adjacent fleet plough groove isolation structure and pixel unit circuit region; Fleet plough groove isolation structure is for isolating adjacent pixel unit circuit region;
Concrete, please refer to the step 01 in above-described embodiment, repeat no more here.
Step 12: in Semiconductor substrate and ion implantation is carried out, to form ion implanted region in the region corresponded to below fleet plough groove isolation structure;
Concrete, please refer to the step 02 in above-described embodiment, repeat no more here.
Step 13: through annealing process, forms multiple space in ion implanted region;
Please refer to the step 03 in above-described embodiment, repeat no more here.
Step 14: form filter and dimpling lens successively at the semiconductor substrate surface close to photodiode area.
Here, filter and dimpling lens are formed successively at the Semiconductor substrate back side.The formation of filter and dimpling lens can adopt common process.
In sum, the method of minimizing cmos image sensor electrical mutual disturbance of the present invention, and cmos image sensor and preparation method thereof, in the pixel cell structure with photodiode and pixel unit circuit, ion implantation is carried out at the lower zone corresponding to fleet plough groove isolation structure region, these ions injected form multiple space after annealing, these spaces become the potential barrier of electron transfer, because the region below photodiode and pixel unit circuit is non-depleted region, thus stop that the electrons spread of non-depleted region is to contiguous pixel cell, to reduce the electrical mutual disturbance between neighborhood pixels.
Although the present invention discloses as above with preferred embodiment; right described embodiment is citing for convenience of explanation only; and be not used to limit the present invention; those skilled in the art can do some changes and retouching without departing from the spirit and scope of the present invention, and the protection range that the present invention advocates should be as the criterion with described in claims.
Claims (11)
1. reduce a method for cmos image sensor electrical mutual disturbance, it is characterized in that, comprising:
Step 01: semi-conductive substrate is provided, and multiple fleet plough groove isolation structure is formed in described Semiconductor substrate, and the photodiode area formed between adjacent fleet plough groove isolation structure and pixel unit circuit region; Fleet plough groove isolation structure is for isolating adjacent pixel unit circuit region;
Step 02: in described Semiconductor substrate and ion implantation is carried out, to form ion implanted region in the region corresponded to below described fleet plough groove isolation structure;
Step 03: through annealing process, forms multiple space in described ion implanted region.
2. method according to claim 1, is characterized in that, described pixel unit circuit region is positioned at the top of described photodiode area.
3. method according to claim 2, is characterized in that, the top of described ion implanted region is equal to or higher than the bottom of described photodiode area, and does not contact with described fleet plough groove isolation structure.
4. method according to claim 1, is characterized in that, in described step 02, described ion implantation is injected into described Semiconductor substrate from the described Semiconductor substrate back side.
5. method according to claim 1, is characterized in that, in described step 02, described ion implantation adopts hydrogen ion or helium ion.
6. method according to claim 1, it is characterized in that, described cmos image sensor is the cmos image sensor that two, four of front illuminated or eight photodiodes share the diffusion point that floats, or shares the cmos image sensor of the diffusion point that floats for two, four of back-illuminated type or eight photodiodes.
7. a cmos image sensor, comprise: Semiconductor substrate, be arranged in the pixel cell of Semiconductor substrate, each pixel cell comprises pixel unit circuit region and photodiode area, be positioned at the fleet plough groove isolation structure of the both sides of each described pixel cell, be positioned at the non-depleted region below described pixel cell, and close to the colored filter of the described semiconductor substrate surface of described photodiode area and dimpling lens; It is characterized in that, also comprise: in the semiconductor substrate and to correspond to the lower zone of described fleet plough groove isolation structure be the ion implanted region with multiple space; The top of described ion implanted region is higher than described non-depleted region and with bottom described fleet plough groove isolation structure do not contact, and the bottom of described ion implanted region penetrates the described Semiconductor substrate back side.
8. cmos image sensor according to claim 7, it is characterized in that, comprise: be described photodiode area below described pixel unit circuit region, described photodiode area is connected in conjunction with diffusion region by one with described pixel unit circuit region, is positioned at the fleet plough groove isolation structure of each described pixel unit circuit both sides; And be positioned at colored filter and the dimpling lens at the described Semiconductor substrate back side; The top of described ion implanted region is equal to or higher than the bottom of described photodiode area; The bottom of described ion implanted region contacts with described colored filter.
9. a preparation method for cmos image sensor, is characterized in that, comprising:
Step 11: semi-conductive substrate is provided, and multiple fleet plough groove isolation structure is formed in described Semiconductor substrate, and the photodiode area formed between adjacent fleet plough groove isolation structure and pixel unit circuit region; Fleet plough groove isolation structure is for isolating adjacent pixel unit circuit region;
Step 12: in described Semiconductor substrate and ion implantation is carried out, to form ion implanted region in the region corresponded to below described fleet plough groove isolation structure;
Step 13: through annealing process, forms multiple space in described ion implanted region;
Step 14: form filter and dimpling lens successively at the described semiconductor substrate surface close to described photodiode area.
10. preparation method according to claim 7, is characterized in that, in described step 12, described ion implantation is injected into described Semiconductor substrate from the described Semiconductor substrate back side.
11. methods according to claim 7, is characterized in that, in described step 12, described ion implantation adopts hydrogen ion or helium ion.
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| CN109804267B (en) * | 2016-08-12 | 2023-09-01 | 索尼深度传感解决方案股份有限公司 | Demodulator with carrier wave generating pinned photodiode |
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| CN110993710A (en) * | 2019-12-30 | 2020-04-10 | 上海集成电路研发中心有限公司 | Single-photon avalanche diode and preparation method thereof |
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