CN110993710A - Single-photon avalanche diode and preparation method thereof - Google Patents
Single-photon avalanche diode and preparation method thereof Download PDFInfo
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Abstract
The invention discloses a single photon avalanche diode, which comprises a P-type substrate, a high-voltage N well positioned on the P-type substrate and a P-type isolation region between the high-voltage N wells; the N-type injection diffusion layer and the P-type injection diffusion layer are positioned in the high-voltage N well; the P-type protection ring and the N-type contact end are positioned around the N-type injection diffusion layer and the P-type injection diffusion layer; shallow trench isolation located above the P-type isolation region; the annular P-type floating region is positioned between the shallow trench isolation and the P-type protection ring, and when the N-type contact end applies working voltage, the depletion region of the P-type floating region is partially overlapped with the depletion region of the shallow trench isolation; and the depletion region of the P-type floating region and the depletion region of the P-type guard ring are not overlapped; and the dielectric layer covers the high-voltage N well and the shallow trench isolation. The single-electron single-photon avalanche diode and the preparation method thereof can increase the photosensitive area in the diode, thereby effectively improving the detection efficiency of the single-electron single-photon avalanche diode.
Description
Technical Field
The invention relates to the field of diodes, in particular to a single photon avalanche diode and a preparation method thereof.
Background
The single photon detection is a very weak light detection method, the intensity of the detected light current is lower than the thermal noise level (10-14W) of the photoelectric detector at room temperature, and the signal which is annihilated in the noise cannot be extracted by using a common direct current detection method. Single photon detection has wide application in the fields of high-resolution spectral measurement, nondestructive matter analysis, high-speed phenomenon detection, precision analysis, atmospheric pollution measurement, bioluminescence, radiation detection, high-energy physics, astronomical photometry, optical time domain reflection, quantum key distribution systems and the like.
A typical Single Photon Avalanche Diode (SPAD) consists of a source region P +/N junction, a high voltage region and an isolation part between the high voltage region and the high voltage region, wherein the three parts are sequentially arranged from inside to outside; if the diameter of the source region is 8 microns, the high-voltage region is approximately 6-8 microns, the isolation between the high-voltage region and the high-voltage region needs 8-10 microns, the proportion of the photosensitive area to the area of the device is only about 11%, and most of the area is due to the isolation between the devices.
The SPAD structure in the prior art is shown in fig. 1, and includes a P-type substrate 12, a high-voltage N-well 13 on the P-type substrate 12, and a P-type isolation region 14 between the high-voltage N-wells; the N-type injection diffusion layer 11 and the P-type injection diffusion layer 7 are positioned in the high-voltage N well 13; a P-type guard ring 6 and an N-type contact terminal 5 located around the N-type injection diffusion layer 11 and the P-type injection diffusion layer 7; shallow trench isolation 19 located above the P-type isolation region 14; and a dielectric layer 21 covering the high-voltage N well 13 and the shallow trench isolation 19; the depletion region of the structure during operation is schematically shown in FIG. 2; in the operation process of the SPAD, the electrode is connected with the N-type contact end 5, and the working voltage V is0At least more than 20V, and higher voltage is needed when the wavelength of incident light is longer and the photon absorption efficiency is high, and the voltage can reach 40V, even more than 100V; operating voltage V0Completely overlying the P-type isolation region 14 and the high voltage N-well 13. Since the working voltage is large, the distance between the high-voltage N-well 13 and the P-type isolation region 14 is naturally required to be large, and thus, the proportion of the sensing area in the diode is small, so that the detection efficiency of the single-electron single-photon avalanche diode is low.
Disclosure of Invention
The invention aims to provide a single-electron single-photon avalanche diode and a preparation method thereof, wherein the distance between a high-voltage N well and a P-type isolation region is shortened by overlapping depletion regions, so that the photosensitive area in the diode is increased, and the detection efficiency of the single-electron single-photon avalanche diode is effectively improved.
In order to achieve the purpose, the invention adopts the following technical scheme: a single photon avalanche diode comprises a P-type substrate,
the P-type isolation region is positioned between the high-voltage N well and the high-voltage N well on the P-type substrate;
the N-type injection diffusion layer and the P-type injection diffusion layer are positioned in the high-voltage N well;
the P-type protection ring and the N-type contact end are positioned around the N-type injection diffusion layer and the P-type injection diffusion layer;
the shallow trench isolation is positioned above the P-type isolation region and extends into the high-voltage N well;
when the N-type contact end applies working voltage, the depletion region formed by the P-type floating region and the high-voltage N well is partially overlapped with the depletion region formed by the shallow trench isolation in the high-voltage N well; and the depletion region formed by the P-type floating region and the high-voltage N well and the depletion region formed by the P-type protection ring and the high-voltage N well are not overlapped;
and the dielectric layer covers the high-voltage N well and the shallow trench isolation.
Furthermore, the P-type floating regions are M P-type floating rings which are vertically distributed, when the N-type contact end applies working voltage, two adjacent P-type floating rings are partially overlapped with a depletion region formed by the high-voltage N well, and a depletion region formed by the lowest P-type floating ring and the high-voltage N well and a depletion region formed by the P-type substrate and the high-voltage N well are partially overlapped; m is a positive integer greater than 0.
Furthermore, the P-type isolation region comprises a P-type doped region, and the P-type doped region is located in the center of the P-type isolation region.
Further, the annular P-type floating region extends to the lower part of the shallow trench isolation.
Further, a depletion region formed by the P-type floating region and the high-voltage N well is partially overlapped with a depletion region formed by the P-type substrate and the high-voltage N well.
Further, the implantation energy of the annular P-type floating region is more than 200 KeV; the total implantation dose of the annular P-type floating region is more than 1 x 1012/cm2。
A method of making a single photon avalanche diode comprising the steps of:
s01: forming a P-type isolation region on a P-type substrate by photoetching and ion implantation; forming a high-voltage N well in a P-type isolation region on a P-type substrate;
s02: forming a P-type guard ring in the high-voltage N well through an ion implantation process;
s03: forming shallow trench isolation on the P-type isolation region;
s04: injecting a P well and an N well of a peripheral circuit;
s05: forming an N-type injection diffusion layer inside the P-type protection ring;
s06: forming an annular P-type floating region between the shallow trench isolation and the P-type protection ring through an ion implantation process;
s07: forming a P-type injection diffusion layer above the N-type injection diffusion layer through an ion injection process to serve as an anode of the single-photon diode; forming a side wall and a source drain region of a single photon avalanche diode peripheral circuit MOS device; forming an N-type contact end of the single-photon diode at a position close to the shallow trench isolation in the high-voltage N well by using source-drain injection of the NMOS device; and forming the single photon diode after annealing.
Further, the step S02 further includes: implanting a P-type doped region in the center of the P-type isolation region, wherein the implantation dose of the P-type doped region is less than 2 × 1013/cm2。
Further, the step S06 includes: forming M P-type floating rings between the shallow trench isolation and the P-type protection ring through an ion implantation process; when the N-type contact end applies working voltage, the depletion regions formed by the two adjacent P-type floating rings and the high-voltage N well are partially overlapped, and the depletion region formed by the lowest P-type floating ring and the high-voltage N well is partially overlapped with the depletion region of the P-type substrate; m is a positive integer greater than 0.
The invention has the beneficial effects that: an annular P-type floating region is arranged between the shallow trench isolation and the P-type protection ring, and when the N-type contact end applies working voltage, a depletion region formed by the P-type floating region and the high-voltage N well is not overlapped with a depletion region formed by the P-type protection ring and the high-voltage N well, so that the working voltage can be completely transmitted to the N-type injection diffusion layer; meanwhile, the depletion region formed by the P-type floating region and the high-voltage N well is overlapped with the depletion region formed by the shallow trench isolation in the high-voltage N well, so that the transmitted working voltage is reduced, the distance between the high-voltage N well and the P-type isolation region is further reduced, the light sensing area in the diode is further increased, and the detection efficiency of the single-electron single-photon avalanche diode is further effectively improved.
Drawings
FIG. 1 is a cross-sectional view of a single photon avalanche diode of the prior art;
FIG. 2 is a schematic diagram of the depletion region outside the P-type guard ring of a single photon avalanche diode in the prior art;
FIG. 3 is a cross-sectional view of a single photon avalanche diode in accordance with the present invention;
FIG. 4 is a schematic diagram of an outer depletion region of a P-type guard ring of a single photon avalanche diode according to the present invention;
FIG. 5 is a cross-sectional view of a single photon avalanche diode of example 1;
FIG. 6 is a schematic diagram of the depletion region outside the P-type guard ring of the single photon avalanche diode in example 1;
FIG. 7 is a cross-sectional view of a single photon avalanche diode in accordance with example 2;
FIG. 8 is a schematic diagram of the depletion region outside the P-type guard ring of the single photon avalanche diode in example 2;
FIG. 9 shows the results of a TCDA simulation of voltage delivery in accordance with the present invention.
In the figure: the structure comprises a 1P type floating region, a 2P type floating ring, a 5N type contact end, a 6P type protection ring, a 7P type injection diffusion layer, an 11N type injection diffusion layer, a 12P type substrate, a 13 high-voltage N well, a 14P type isolation region, a 16P type doping region, a 19 shallow trench isolation and a 21 dielectric layer.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention are described in detail below with reference to the accompanying drawings.
Referring to fig. 3, the single photon avalanche diode according to the present invention includes a P-type substrate 12, a high voltage N-well 13 on the P-type substrate, and a P-type isolation region 14 between the high voltage N-wells; the N-type injection diffusion layer 11 and the P-type injection diffusion layer 7 are positioned in the high-voltage N well 13; a P-type guard ring 6 and an N-type contact terminal 5 located around the N-type injection diffusion layer 11 and the P-type injection diffusion layer 7; the P-type guard ring is used for preventing premature breakdown between the P-type injection diffusion region 7 and the high-voltage N well; because the P-type injection diffusion layer 7 is thin, the radius of a fillet is small, the electric field enhancement effect is obvious, and if no P-type protection ring exists, the P-type injection diffusion region and the high-voltage N well can be broken down in advance. Shallow trench isolation 19 located above the P-type isolation region 14; the annular P-type floating region 1 is positioned between the shallow trench isolation 19 and the P-type protection ring 6, and when the N-type contact end 5 applies working voltage, the P-type floating region 1 is partially overlapped with a depletion region formed by the high-voltage N well and a depletion region formed by the shallow trench isolation 19 in the high-voltage N well; and the depletion region formed by the P-type floating region 1 and the high-voltage N well and the depletion region formed by the P-type guard ring 6 and the high-voltage N well are not overlapped; and a dielectric layer 21 overlying the high voltage N-well and the shallow trench isolation.
The P-type isolation region 14, the P-type guard ring 6, the N-type contact 5, and the P-type floating region are all ring structures, and are only schematic cross-sectional views, which do not limit the overall structure of the present invention.
For simplification of description, the depletion region of the shallow trench isolation in the invention refers to a depletion region formed in a high-voltage N-well by the shallow trench isolation, the depletion region of the P-type floating region refers to a depletion region formed between the P-type floating region and the high-voltage N-well, the depletion region of the P-type guard ring 6 refers to a depletion region formed between the P-type guard ring 6 and the high-voltage N-well, and the depletion region of the P-type substrate refers to a depletion region formed between the P-type substrate and the high-voltage N-well.
Referring to fig. 4, the P-type floating region of the present invention needs to satisfy the following conditions: (1) when the N-type contact end applies working voltage, the P-type floating region can not be exhausted; (2) when the N-type contact end applies working voltage, the depletion region formed by the P-type floating region 1 and the high-voltage N well 13 is partially overlapped with the depletion region formed by the shallow trench isolation 19 in the high-voltage N well 13; (3) when the N-type contact end applies working voltage, a depletion region formed by the P-type floating region 1 and the high-voltage N well 13 and a depletion region formed by the P-type protection ring 6 and the high-voltage N well 13 are not overlapped; (4) when the N-type contact end applies working voltage, the P-type floating region is required to be in a floating state, otherwise, breakdown may occur at the fillet boundary between the P-type floating region and the high-voltage N well; (5) the depletion region of the P-type floating region partially coincides with the depletion region of the P-type substrate.
In the case where the above conditions are satisfied, it is preferable that the implantation energy of the ring-shaped P-type floating region is more than 200 KeV. Preferably, the total implantation dose of the annular P-type floating region is more than 1 × 1012/cm2. The P-type floating region may be formed through multiple implantations of multiple energies.
With continued reference to fig. 4, when the N-type contact 5 applies the operating voltage, a depletion region is formed between the P-type floating region 1 and the high-voltage N-well 13, and a depletion region is formed between the P-type guard ring 6 and the high-voltage N-well 13, as long as the two depletion regions do not overlap, the operating voltage V applied by the N-type contact 50It can be completely transmitted to the high-voltage N well 13 area under P-type guard ring 6 without loss, and can be used as the working voltage of diode.
With continued reference to fig. 4, when the N-type contact 5 applies the operating voltage, a depletion region is formed between the P-type floating region 1 and the high voltage N-well 13, and the high voltage N-well 13 inside and under the shallow trench isolation 19 forms a depletion region, as long as the two depletion regions are partially overlapped, the operating voltage V applied by the N-type contact 50Passing to region 13VT will decrease △ V, where V is0- △ V as the isolation voltage, compare with V in the background art0As an isolation voltage, the isolation voltage is reduced by △ V in the structure of the invention.
The core of the present invention is to separate the operating voltage and the isolation voltage of the diode, and as shown in fig. 9, tcad (technology Computer aid design) simulation results show that the applied voltage of 50V is reduced to less than 35V after passing through the shallow trench isolation and the P-type floating region. Namely, the invention can ensure that the isolation voltage is only 35V when the working voltage is 50V, thereby reducing the distance between the high-voltage N well and the P-type isolation region. When the N-type contact end applies working voltage, the depletion region of the P-type floating region and the depletion region of the P-type protection ring are not overlapped, so that the working voltage can be completely transmitted to the N-type injection diffusion layer; meanwhile, the depletion region of the P-type floating region is overlapped with the depletion region of the shallow trench isolation, so that the working voltage transmitted to the P-type isolation region is reduced, and the distance between the high-voltage N well and the P-type isolation region is further reduced.
The annular P-type floating region can extend to the lower part of the shallow trench isolation.
Under the condition of long-wave conditions of incident light such as infrared light and the like, if higher photon absorption efficiency is required, the thickness of the high-voltage N well is larger at the moment, in order to ensure that a depletion region of a P-type floating region is overlapped with a depletion region of a P-type substrate, M P-type floating rings in the vertical direction can be arranged on the P-type floating region, when working voltage is applied to an N-type contact end, two adjacent P-type floating rings are partially overlapped with the depletion region formed by the high-voltage N well, and the depletion region formed by the lowest P-type floating ring and the high-voltage N well is partially overlapped with the depletion region formed by the P-type substrate and the high-voltage N well.
The invention provides a method for preparing a single photon avalanche diode, which comprises the following steps:
s01: forming a P-type isolation region on a P-type substrate by photoetching and ion implantation; forming a high-voltage N well in a P-type isolation region on a P-type substrate;
s02: forming a P-type protection ring in the high-voltage N well through an ion implantation process;
s03: forming shallow trench isolation on the P-type isolation region;
s04: injecting a P well and an N well of a peripheral circuit;
s05: forming an N-type injection diffusion layer inside the P-type protection ring; and forming a gate oxide layer and a polysilicon gate of a peripheral circuit MOS device of the single photon avalanche diode.
S06: forming an annular P-type floating region between the shallow trench isolation and the P-type protection ring through an ion implantation process; when the P-type floating region includes a plurality of P-type floating rings, multiple times of implantation are performed in this step to form a plurality of P-type floating rings.
S07: forming a P-type injection diffusion layer above the N-type injection diffusion layer through an ion injection process to serve as an anode of the single-photon diode; forming a side wall and a source drain region of a single photon avalanche diode peripheral circuit MOS device; forming an N-type contact end of the single-photon diode at a position close to the shallow trench isolation in the high-voltage N well by using source-drain injection of the NMOS device; and forming the single photon diode after annealing.
In the invention, in step S04, peripheral circuit P trap and N trap injection is carried out, and a gate oxide layer and a polysilicon gate of a single photon avalanche diode peripheral circuit MOS device formed in step S05 are injected; the side wall and the source and drain regions of the single photon avalanche diode formed in step S07 are all the prior art, and may be formed by any process in the prior art, without limiting the structure and method of the present invention.
Example 1
Referring to fig. 5, the single photon avalanche diode according to the present invention includes a P-type substrate 12, a high voltage N-well 13 on the P-type substrate, and a P-type isolation region 14 between the high voltage N-wells; the N-type injection diffusion layer 11 and the P-type injection diffusion layer 7 are positioned in the high-voltage N well 13; a P-type guard ring 6 and an N-type contact terminal 5 located around the N-type injection diffusion layer 11 and the P-type injection diffusion layer 7; shallow trench isolation 19 located above the P-type isolation region 14; the annular P-type floating region 1 is positioned between the shallow trench isolation 19 and the P-type protection ring 6, and when the N-type contact end 5 applies working voltage, the depletion region formed by the P-type floating region 1 and the high-voltage N well and the depletion region formed by the shallow trench isolation 19 and the high-voltage N well are partially overlapped; and the depletion region formed by the P-type floating region 1 and the high-voltage N well and the depletion region formed by the P-type guard ring 6 and the high-voltage N well are not overlapped; and a dielectric layer 21 overlying the high voltage N-well and the shallow trench isolation. In order to further reduce the lateral size of the single photon avalanche diode, the P-type doped region 16 can be formed in the P-type isolation region 14, and the P-type doped region 16 is located at the center of the P-type isolation region.
Referring to FIG. 6, when the N type isWhen the contact terminal 5 applies the working voltage, a depletion region is formed between the P-type floating region 1 and the high-voltage N well 13, a depletion region is formed between the P-type guard ring 6 and the high-voltage N well 13, and the working voltage V applied by the N-type contact terminal 5 is not overlapped as long as the two depletion regions are not overlapped0It can be completely transmitted to the high-voltage N well 13 area under P-type guard ring 6 without loss, and can be used as the working voltage of diode.
With continued reference to fig. 6, when the N-type contact 5 applies the operating voltage, a depletion region is formed between the P-type floating region 1 and the high voltage N-well 13, and a depletion region is formed in the high voltage N-well 13 inside and below the shallow trench isolation 19, as long as the two depletion regions are partially overlapped, the operating voltage V applied by the N-type contact 50Passing to region 13VT will decrease △ V, where V is0- △ V as the isolation voltage, compare with V in the background art0The isolation voltage in the structure of the invention is reduced by △ v as the isolation voltage, at the same time, due to the existence of the P-type doped region 16, an N/P-/P junction is formed between the high voltage N-well 13 and the P-type doped region 16, under the isolation voltage of the region 13VT (i.e. the PN junction reverse voltage of N/P-/P), the part of the P-type isolation region 14 not containing the P-type doped region is completely depleted, due to the field stop effect, the electric field lateral distribution thereof is approximately trapezoidal (in the case of no P-type doped region 16 in embodiment 1, the electric field lateral distribution is approximately triangular), most of the reduced isolation voltage falls at the place of the P-type isolation region 14 not containing the P-type doped region, and the lateral size of the single photon diode isolation region can be further reduced by avalanche.
The method for preparing the single photon avalanche diode provided by the embodiment comprises the following steps:
s01: forming a P-type isolation region on a P-type substrate by photoetching and ion implantation methods, wherein the implantation dosage for forming the P-type isolation region can be slightly lower; forming a high-voltage N well in a P-type isolation region on a P-type substrate;
s02: forming a P-type protection ring in the high-voltage N well through an ion implantation process; performing ion implantation on the central part of the P-type isolation region to form a P-type doped region; and the total dosage of the P-type doped region is less than 1 × 1014/cm2。
S03: forming shallow trench isolation on the P-type isolation region;
s04: injecting a P well and an N well of a peripheral circuit;
s05: forming an N-type injection diffusion layer inside the P-type protection ring; forming a gate oxide layer and a polysilicon gate of a peripheral circuit MOS device of the single photon avalanche diode;
s06: forming an annular P-type floating region between the shallow trench isolation and the P-type protection ring through an ion implantation process;
s07: forming a P-type injection diffusion layer above the N-type injection diffusion layer through an ion injection process to serve as an anode of the single-photon diode; forming a side wall and a source drain region of the peripheral circuit MOS device; forming an N-type contact end of the single-photon diode at a position close to the shallow trench isolation in the high-voltage N well by using source-drain injection of the NMOS device; and forming the single photon diode after annealing.
Example 2
Referring to fig. 7 and 8, the single photon avalanche diode according to the present invention includes a P-type substrate 12, a high voltage N-well 13 on the P-type substrate, and a P-type isolation region 14 between the high voltage N-wells; the N-type injection diffusion layer 11 and the P-type injection diffusion layer 7 are positioned in the high-voltage N well 13; a P-type guard ring 6 and an N-type contact terminal 5 located around the N-type injection diffusion layer 11 and the P-type injection diffusion layer 7; shallow trench isolation 19 located above the P-type isolation region 14; the annular P-type floating region 1 is positioned between the shallow trench isolation 19 and the P-type protection ring 6, and when the N-type contact terminal 5 applies working voltage, the depletion region of the P-type floating region 1 is superposed with the depletion region of the shallow trench isolation 19; and the depletion region of the P-type floating region 1 and the depletion region of the P-type guard ring 6 are not overlapped; and a dielectric layer 21 overlying the high voltage N-well and the shallow trench isolation. The P-type floating region is M P-type floating rings which are vertically distributed, when the N-type contact end applies working voltage, depletion regions of the M P-type floating rings are overlapped, and the depletion region of the lowest P-type floating ring is overlapped with the depletion region of the P-type substrate; m is a positive integer greater than 0.
With reference to fig. 7, the P-type floating regions are two vertically distributed P-type floating rings 2, and when the N-type contact 5 applies the operating voltage, the depletion regions of the two P-type floating rings 2 coincide with each other, and the depletion region of the lowest P-type floating ring 2 coincides with the depletion region of the P-type substrate 12.
Under the condition of long-wave incident light such as infrared light and the like, if high photon absorption efficiency is required, the thickness of the high-voltage N well 13 is larger, in order to ensure that a depletion region of a P-type floating region coincides with a depletion region of a P-type substrate, the P-type floating region can be arranged into a plurality of P-type floating rings 2 in the vertical direction, when an operating voltage is applied to an N-type contact end, depletion regions of two adjacent P-type floating rings coincide, and a depletion region of the lowest P-type floating ring coincides with the depletion region of the P-type substrate. When the P-type floating region includes a plurality of P-type floating rings, the working principle is as described above, and refer to fig. 8 specifically, which will not be described in detail herein.
The method for preparing the single photon avalanche diode provided by the embodiment comprises the following steps:
s01: extending the lower half part of a high-voltage N well and the lower half part of a P-type isolation region on a P-type substrate by photoetching and ion implantation methods, simultaneously implanting a P-type floating ring below, and implanting impurities for activation;
s02: extending the upper half part of the high-voltage N well and the upper half part of the P-type isolation region on the P-type substrate by photoetching and ion implantation methods, implanting an upper P-type floating ring at the same time, and implanting impurities for activation;
s03: forming a P-type protection ring in the high-voltage N well through an ion implantation process;
s04: forming shallow trench isolation on the P-type isolation region;
s05: injecting a P well and an N well of a peripheral circuit;
s06: forming an N-type injection diffusion layer inside the P-type protection ring; forming a gate oxide layer and a polysilicon gate of a peripheral circuit MOS device of the single photon avalanche diode;
s07: forming a P-type injection diffusion layer above the N-type injection diffusion layer through an ion injection process to serve as an anode of the single-photon diode; forming a side wall and a source drain region of the single photon avalanche diode; forming an N-type contact end of the single-photon diode at a position close to the shallow trench isolation in the high-voltage N well by using source-drain injection of the NMOS device; and forming the single photon diode after annealing.
The above description is only a preferred embodiment of the present invention, and the embodiment is not intended to limit the scope of the present invention, so that all equivalent structural changes made by using the contents of the specification and the drawings of the present invention should be included in the scope of the appended claims.
Claims (9)
1. A single photon avalanche diode comprising
A P-type substrate,
the P-type isolation region is positioned between the high-voltage N well and the high-voltage N well on the P-type substrate;
the N-type injection diffusion layer and the P-type injection diffusion layer are positioned in the high-voltage N well;
the P-type protection ring and the N-type contact end are positioned around the N-type injection diffusion layer and the P-type injection diffusion layer;
the shallow trench isolation is positioned above the P-type isolation region and extends into the high-voltage N well;
when the N-type contact end applies working voltage, the depletion region formed by the P-type floating region and the high-voltage N well is partially overlapped with the depletion region formed by the shallow trench isolation in the high-voltage N well; and the depletion region formed by the P-type floating region and the high-voltage N well and the depletion region formed by the P-type protection ring and the high-voltage N well are not overlapped;
and the dielectric layer covers the high-voltage N well and the shallow trench isolation.
2. The single photon avalanche diode according to claim 1, wherein the P-type floating regions are M P-type floating rings distributed vertically, when the N-type contact terminal applies a working voltage, two adjacent P-type floating rings partially coincide with a depletion region formed by the high voltage N-well, and a depletion region formed by the lowest P-type floating ring and the high voltage N-well and a depletion region formed by the P-type substrate and the high voltage N-well partially coincide; m is a positive integer greater than 0.
3. The single photon avalanche diode according to claim 1 wherein said P-type isolation region includes a P-type doped region therein, and said P-type doped region is located at the center of said P-type isolation region.
4. A single photon avalanche diode according to claim 1 wherein said annular P-type floating region extends below said shallow trench isolation.
5. The single photon avalanche diode according to claim 1 wherein said P-type floating region and said depletion region of said high voltage N-well are partially coincident with the depletion region of said P-type substrate and said high voltage N-well.
6. A single photon avalanche diode according to claim 1 wherein said annular P-type floating region has an implantation energy greater than 200 KeV; the total implantation dose of the annular P-type floating region is more than 1 x 1012/cm2。
7. A method of making a single photon avalanche diode comprising the steps of:
s01: forming a P-type isolation region on a P-type substrate by photoetching and ion implantation; forming a high-voltage N well in a P-type isolation region on a P-type substrate;
s02: forming a P-type guard ring in the high-voltage N well through an ion implantation process;
s03: forming shallow trench isolation on the P-type isolation region;
s04: injecting a P well and an N well of a peripheral circuit;
s05: forming an N-type injection diffusion layer inside the P-type protection ring;
s06: forming an annular P-type floating region between the shallow trench isolation and the P-type protection ring through an ion implantation process;
s07: forming a P-type injection diffusion layer above the N-type injection diffusion layer through an ion injection process to serve as an anode of the single-photon diode; forming a side wall and a source drain region of a single photon avalanche diode peripheral circuit MOS device; forming an N-type contact end of the single-photon diode at a position close to the shallow trench isolation in the high-voltage N well by using source-drain injection of the NMOS device; and forming the single photon diode after annealing.
8. The method of making a single photon avalanche diode according to claim 7, wherein said step S02 further comprises: implanting a P-type doped region in the center of the P-type isolation region, wherein the implantation dose of the P-type doped region is less than 2 × 1013/cm2。
9. The method of manufacturing a single photon avalanche diode according to claim 7, wherein said step S06 includes: forming M P-type floating rings between the shallow trench isolation and the P-type protection ring through an ion implantation process; when the N-type contact end applies working voltage, the depletion regions formed by the two adjacent P-type floating rings and the high-voltage N well are partially overlapped, and the depletion region formed by the lowest P-type floating ring and the high-voltage N well is partially overlapped with the depletion region of the P-type substrate; m is a positive integer greater than 0.
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