WO2007139257A1 - Active pixel having pinned photodiode with coupling capacitor and method for sensing a signal thereof - Google Patents

Active pixel having pinned photodiode with coupling capacitor and method for sensing a signal thereof Download PDF

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Publication number
WO2007139257A1
WO2007139257A1 PCT/KR2006/004177 KR2006004177W WO2007139257A1 WO 2007139257 A1 WO2007139257 A1 WO 2007139257A1 KR 2006004177 W KR2006004177 W KR 2006004177W WO 2007139257 A1 WO2007139257 A1 WO 2007139257A1
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Prior art keywords
diffusion region
voltage
conductive type
reset
coupling capacitor
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PCT/KR2006/004177
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French (fr)
Inventor
Ja Woong Lee
Seokyu Lee
Hang Kyoo Kim
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Pixelplus Co., Ltd.
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Application filed by Pixelplus Co., Ltd. filed Critical Pixelplus Co., Ltd.
Publication of WO2007139257A1 publication Critical patent/WO2007139257A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14609Pixel-elements with integrated switching, control, storage or amplification elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14603Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/1462Coatings
    • H01L27/14623Optical shielding
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/709Circuitry for control of the power supply
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14643Photodiode arrays; MOS imagers

Definitions

  • the present invention generally relates to a CMOS image sensor, and more specifically, to an active pixel having a pinned photodiode (PPD) using a coupling capacitor without an ohmic-contacted output node.
  • PPD pinned photodiode
  • an image sensor is a device configured to convert an external optical image signal into an electric image signal.
  • a CMOS image sensor is fabricated with a CMOS manufacturing technology.
  • Each pixel of the CMOS image sensor changes light signals radiated from the corresponding part of an object into electrons with a photodiode, and converts the accumulated charge into voltage signals.
  • Fig. 1 is a circuit diagram illustrating a unit pixel of a general 3 -transistor CMOS image sensor.
  • the unit pixel of the CMOS image sensor comprises a photodiode (PD) 1, a reset switch (RSW) 2, a capacitor CFD 4 of a floating diffusion sensing node 3, and a signal amplifier 5.
  • PD photodiode
  • RSW reset switch
  • CFD 4 capacitor
  • FET signal amplifier
  • the reset switch 2 resets the floating diffusion sensing node (FDSN) 3 into a reset voltage VR which is an initial value.
  • the capacitor CFD 4 includes a junction capacitor of the photodiode 1, a capacitor located at an input terminal of the signal amplifier 5, and peripheral parasitic capacitors which are connected in parallel.
  • An output signal of the signal amplifier 5 is connected to a signal line of a pixel array.
  • the ohmic-contacted floating diffusion sensing node FDSN 3 transmits a signal of the photodiode 1 to the input terminal of the signal amplifier 5.
  • Electrons of the dark current from the ohmic contact are added in the signal electrons while the photodiode 1 receives light and accumulates the signal electrons in the 3 -transistor pixel structure and operation.
  • the photodiode 1 Since the photodiode 1 is directly connected to the floating diffusion sensing node FDSN 3 in the 3-transistor pixel, it is impossible to embody a shared structure where structures other than the photodiode 1 are shared in two or more pixels to reduce the number of devices per pixel.
  • the shared structure cannot be adopted because electrons generated from all photodiodes of the shared pixels are mixed with each other.
  • Fig. 2 is a cross-sectional and circuit diagram illustrating a general 3-transistor image sensor pixel.
  • a partially pinned photodiode part Dl and a reset switch part D2 are shown in the cross-sectional diagram, and a source follower 6 and an address switch 7 are shown in the circuit diagram.
  • the CMOS image sensor pixel comprises a partially pinned photodiode (PPPD), a reset switch (RSW), a source follower (SF) 6, an address switch (ASW) 7 and a constant current source 8.
  • PPPD partially pinned photodiode
  • RSW reset switch
  • SF source follower
  • ASW address switch
  • a signal amplifier 5 includes the source follower SF 6, the address switch ASW 7 and the constant current source 8.
  • the reset switch RSW and the address switch ASW 7 are formed of a field effect transistor (FET) respectively.
  • the reset switch RSW having a common drain with the SF 6 is connected to a driving voltage VDD.
  • an additional reset voltage VR is not used but the driving voltage VDD is used as a reset voltage.
  • the partially photodiode PPPD is formed of a pinned photodiode PPD including an ohmic-contacted diffusion sensing node.
  • the partially pinned photodiode part Dl includes a n-type diffusion region 10 and a p+ diffusion region 11 which are formed in a p-type epitaxial layer (or p-type substrate) 9, and a n+ type diffusion region 12 for forming the ohmic-contacted sensing node in the n-type diffusion region 10.
  • the reset switch part D2 has a structure including a p-type well 13 formed in the p-type epitaxial layer (or p-type substrate) 9, a n+ type diffusion region 14 used as a reset- voltage-applying terminal formed in the p-type well 13, and an insulating layer and a gate electrode over a region where a channel is formed between the n+ type diffusion region 12 and the n+ type diffusion region 14.
  • a p-type well 15 is formed around the partially pinned photodiode part Dl .
  • the partially pinned photodiode PPPD has a smaller dark current generated from the silicon surface than that of the general photodiode.
  • the present invention has the following obj ects .
  • Various embodiments of the present invention are directed at providing a photodiode and an active pixel configured to reduce the dark current generated from the ohmic-contacted diffusion sensing node.
  • Various embodiments of the present invention are directed at providing a photodiode and an active pixel configured to reduce reset noise.
  • Various embodiments of the present invention are directed at providing a photodiode and an active pixel configured to have a shared structure without any transfer gates between the photodiode and the sensing node.
  • a pinned photodiode comprises: an epitaxial layer having a first conductive type; a first diffusion region having a second conductive type formed in the epitaxial layer; a second diffusion region having a first conductive type formed over the first diffusion region; a third diffusion region having a second conductive type formed in the epitaxial layer and electrically connected to the first diffusion region; and a coupling capacitor connected to the third diffusion region and configured to transmit outside a voltage change of the third diffusion region.
  • an active pixel comprises: a photodiode which comprises an epitaxial layer having a first conductive type, a first diffusion region having a second conductive type formed in the epitaxial layer, a second diffusion region having a first conductive type formed over the first diffusion region, a third diffusion region having a second conductive type formed in the epitaxial layer and electrically connected to the first diffusion region; and a coupling capacitor connected to the third diffusion region and configured to transmit outside a voltage change of the third diffusion region; a reset switch configured to reset the first diffusion region and the third diffusion region of the photodiode with a reset voltage source; a multi-functional switch, connected between a variable voltage source and an output terminal of the coupling capacitor, configured to apply a voltage of the variable voltage source to the output terminal; and a signal amplifier configured to transmit a voltage signal corresponding to the voltage change transmitted by the coupling capacitor to a signal line of a pixel array.
  • a method for sensing a signal of an active pixel which comprises: a photodiode comprising an epitaxial layer having a first conductive type, a first diffusion region having a second conductive type formed in the epitaxial layer, a second diffusion region having a first conductive type formed over the first diffusion region; a third diffusion region having a second conductive type formed in the epitaxial layer and electrically connected to the first diffusion region, and a coupling capacitor connected to the third diffusion region and configured to transmit outside a voltage change of the third diffusion region; a reset switch configured to reset the first diffusion region and the third diffusion region of the photodiode with a reset voltage source; a multi-functional switch, connected between a variable voltage source and an output terminal of the coupling capacitor, configured to apply a voltage of the variable voltage source to the output terminal; and a signal amplifier configured to transmit a voltage signal corresponding to the voltage change transmitted by the coupling capacitor to a signal line of a pixel array, comprises the steps of:
  • a method for sensing a signal of an active pixel which comprises: a photodiode comprising an epitaxial layer having a first conductive type; a first diffusion region having a second conductive type formed in the epitaxial layer; a second diffusion region having a first conductive type formed over the first diffusion region; a third diffusion region having a second conductive type formed in the epitaxial layer and electrically connected to the first diffusion region; and a coupling capacitor connected to the third diffusion region and configured to transmit outside a voltage change of the third diffusion region; a reset switch configured to reset the first diffusion region and the third diffusion region of the photodiode with a reset voltage source; a multi-functional switch, connected between a variable voltage source and an output terminal of the coupling capacitor, configured to apply a voltage of the variable voltage source to the output terminal; and a signal amplifier configured to transmit a voltage signal corresponding to the voltage change transmitted by the coupling capacitor to a signal line of a pixel array, comprises the steps of:
  • Fig. 1 is a circuit diagram illustrating a unit pixel of a general 3-transistor CMOS image sensor
  • Fig. 2 is a cross-sectional and circuit diagram illustrating a general 3-transistor CMOS image sensor pixel.
  • Fig. 3 is a diagram illustrating a pinned photodiode part D3 and an output node part D4 in a capacitor combined pinned photodiode (CCPPD) according to an embodiment of the present invention.
  • Fig. 4 is a cross-sectional diagram taken along A-A' of Fig. 3.
  • Fig. 5 is a cross-sectional diagram taken along B-B' of Fig. 3.
  • Fig. 6 is a cross-sectional diagram taken along C-C of Fig. 3.
  • Fig. 7 is a diagram illustrating the capacitor combined pinned photodiode CCPPD and a reset switch part D5 in an embodiment where the output node part D4 of the CCPPD is connected to the reset switch part D5.
  • Fig. 8 is a cross-sectional diagram taken along D-D' of Fig. 7.
  • Fig. 9 is a diagram illustrating the capacitor combined pinned photodiode CCPPD and the reset switch part D5 in an embodiment where the pinned photodiode part D3 of the CCPPD is connected to the reset switch part D5.
  • Fig. 10 is a cross-sectional diagram taken along E-E' of Fig. 9.
  • Fig. 11 is a cross-sectional diagram taken along F-F' of Fig. 9.
  • Fig. 12 is a cross-sectional diagram taken along G-G' of Fig. 9.
  • Fig. 13 is a cross-sectional and circuit diagram illustrating an active pixel including the CCPPD and the reset switch RSW of Figs. 7 and 8, a multi-functional switch 24, and a signal amplifier 25.
  • Fig. 14 is a cross-sectional and circuit diagram illustrating an active pixel including the CCPPD and the reset switch RSW of Figs. 9 through 12, a multi-functional switch 24, and a signal amplifier 25.
  • Fig. 15 is a diagram illustrating an example of Fig. 13 with the signal amplifier 25 comprising a source follower (SF) 26 and a constant current source 27.
  • SF source follower
  • Fig. 16 is a diagram illustrating an example of Fig. 15 wherein a driving voltage VDD of the source follower 26 is used in common as the reset voltage source.
  • Fig. 17 is a diagram illustrating an example of Fig. 14 with the signal amplifier
  • SF source follower
  • Fig. 18 is a diagram illustrating an example of Fig. 17 wherein a driving voltage VDD of the source follower 26 is used in common as the reset voltage source.
  • Fig. 3 is a diagram illustrating a pinned photodiode part D3 and an output node part D4 in a capacitor combined pinned photodiode (CCPPD) according to an embodiment of the present invention.
  • the capacitor combined pinned photodiode CCPPD includes a pinned photodiode PPD part D3 and an output node part D4.
  • the geometrical shape of the pinned photodiode part D3 and the output node part D4 can be changed.
  • Fig. 4 is a cross-sectional diagram taken along A-A' of Fig. 3
  • Fig. 5 is a cross-sectional diagram taken along B-B' of Fig. 3.
  • the capacitor combined pinned photodiode CCPPD includes a n-type diffusion region 10 and a p+ type diffusion region 11 which are successively formed in a p-type epitaxial layer (or p-type substrate) 9.
  • a p-type well 15 is formed around the periphery of part D3 in the capacitor combined pinned photodiode CCPPD.
  • Fig. 6 is a cross-sectional diagram taken along C-C of Fig. 3.
  • the pinned photodiode part D3 includes the n-type diffusion region 10 and the p+ type diffusion region 11 which are successively formed in the p-type epitaxial layer
  • the output node part D4 comprises a n-type diffusion region 16 formed in the p-type epitaxial layer (or p-type substrate) 9 which is used as a first electrode of a coupling capacitor CC, and an oxide insulating layer 18 as a dielectric layer and a second electrode 19.
  • the n-type diffusion region 16 of the output node part D4 touches the n-type diffusion region 10 of the pinned photodiode part D3. As a result, electrons are allowed to move between the n-type diffusion region 10 and the n-type diffusion region 16.
  • the doping concentration of the n-type diffusion region 16 of the output node part D4 can be the same as or different from that of the n-type diffusion region 10 of the pinned photodiode part D3.
  • the p-type well 15 is formed around the pinned photodiode part D3 and the output node part D4.
  • the coupling capacitor CC is composed of the n type diffusion region 16 as a first electrode, the oxide insulating layer 18 as a dielectric layer, and the second electrode 19 formed over the oxide insulating layer 18. So, a voltage change of the n-type diffusion region 16 is transmitted to another parts through the coupling capacitor CC.
  • the impurity doping concentration of the n-type diffusion region 16 can be lower than that of ohmic contact. So, the dark current in the output node part D4 can be reduced in comparison with the ohmic-contacted diffusion sensing nodes 3 and 12 because physical defects introduced in the sensing nodes 3 and 12 for forming ohmic contact can be reduced. The physical defects of the sensing nodes are main cause of the dark current of the sensing nodes.
  • the n-type diffusion region 10 of the pinned photodiode part D3 can be fully depleted by reset.
  • the doping concentration of the n-type diffusion region 16 of the output node part D4 can be lower than that for ohmic contacting, thereby reducing the image lag and the reset noise in comparison with a general 3 -transistor pixel having the ohmic-contacted diffusion sensing nodes 3 and 12.
  • Fig. 7 is a diagram illustrating the capacitor combined pinned photodiode
  • the capacitor combined pinned photodiode CCPPD includes a pinned photodiode PPD part D3 and an output node part D4.
  • a reset switch part D5 is formed to adjoin the output node part D4. The geometrical shape of the pinned photodiode part 3, the output node part D4 and the reset switch part D5 can be changed.
  • Fig. 8 is a cross-sectional diagram taken along D-D' of Fig. 7.
  • the pinned photodiode part D3 includes the n-type diffusion region 10 and the p+ type diffusion region 11 which are formed in the p-type epitaxial layer (or p-type substrate) 9.
  • the output node part D4 includes a n-type diffusion region 16 formed in the p-type epitaxial layer (or p-type substrate) 9 which is used as a first electrode of a coupling capacitor CC, an oxide insulating layer 18 as a dielectric layer and a second electrode 19.
  • the n-type diffusion region 16 of the output node part D4 touches the n- type diffusion region 10 of the pinned photodiode part D3. As a result, electrons are allowed to move between the n-type diffusion region 10 and the n-type diffusion region
  • the p-type well 15 is formed around the pinned photodiode part D3 except a portion contacting with the reset switch part D5.
  • the reset switch part D5 comprises a p-type well 20 formed in the p-type epitaxial layer (or p-type substrate) 9, a n+ type diffusion region 21 used as a reset voltage applying terminal formed in the p-type well 20, and an oxide insulating layer 22 and a gate electrode 23 over a region where a channel is formed between the n-type diffusion region 16 of the output node part D4 and the n+ type diffusion region 21.
  • Fig. 9 is a diagram illustrating the capacitor combined pinned photodiode
  • the capacitor combined pinned photodiode CCPPD includes a pinned photodiode PPD part D3 and an output node part D4.
  • a reset switch part D5 is formed to adjoin the pinned photodiode part D3.
  • the geometrical shape of the pinned photodiode part 3, the output node part D4 and the reset switch part D5 can be changed.
  • Fig. 10 is a cross-sectional diagram taken along E-E 1 of Fig. 9.
  • the pinned photodiode part D3 includes the n-type diffusion region 10 and the p+ type diffusion region 11 which are formed in the p-type epitaxial layer (or p-type substrate) 9.
  • the output node part D4 includes a n-type diffusion region 16 formed in the p-type epitaxial layer (or p-type substrate) 9 which is used as a first electrode of a coupling capacitor CC, an oxide insulating layer 18 as a dielectric layer and a second electrode 19.
  • the n-type diffusion region 16 of the output node part D4 touches the n- type diffusion region 10 of the pinned photodiode part D3. As a result, electrons are allowed to move between the n-type diffusion region 10 and the n-type diffusion region 16.
  • the p-type well 15 is formed around the pinned photodiode part D3 and the output node part D4.
  • Fig. 11 is a cross-sectional diagram taken along F-F' of Fig. 9.
  • the pinned photodiode part D3 includes the n-type diffusion region 10 and the p+ type diffusion region 11 which are formed in the p-type epitaxial layer (or p-type substrate) 9.
  • the reset switch part D5 comprises a p-type well 20 formed in the p-type epitaxial layer (or p-type substrate) 9, a n+ type diffusion region 21 used as a reset voltage applying terminal formed in the p-type well 20, and an oxide insulating layer 22 and a gate electrode 23 over a region where a channel is formed between the n-type diffusion region 10 of the pinned photodiode part D3 and the n+ type diffusion region 21.
  • the p-type well 15 is formed around the pinned photodiode part D3 except a part contacting with the reset switch part D5.
  • Fig. 12 is a cross-sectional diagram taken along G-G' of Fig. 9.
  • the reset switch part D5 the pinned photodiode D3 and the output node part D4 are sequentially connected.
  • the reset switch part D5 comprises a p-type well 20 formed in the p-type epitaxial layer (or p-type substrate) 9, a n+ type diffusion region 21 used as a reset voltage applying terminal formed in the p-type well 20, and an oxide insulating layer 22 and a gate electrode 23 over a region where a channel is formed between the n-type diffusion region 10 of the pinned photodiode part D3 and the n+ type diffusion region 21.
  • the pinned photodiode part D3 includes the n-type diffusion region 10 and the p+ type diffusion region 11 which are formed in the p-type epitaxial layer (or p-type substrate) 9.
  • the output node part D4 includes an n-type diffusion region 16 formed in the p-type epitaxial layer (or p-type substrate) 9 which is used as a first electrode of a coupling capacitor CC, an oxide insulating layer 18 as a dielectric layer and a second electrode 19.
  • the n-type diffusion region 16 of the output node part D4 touches the n- type diffusion region 10 of the pinned photodiode part D3. As a result, electrons are allowed to move between the n-type diffusion region 10 and the n-type diffusion region 16.
  • the p-type well 15 is formed around the capacitor combined pinned photodiode CCPPD part D3 and the output node part D4 except a part contacting with the reset switch part D5.
  • Fig. 13 is a cross-sectional and circuit diagram illustrating an active pixel including the capacitor combined pinned photodiode CCPPD and the reset switch RSW of Figs. 7 and 8, a multi-functional switch 24 and a signal amplifier 25.
  • the capacitor combined pinned photodiode CCPPD and the reset switch part D5 are shown in the cross- sectional diagram, and the multi-functional switch 24 and the signal amplifier 25 are shown in the circuit diagram.
  • the reset switch RSW is connected to the output node part D4 of the capacitor combined pinned photodiode CCPPD.
  • the capacitor combined pinned photodiode CCPPD absorbs light radiated from an object to generate signal electrons.
  • the signal electrons are distributed in the n-type diffusion region 10 of the pinned photodiode part D3 and the n-type diffusion region 16 of the output node part D4.
  • the coupling capacitor CC transmits the voltage change of the n-type diffusion region 16 to the input terminal of the signal amplifier 25. The voltage change occurs when the signal electrons flow into or out from the n-type diffusion region 16 of the output node part D4.
  • the input terminal of the signal amplifier 25 is connected to the second electrode 19 which is the output terminal of the coupling capacitor CC.
  • the reset switch RSW discharges the electrons stored in the n-type diffusion regions 10 and 16 of the capacitor combined pinned photodiode CCPPD through the n+ diffusion region 21 connected to the reset voltage source VR, to reset a voltage of the n- type diffusion regions 10 and 16 of the capacitor combined pinned photodiode CCPPD into an initial value.
  • the multi-functional switch 24 has the following functions in the operation of the above-described pixel.
  • the multi-functional switch 24 provides a discharging path to a floating structure when the input terminal of the signal amplifier 25 is floating. So, the multi-functional switch 24 prevents the related devices such as the signal amplifier and coupling capacitor from malfunctioning and being damaged.
  • the multi-functional switch 24 sets the initial voltage of the input terminal of the signal amplifier 25 and the second electrode 19 of the coupling capacitor CC into a specific value with the variable voltage source VC.
  • the output terminal of the signal amplifier 25 is directly connected to a signal line of a pixel array, or is connected to the signal line through an addressing switch for connecting/disconnecting an output signal of the signal amplifier 25. When the output terminal of the signal amplifier 25 is directly connected to the signal line of the pixel array without the addressing switch, the signal amplifier 25 is required to be controlled on/off states.
  • a voltage of the variable voltage source VR is set to a first voltage VL (e.g., OV) and the multi-functional switch 24 is turned on so that a voltage of the second electrode 19 of the coupling capacitor CC is fixed at the first voltage VL.
  • the reset switch RSW is turned on to reset the n-type diffusion regions 10 and 16 of the capacitor combined pinned photodiode CCPPD.
  • the voltage of the variable voltage source VC is set to a second voltage VH higher than the first voltage VL.
  • the second voltage VH is set to a sufficiently higher value (e.g., driving voltage VDD of the signal amplifier 25) in consideration of a dropping range of the signal voltage due to light.
  • the reset switch RSW and the multi-functional switch 24 are turned off to finish the reset operation of the capacitor combined pinned photodiode CCPPD.
  • the voltage of the n- type diffusion region 16 falls down and the voltage change is transmitted to the signal amplifier 25 through the second electrode 19 which is the output terminal of the coupling capacitor CC. That is, the voltage of the input terminal of the signal amplifier 25 falls down from the initial value VH.
  • the change of the signal voltage of the input terminal of the signal amplifier 25 gives information on the amount of the signal electrons, that is, on the amount of the incident light into the pixel.
  • the voltage of the variable voltage source VC is set to the first voltage VL (e.g., OV), and the multi-functional switch 24 is turned on to fix the voltage of the second electrode 19 of the coupling capacitor CC at the first voltage VL.
  • the reset switch RSW is turned on to reset the n-type diffusion regions 10 and 16 of the capacitor combined pinned photodiode CCPPD.
  • the reset switch RSW is turned off to finish the reset operation of the capacitor combined pinned photodiode CCPPD.
  • the multi-functional switch 24 is kept on or turned off. Both of the ways are possible
  • the signal electrons are accumulated in the n-type diffusion regions 10 and 16 of the capacitor combined pinned photodiode CCPPD by the incident light, and the amount of the accumulated signal electrons is read by the following operation.
  • the value of the variable voltage source VC is set to a voltage VLl larger than an input threshold voltage VT of the signal amplifier 25.
  • the multi-functional switch 24 is turned on, if it was turned off before, to set the initial value of the second electrode of the coupling capacitor CC and the input terminal of the signal amplifier 25 to the voltage VLl.
  • the multi-functional switch 24 is turned off and the reset switch RSW is turned on to remove the signal electrons from the n-type diffusion regions 10 and 16 of the capacitor combined pinned photodiode CCPPD. As a result, the voltage of the n-type diffusion region 16 of the capacitor combined pinned photodiode CCPPD rises.
  • the voltage change is transmitted to the input terminal of the signal amplifier 25 through the second electrode 19 of the coupling capacitor CC. That is, when the signal electrons accumulated in the capacitor combined pinned photodiode CCPPD are reset, the voltage of the input terminal of the signal amplifier 25 rises from the initial value VLl .
  • the amount of the signal electrons that is, the amount of the incident light can be evaluated from the rise of the voltage.
  • the second operation method is roughly opposite in concept to that of a general
  • Fig. 14 is a cross-sectional and circuit diagram illustrating an active pixel including the capacitor combined pinned photodiode CCPPD and the reset switch RSW of Figs. 9 through 12, a multi-functional switch 24 and a signal amplifier 25.
  • the capacitor combined pinned photodiode CCPPD and the reset switch part D5 are shown in the cross-sectional diagram, and the multi-functional switch 24 and the signal amplifier 25 are shown in the circuit diagram.
  • Fig. 14 The operation of Fig. 14 is the same as the operation of Fig. 13.
  • Fig. 15 is a diagram illustrating an example of Fig. 13 in which the signal amplifier 25 is composed of a source follower (SF) 26 and a constant current source 27.
  • SF source follower
  • Fig. 16 is a diagram illustrating an example of Fig. 15 wherein a driving voltage VDD of the source follower 26 is used in common as a reset voltage source VR.
  • the voltage of the variable voltage source VC is set to the first voltage VL (e.g., OV), and the multi-functional switch 24 is turned on to fix the voltage of the second electrode 19 of the coupling capacitor CC at the first voltage VL.
  • VL e.g., OV
  • the source follower active transistor 26 is automatically turned off.
  • the reset switch RSW is turned on to reset the n-type diffusion regions 10 and 16 of the capacitor combined pinned photodiode CCPPD.
  • the reset switch RSW is turned off to finish the reset operation of the capacitor combined pinned photodiode CCPPD.
  • the multi-functional switch 24 is kept on or turned off. Both of the ways are possible.
  • the signal electrons are accumulated in the n-type diffusion regions 10 and 16 of the capacitor combined pinned photodiode CCPPD by the incident light signal.
  • the amount of the accumulated signal electrons is read by the following operation.
  • the value of the variable voltage source VC is set to a voltage VLl larger than an input threshold voltage VT of the source follower active transistor 26.
  • the multifunctional switch 24 is turned on, if it was turned off before, to set the initial value of the second electrode 19 of the coupling capacitor CC and a gate of the source follower active transistor 26 to the voltage VLl.
  • the multi-functional switch 24 is turned off and the reset switch RSW is turned on to remove the signal electrons from the n-type diffusion regions 10 and 16 of the capacitor combined pinned photodiode CCPPD.
  • the voltage of the n-type diffusion region 16 of the output node part D4 rises.
  • the voltage change is transmitted to the gate of the source follower active transistor 26 through the second electrode 19 which is an output terminal of the coupling capacitor CC. That is, when the signal electrons accumulated in the capacitor combined pinned photodiode CCPPD are reset, the voltage of the gate of the source follower active transistor 26 rises from the initial value VLl .
  • the amount of the signal electrons that is, the amount of the incident lights can be evaluated from the voltage rising value.
  • the on/off states of the source follower active transistor 26 are controlled by the voltage setting value of the gate terminal so that an addressing switch for selectively transmitting an output voltage to the signal line of the pixel array is not required.
  • the multi-functional switch 24 has the following functions in the pixel.
  • the multi-functional switch 24 provides a path for discharging net charge flowed into the electrically floating structure at the connecting node of the gate of the source follower 26 and second electrode 19 of the coupling capacitor CC.
  • the multi-functional switch 24 prevents the malfunction or damages of the coupling capacitor CC and the source follower active transistor 26.
  • the multi-functional switch 24 sets the initial voltage of the gate of the source follower active transistor 26 and the second electrode 19 of the coupling capacitor CC at a specific value with the variable voltage source VC.
  • Fig. 17 is a diagram illustrating an example of Fig. 14 with the signal amplifier 25 which is composed of a source follower (SF) 26 and a constant current source 27.
  • SF source follower
  • Fig. 18 is a diagram illustrating an example of Fig. 17 wherein a driving voltage VDD of the source follower 26is used in common as a reset voltage source VR.
  • the operation of Figs. 17 and 18 is the same as that of Figs. 15 and 16.
  • the CMOS image sensor according to an embodiment of the present invention has the following effects.
  • the signal voltage is transmitted to the signal amplifier with the coupling capacitor instead of the ohmic-contacted diffusion sensing node in order to reduce the dark current generated from the ohmic contact.
  • the n-type diffusion regions 10 of the pinned photodiode part D3 and 16 of the output part D4 are fully depleted.
  • the impurity doping concentration of the n-type diffusion region 16 of the output node part D4 is lower than that of the conventional ohmic-contacted diffusion sensing node. So, a reset noise and an image lag can be reduced.
  • the shared structure can be embodied by using the coupling capacitor instead of the ohmic-contacted diffusion sensing node.

Abstract

A pinned photodiode with a coupling capacity and an active pixel using it. The pinned photodiode comprises a first diffusion region having a second conductive type formed in an epitaxial layer having a first conductive type; a second diffusion region having a first conductive type formed over the first diffusion region; a third diffusion region having a second conductive type formed in the epitaxial layer and electrically connected to the first diffusion region; and a coupling capacitor connected to the third diffusion region and configured to transmit outside a voltage change of the third diffusion region. The active pixel comprises the pinned photodiode described above, a reset switch, a multi-functional switch between a variable voltage source and an output terminal of the coupling capacitor, and a signal amplifier.

Description

ACTIVE PIXEL HAVING PINNED PHOTODIODE WITH COUPLING CAPACITORAND METHOD FOR SENSING A SIGNAL THEREOF
Technical Field The present invention generally relates to a CMOS image sensor, and more specifically, to an active pixel having a pinned photodiode (PPD) using a coupling capacitor without an ohmic-contacted output node.
Background of the Invention Generally, an image sensor is a device configured to convert an external optical image signal into an electric image signal. Specifically, a CMOS image sensor is fabricated with a CMOS manufacturing technology. Each pixel of the CMOS image sensor changes light signals radiated from the corresponding part of an object into electrons with a photodiode, and converts the accumulated charge into voltage signals. Fig. 1 is a circuit diagram illustrating a unit pixel of a general 3 -transistor CMOS image sensor.
The unit pixel of the CMOS image sensor comprises a photodiode (PD) 1, a reset switch (RSW) 2, a capacitor CFD 4 of a floating diffusion sensing node 3, and a signal amplifier 5. Hereinafter, the operation of the unit pixel of the CMOS image sensor is described.
The reset switch 2 resets the floating diffusion sensing node (FDSN) 3 into a reset voltage VR which is an initial value.
Signal electrons generated corresponding to incident light in the photodiode 1 are accumulated in the capacitor CFD 4 of the floating diffusion sensing node FDSN 3. The capacitor CFD 4 includes a junction capacitor of the photodiode 1, a capacitor located at an input terminal of the signal amplifier 5, and peripheral parasitic capacitors which are connected in parallel.
As the signal electrons are accumulated in the capacitor CFD 4, a changing signal voltage is transmitted to the input terminal of the signal amplifier 5.
An output signal of the signal amplifier 5 is connected to a signal line of a pixel array.
In the general CMOS image sensor pixel of Fig. 1, the ohmic-contacted floating diffusion sensing node FDSN 3 transmits a signal of the photodiode 1 to the input terminal of the signal amplifier 5.
While the ohmic contact is formed, many physical defects are generated so that large dark current is generated from the floating diffusion sensing node FDSN 3.
Electrons of the dark current from the ohmic contact are added in the signal electrons while the photodiode 1 receives light and accumulates the signal electrons in the 3 -transistor pixel structure and operation.
As a result, a noise generated around the floating diffusion sensing node FDSN 3 by the dark current severely degrades the image quality in the 3 -transistor pixel structure.
When the photodiode 1 is reset at the reset voltage VR with the reset switch 2, a kTC reset noise is generated. And a correlated double sampling method used in a 4- transistor pixel cannot be applied to remove the reset noise in the 3-transistor pixel structure.
Since the photodiode 1 is directly connected to the floating diffusion sensing node FDSN 3 in the 3-transistor pixel, it is impossible to embody a shared structure where structures other than the photodiode 1 are shared in two or more pixels to reduce the number of devices per pixel. The shared structure cannot be adopted because electrons generated from all photodiodes of the shared pixels are mixed with each other.
Fig. 2 is a cross-sectional and circuit diagram illustrating a general 3-transistor image sensor pixel. A partially pinned photodiode part Dl and a reset switch part D2 are shown in the cross-sectional diagram, and a source follower 6 and an address switch 7 are shown in the circuit diagram.
The CMOS image sensor pixel comprises a partially pinned photodiode (PPPD), a reset switch (RSW), a source follower (SF) 6, an address switch (ASW) 7 and a constant current source 8.
A signal amplifier 5 includes the source follower SF 6, the address switch ASW 7 and the constant current source 8.
The reset switch RSW and the address switch ASW 7 are formed of a field effect transistor (FET) respectively. The reset switch RSW having a common drain with the SF 6 is connected to a driving voltage VDD. As a result, an additional reset voltage VR is not used but the driving voltage VDD is used as a reset voltage. The partially photodiode PPPD is formed of a pinned photodiode PPD including an ohmic-contacted diffusion sensing node. The partially pinned photodiode part Dl includes a n-type diffusion region 10 and a p+ diffusion region 11 which are formed in a p-type epitaxial layer (or p-type substrate) 9, and a n+ type diffusion region 12 for forming the ohmic-contacted sensing node in the n-type diffusion region 10. The reset switch part D2 has a structure including a p-type well 13 formed in the p-type epitaxial layer (or p-type substrate) 9, a n+ type diffusion region 14 used as a reset- voltage-applying terminal formed in the p-type well 13, and an insulating layer and a gate electrode over a region where a channel is formed between the n+ type diffusion region 12 and the n+ type diffusion region 14. A p-type well 15 is formed around the partially pinned photodiode part Dl . The partially pinned photodiode PPPD has a smaller dark current generated from the silicon surface than that of the general photodiode.
However, there is large dark current generated from the n+ type diffusion region 12 for forming the ohmic-contacted diffusion sensing node and a reset noise generated by the reset switch RSW.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
Technical Subject
In order to overcome the above-described shortcomings, the present invention has the following obj ects .
Various embodiments of the present invention are directed at providing a photodiode and an active pixel configured to reduce the dark current generated from the ohmic-contacted diffusion sensing node.
Various embodiments of the present invention are directed at providing a photodiode and an active pixel configured to reduce reset noise.
Various embodiments of the present invention are directed at providing a photodiode and an active pixel configured to have a shared structure without any transfer gates between the photodiode and the sensing node.
Technical Solution
According to an embodiment of the present invention, a pinned photodiode comprises: an epitaxial layer having a first conductive type; a first diffusion region having a second conductive type formed in the epitaxial layer; a second diffusion region having a first conductive type formed over the first diffusion region; a third diffusion region having a second conductive type formed in the epitaxial layer and electrically connected to the first diffusion region; and a coupling capacitor connected to the third diffusion region and configured to transmit outside a voltage change of the third diffusion region.
According to an embodiment of the present invention, an active pixel comprises: a photodiode which comprises an epitaxial layer having a first conductive type, a first diffusion region having a second conductive type formed in the epitaxial layer, a second diffusion region having a first conductive type formed over the first diffusion region, a third diffusion region having a second conductive type formed in the epitaxial layer and electrically connected to the first diffusion region; and a coupling capacitor connected to the third diffusion region and configured to transmit outside a voltage change of the third diffusion region; a reset switch configured to reset the first diffusion region and the third diffusion region of the photodiode with a reset voltage source; a multi-functional switch, connected between a variable voltage source and an output terminal of the coupling capacitor, configured to apply a voltage of the variable voltage source to the output terminal; and a signal amplifier configured to transmit a voltage signal corresponding to the voltage change transmitted by the coupling capacitor to a signal line of a pixel array.
According to an embodiment of the present invention, a method for sensing a signal of an active pixel, which comprises: a photodiode comprising an epitaxial layer having a first conductive type, a first diffusion region having a second conductive type formed in the epitaxial layer, a second diffusion region having a first conductive type formed over the first diffusion region; a third diffusion region having a second conductive type formed in the epitaxial layer and electrically connected to the first diffusion region, and a coupling capacitor connected to the third diffusion region and configured to transmit outside a voltage change of the third diffusion region; a reset switch configured to reset the first diffusion region and the third diffusion region of the photodiode with a reset voltage source; a multi-functional switch, connected between a variable voltage source and an output terminal of the coupling capacitor, configured to apply a voltage of the variable voltage source to the output terminal; and a signal amplifier configured to transmit a voltage signal corresponding to the voltage change transmitted by the coupling capacitor to a signal line of a pixel array, comprises the steps of: fixing the output terminal of the coupling capacitor at a first voltage level with the variable voltage source when the multi-functional switch is turned on; resetting the first diffusion region and the third diffusion region by turning on the reset switch; setting a voltage of the input terminal of the signal amplifier at a second voltage higher than the first voltage with the variable voltage source to read a value of the output voltage of the signal amplifier; storing electrons generated by absorbing light in the first diffusion region and the third diffusion region after the reset switch and the multi-functional switch are turned off; and sensing a change of the output voltage of the signal amplifier.
According to an embodiment of the present invention, a method for sensing a signal of an active pixel, which comprises: a photodiode comprising an epitaxial layer having a first conductive type; a first diffusion region having a second conductive type formed in the epitaxial layer; a second diffusion region having a first conductive type formed over the first diffusion region; a third diffusion region having a second conductive type formed in the epitaxial layer and electrically connected to the first diffusion region; and a coupling capacitor connected to the third diffusion region and configured to transmit outside a voltage change of the third diffusion region; a reset switch configured to reset the first diffusion region and the third diffusion region of the photodiode with a reset voltage source; a multi-functional switch, connected between a variable voltage source and an output terminal of the coupling capacitor, configured to apply a voltage of the variable voltage source to the output terminal; and a signal amplifier configured to transmit a voltage signal corresponding to the voltage change transmitted by the coupling capacitor to a signal line of a pixel array, comprises the steps of: fixing the output terminal of the coupling capacitor at a first voltage level with the variable voltage when the multi-functional switch is turned on; resetting the first diffusion region and the third diffusion region by turning on the reset switch; storing electrons generated by absorbing light in the first diffusion region and the third diffusion region after the reset switch and the multi-functional switch are turned off; setting a voltage of the input terminal of the signal amplifier at a second voltage higher than an input threshold voltage of the signal amplifier with the variable voltage source after the multi-functional switch is turned on, and reading an output signal of the signal amplifier after the multi-functional switch is turned off; removing the electrons stored in the first diffusion region and the third diffusion region by turning on the reset switch; and sensing a change of the output voltage of the signal amplifier.
BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a circuit diagram illustrating a unit pixel of a general 3-transistor CMOS image sensor
Fig. 2 is a cross-sectional and circuit diagram illustrating a general 3-transistor CMOS image sensor pixel.
Fig. 3 is a diagram illustrating a pinned photodiode part D3 and an output node part D4 in a capacitor combined pinned photodiode (CCPPD) according to an embodiment of the present invention.
Fig. 4 is a cross-sectional diagram taken along A-A' of Fig. 3. Fig. 5 is a cross-sectional diagram taken along B-B' of Fig. 3. Fig. 6 is a cross-sectional diagram taken along C-C of Fig. 3. Fig. 7 is a diagram illustrating the capacitor combined pinned photodiode CCPPD and a reset switch part D5 in an embodiment where the output node part D4 of the CCPPD is connected to the reset switch part D5.
Fig. 8 is a cross-sectional diagram taken along D-D' of Fig. 7.
Fig. 9 is a diagram illustrating the capacitor combined pinned photodiode CCPPD and the reset switch part D5 in an embodiment where the pinned photodiode part D3 of the CCPPD is connected to the reset switch part D5.
Fig. 10 is a cross-sectional diagram taken along E-E' of Fig. 9.
Fig. 11 is a cross-sectional diagram taken along F-F' of Fig. 9.
Fig. 12 is a cross-sectional diagram taken along G-G' of Fig. 9. Fig. 13 is a cross-sectional and circuit diagram illustrating an active pixel including the CCPPD and the reset switch RSW of Figs. 7 and 8, a multi-functional switch 24, and a signal amplifier 25.
Fig. 14 is a cross-sectional and circuit diagram illustrating an active pixel including the CCPPD and the reset switch RSW of Figs. 9 through 12, a multi-functional switch 24, and a signal amplifier 25.
Fig. 15 is a diagram illustrating an example of Fig. 13 with the signal amplifier 25 comprising a source follower (SF) 26 and a constant current source 27.
Fig. 16 is a diagram illustrating an example of Fig. 15 wherein a driving voltage VDD of the source follower 26 is used in common as the reset voltage source. Fig. 17 is a diagram illustrating an example of Fig. 14 with the signal amplifier
25 comprising a source follower (SF) 26 and a constant current source 27.
Fig. 18 is a diagram illustrating an example of Fig. 17 wherein a driving voltage VDD of the source follower 26 is used in common as the reset voltage source.
Preferred Embodiments The present invention will be described in detail with reference to the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts.
Fig. 3 is a diagram illustrating a pinned photodiode part D3 and an output node part D4 in a capacitor combined pinned photodiode (CCPPD) according to an embodiment of the present invention.
The capacitor combined pinned photodiode CCPPD includes a pinned photodiode PPD part D3 and an output node part D4. The geometrical shape of the pinned photodiode part D3 and the output node part D4 can be changed. Fig. 4 is a cross-sectional diagram taken along A-A' of Fig. 3, and Fig. 5 is a cross-sectional diagram taken along B-B' of Fig. 3.
The capacitor combined pinned photodiode CCPPD includes a n-type diffusion region 10 and a p+ type diffusion region 11 which are successively formed in a p-type epitaxial layer (or p-type substrate) 9. A p-type well 15 is formed around the periphery of part D3 in the capacitor combined pinned photodiode CCPPD.
Fig. 6 is a cross-sectional diagram taken along C-C of Fig. 3.
The pinned photodiode part D3 includes the n-type diffusion region 10 and the p+ type diffusion region 11 which are successively formed in the p-type epitaxial layer
(or p-type substrate) 9. The output node part D4 comprises a n-type diffusion region 16 formed in the p-type epitaxial layer (or p-type substrate) 9 which is used as a first electrode of a coupling capacitor CC, and an oxide insulating layer 18 as a dielectric layer and a second electrode 19. The n-type diffusion region 16 of the output node part D4 touches the n-type diffusion region 10 of the pinned photodiode part D3. As a result, electrons are allowed to move between the n-type diffusion region 10 and the n-type diffusion region 16. The doping concentration of the n-type diffusion region 16 of the output node part D4 can be the same as or different from that of the n-type diffusion region 10 of the pinned photodiode part D3.
The p-type well 15 is formed around the pinned photodiode part D3 and the output node part D4. The coupling capacitor CC is composed of the n type diffusion region 16 as a first electrode, the oxide insulating layer 18 as a dielectric layer, and the second electrode 19 formed over the oxide insulating layer 18. So, a voltage change of the n-type diffusion region 16 is transmitted to another parts through the coupling capacitor CC.
When signal electrons generated by absorbing light in the pinned photodiode part D3 are accumulated in the n-type diffusion region 10, a part of the signal electrons moves into the n-type diffusion region 16 of the output node part D4, so that a voltage level of the n-type diffusion region 16 is changed. The voltage change of the n-type diffusion region 16 is transmitted to the outside of the output node through the second electrode 19 which is the output terminal of the coupling capacitor CC. That is, when the second electrode 19 of the coupling capacitor CC is connected to the input terminal of the signal amplifier, a voltage proportional to the signal voltage change of the n-type diffusion region 16 is transmitted to the input terminal of the signal amplifier.
The impurity doping concentration of the n-type diffusion region 16 can be lower than that of ohmic contact. So, the dark current in the output node part D4 can be reduced in comparison with the ohmic-contacted diffusion sensing nodes 3 and 12 because physical defects introduced in the sensing nodes 3 and 12 for forming ohmic contact can be reduced. The physical defects of the sensing nodes are main cause of the dark current of the sensing nodes.
In the capacitor combined pinned photodiode CCPPD, the n-type diffusion region 10 of the pinned photodiode part D3 can be fully depleted by reset. The doping concentration of the n-type diffusion region 16 of the output node part D4 can be lower than that for ohmic contacting, thereby reducing the image lag and the reset noise in comparison with a general 3 -transistor pixel having the ohmic-contacted diffusion sensing nodes 3 and 12. Fig. 7 is a diagram illustrating the capacitor combined pinned photodiode
CCPPD and a reset switch part D5 in an embodiment where the output node part D4 of the capacitor combined pinned photodiode CCPPD is connected to the reset switch part D5.
The capacitor combined pinned photodiode CCPPD includes a pinned photodiode PPD part D3 and an output node part D4. A reset switch part D5 is formed to adjoin the output node part D4. The geometrical shape of the pinned photodiode part 3, the output node part D4 and the reset switch part D5 can be changed.
Fig. 8 is a cross-sectional diagram taken along D-D' of Fig. 7.
The pinned photodiode part D3 includes the n-type diffusion region 10 and the p+ type diffusion region 11 which are formed in the p-type epitaxial layer (or p-type substrate) 9. The output node part D4 includes a n-type diffusion region 16 formed in the p-type epitaxial layer (or p-type substrate) 9 which is used as a first electrode of a coupling capacitor CC, an oxide insulating layer 18 as a dielectric layer and a second electrode 19. The n-type diffusion region 16 of the output node part D4 touches the n- type diffusion region 10 of the pinned photodiode part D3. As a result, electrons are allowed to move between the n-type diffusion region 10 and the n-type diffusion region
16.
The p-type well 15 is formed around the pinned photodiode part D3 except a portion contacting with the reset switch part D5. The reset switch part D5 comprises a p-type well 20 formed in the p-type epitaxial layer (or p-type substrate) 9, a n+ type diffusion region 21 used as a reset voltage applying terminal formed in the p-type well 20, and an oxide insulating layer 22 and a gate electrode 23 over a region where a channel is formed between the n-type diffusion region 16 of the output node part D4 and the n+ type diffusion region 21. Fig. 9 is a diagram illustrating the capacitor combined pinned photodiode
CCPPD and the reset switch part D5 in an embodiment where the pinned photodiode part D3 of the capacitor combined pinned photodiode CCPPD is connected to the reset switch part D5.
The capacitor combined pinned photodiode CCPPD includes a pinned photodiode PPD part D3 and an output node part D4. A reset switch part D5 is formed to adjoin the pinned photodiode part D3. The geometrical shape of the pinned photodiode part 3, the output node part D4 and the reset switch part D5 can be changed. Fig. 10 is a cross-sectional diagram taken along E-E1 of Fig. 9. The pinned photodiode part D3 includes the n-type diffusion region 10 and the p+ type diffusion region 11 which are formed in the p-type epitaxial layer (or p-type substrate) 9. The output node part D4 includes a n-type diffusion region 16 formed in the p-type epitaxial layer (or p-type substrate) 9 which is used as a first electrode of a coupling capacitor CC, an oxide insulating layer 18 as a dielectric layer and a second electrode 19. The n-type diffusion region 16 of the output node part D4 touches the n- type diffusion region 10 of the pinned photodiode part D3. As a result, electrons are allowed to move between the n-type diffusion region 10 and the n-type diffusion region 16.
The p-type well 15 is formed around the pinned photodiode part D3 and the output node part D4. Fig. 11 is a cross-sectional diagram taken along F-F' of Fig. 9. The pinned photodiode part D3 includes the n-type diffusion region 10 and the p+ type diffusion region 11 which are formed in the p-type epitaxial layer (or p-type substrate) 9.
The reset switch part D5 comprises a p-type well 20 formed in the p-type epitaxial layer (or p-type substrate) 9, a n+ type diffusion region 21 used as a reset voltage applying terminal formed in the p-type well 20, and an oxide insulating layer 22 and a gate electrode 23 over a region where a channel is formed between the n-type diffusion region 10 of the pinned photodiode part D3 and the n+ type diffusion region 21.
The p-type well 15 is formed around the pinned photodiode part D3 except a part contacting with the reset switch part D5.
Fig. 12 is a cross-sectional diagram taken along G-G' of Fig. 9. Here, the reset switch part D5, the pinned photodiode D3 and the output node part D4 are sequentially connected.
The reset switch part D5 comprises a p-type well 20 formed in the p-type epitaxial layer (or p-type substrate) 9, a n+ type diffusion region 21 used as a reset voltage applying terminal formed in the p-type well 20, and an oxide insulating layer 22 and a gate electrode 23 over a region where a channel is formed between the n-type diffusion region 10 of the pinned photodiode part D3 and the n+ type diffusion region 21.
The pinned photodiode part D3 includes the n-type diffusion region 10 and the p+ type diffusion region 11 which are formed in the p-type epitaxial layer (or p-type substrate) 9. The output node part D4 includes an n-type diffusion region 16 formed in the p-type epitaxial layer (or p-type substrate) 9 which is used as a first electrode of a coupling capacitor CC, an oxide insulating layer 18 as a dielectric layer and a second electrode 19. The n-type diffusion region 16 of the output node part D4 touches the n- type diffusion region 10 of the pinned photodiode part D3. As a result, electrons are allowed to move between the n-type diffusion region 10 and the n-type diffusion region 16.
The p-type well 15 is formed around the capacitor combined pinned photodiode CCPPD part D3 and the output node part D4 except a part contacting with the reset switch part D5.
Fig. 13 is a cross-sectional and circuit diagram illustrating an active pixel including the capacitor combined pinned photodiode CCPPD and the reset switch RSW of Figs. 7 and 8, a multi-functional switch 24 and a signal amplifier 25. The capacitor combined pinned photodiode CCPPD and the reset switch part D5 are shown in the cross- sectional diagram, and the multi-functional switch 24 and the signal amplifier 25 are shown in the circuit diagram.
In the active pixel of Fig. 13, the reset switch RSW is connected to the output node part D4 of the capacitor combined pinned photodiode CCPPD.
The capacitor combined pinned photodiode CCPPD absorbs light radiated from an object to generate signal electrons. The signal electrons are distributed in the n-type diffusion region 10 of the pinned photodiode part D3 and the n-type diffusion region 16 of the output node part D4. The coupling capacitor CC transmits the voltage change of the n-type diffusion region 16 to the input terminal of the signal amplifier 25. The voltage change occurs when the signal electrons flow into or out from the n-type diffusion region 16 of the output node part D4. The input terminal of the signal amplifier 25 is connected to the second electrode 19 which is the output terminal of the coupling capacitor CC.
The reset switch RSW discharges the electrons stored in the n-type diffusion regions 10 and 16 of the capacitor combined pinned photodiode CCPPD through the n+ diffusion region 21 connected to the reset voltage source VR, to reset a voltage of the n- type diffusion regions 10 and 16 of the capacitor combined pinned photodiode CCPPD into an initial value.
The multi-functional switch 24 has the following functions in the operation of the above-described pixel.
The multi-functional switch 24 provides a discharging path to a floating structure when the input terminal of the signal amplifier 25 is floating. So, the multi-functional switch 24 prevents the related devices such as the signal amplifier and coupling capacitor from malfunctioning and being damaged. The multi-functional switch 24 sets the initial voltage of the input terminal of the signal amplifier 25 and the second electrode 19 of the coupling capacitor CC into a specific value with the variable voltage source VC. The output terminal of the signal amplifier 25 is directly connected to a signal line of a pixel array, or is connected to the signal line through an addressing switch for connecting/disconnecting an output signal of the signal amplifier 25. When the output terminal of the signal amplifier 25 is directly connected to the signal line of the pixel array without the addressing switch, the signal amplifier 25 is required to be controlled on/off states.
There are two methods for the operation of the unit pixel of Fig. 13. In a first method, a voltage of the variable voltage source VR is set to a first voltage VL (e.g., OV) and the multi-functional switch 24 is turned on so that a voltage of the second electrode 19 of the coupling capacitor CC is fixed at the first voltage VL. The reset switch RSW is turned on to reset the n-type diffusion regions 10 and 16 of the capacitor combined pinned photodiode CCPPD. The voltage of the variable voltage source VC is set to a second voltage VH higher than the first voltage VL. The second voltage VH is set to a sufficiently higher value (e.g., driving voltage VDD of the signal amplifier 25) in consideration of a dropping range of the signal voltage due to light. The reset switch RSW and the multi-functional switch 24 are turned off to finish the reset operation of the capacitor combined pinned photodiode CCPPD.
As the signal electrons corresponding to incident light are accumulated in the n- type diffusion regions 10 and 16 of the capacitor combined pinned photodiode CCPPD after resetting of the capacitor combined pinned photodiode CCPPD, the voltage of the n- type diffusion region 16 falls down and the voltage change is transmitted to the signal amplifier 25 through the second electrode 19 which is the output terminal of the coupling capacitor CC. That is, the voltage of the input terminal of the signal amplifier 25 falls down from the initial value VH. The change of the signal voltage of the input terminal of the signal amplifier 25 gives information on the amount of the signal electrons, that is, on the amount of the incident light into the pixel.
In a second method, the voltage of the variable voltage source VC is set to the first voltage VL (e.g., OV), and the multi-functional switch 24 is turned on to fix the voltage of the second electrode 19 of the coupling capacitor CC at the first voltage VL. The reset switch RSW is turned on to reset the n-type diffusion regions 10 and 16 of the capacitor combined pinned photodiode CCPPD. The reset switch RSW is turned off to finish the reset operation of the capacitor combined pinned photodiode CCPPD. Here, the multi-functional switch 24 is kept on or turned off. Both of the ways are possible
The signal electrons are accumulated in the n-type diffusion regions 10 and 16 of the capacitor combined pinned photodiode CCPPD by the incident light, and the amount of the accumulated signal electrons is read by the following operation.
The value of the variable voltage source VC is set to a voltage VLl larger than an input threshold voltage VT of the signal amplifier 25. The multi-functional switch 24 is turned on, if it was turned off before, to set the initial value of the second electrode of the coupling capacitor CC and the input terminal of the signal amplifier 25 to the voltage VLl. The multi-functional switch 24 is turned off and the reset switch RSW is turned on to remove the signal electrons from the n-type diffusion regions 10 and 16 of the capacitor combined pinned photodiode CCPPD. As a result, the voltage of the n-type diffusion region 16 of the capacitor combined pinned photodiode CCPPD rises.
The voltage change is transmitted to the input terminal of the signal amplifier 25 through the second electrode 19 of the coupling capacitor CC. That is, when the signal electrons accumulated in the capacitor combined pinned photodiode CCPPD are reset, the voltage of the input terminal of the signal amplifier 25 rises from the initial value VLl . The amount of the signal electrons, that is, the amount of the incident light can be evaluated from the rise of the voltage. The second operation method is roughly opposite in concept to that of a general
4-transistor pixel.
Fig. 14 is a cross-sectional and circuit diagram illustrating an active pixel including the capacitor combined pinned photodiode CCPPD and the reset switch RSW of Figs. 9 through 12, a multi-functional switch 24 and a signal amplifier 25. The capacitor combined pinned photodiode CCPPD and the reset switch part D5 are shown in the cross-sectional diagram, and the multi-functional switch 24 and the signal amplifier 25 are shown in the circuit diagram.
The operation of Fig. 14 is the same as the operation of Fig. 13.
Fig. 15 is a diagram illustrating an example of Fig. 13 in which the signal amplifier 25 is composed of a source follower (SF) 26 and a constant current source 27.
Fig. 16 is a diagram illustrating an example of Fig. 15 wherein a driving voltage VDD of the source follower 26 is used in common as a reset voltage source VR.
The operations of Figs. 15 and 16 are as follows.
The voltage of the variable voltage source VC is set to the first voltage VL (e.g., OV), and the multi-functional switch 24 is turned on to fix the voltage of the second electrode 19 of the coupling capacitor CC at the first voltage VL. At the time, the source follower active transistor 26 is automatically turned off. The reset switch RSW is turned on to reset the n-type diffusion regions 10 and 16 of the capacitor combined pinned photodiode CCPPD. The reset switch RSW is turned off to finish the reset operation of the capacitor combined pinned photodiode CCPPD. Here, the multi-functional switch 24 is kept on or turned off. Both of the ways are possible.
The signal electrons are accumulated in the n-type diffusion regions 10 and 16 of the capacitor combined pinned photodiode CCPPD by the incident light signal. The amount of the accumulated signal electrons is read by the following operation. The value of the variable voltage source VC is set to a voltage VLl larger than an input threshold voltage VT of the source follower active transistor 26. The multifunctional switch 24 is turned on, if it was turned off before, to set the initial value of the second electrode 19 of the coupling capacitor CC and a gate of the source follower active transistor 26 to the voltage VLl. The multi-functional switch 24 is turned off and the reset switch RSW is turned on to remove the signal electrons from the n-type diffusion regions 10 and 16 of the capacitor combined pinned photodiode CCPPD. As a result, the voltage of the n-type diffusion region 16 of the output node part D4 rises. The voltage change is transmitted to the gate of the source follower active transistor 26 through the second electrode 19 which is an output terminal of the coupling capacitor CC. That is, when the signal electrons accumulated in the capacitor combined pinned photodiode CCPPD are reset, the voltage of the gate of the source follower active transistor 26 rises from the initial value VLl . The amount of the signal electrons, that is, the amount of the incident lights can be evaluated from the voltage rising value.
In the above-described operation method of the pixel, the on/off states of the source follower active transistor 26 are controlled by the voltage setting value of the gate terminal so that an addressing switch for selectively transmitting an output voltage to the signal line of the pixel array is not required.
The multi-functional switch 24 has the following functions in the pixel. The multi-functional switch 24 provides a path for discharging net charge flowed into the electrically floating structure at the connecting node of the gate of the source follower 26 and second electrode 19 of the coupling capacitor CC.
As a result, the multi-functional switch 24 prevents the malfunction or damages of the coupling capacitor CC and the source follower active transistor 26. The multi-functional switch 24 sets the initial voltage of the gate of the source follower active transistor 26 and the second electrode 19 of the coupling capacitor CC at a specific value with the variable voltage source VC.
Fig. 17 is a diagram illustrating an example of Fig. 14 with the signal amplifier 25 which is composed of a source follower (SF) 26 and a constant current source 27.
Fig. 18 is a diagram illustrating an example of Fig. 17 wherein a driving voltage VDD of the source follower 26is used in common as a reset voltage source VR. The operation of Figs. 17 and 18 is the same as that of Figs. 15 and 16.
Industrial Applicability
As described above, the CMOS image sensor according to an embodiment of the present invention has the following effects.
The signal voltage is transmitted to the signal amplifier with the coupling capacitor instead of the ohmic-contacted diffusion sensing node in order to reduce the dark current generated from the ohmic contact.
The n-type diffusion regions 10 of the pinned photodiode part D3 and 16 of the output part D4are fully depleted. The impurity doping concentration of the n-type diffusion region 16 of the output node part D4 is lower than that of the conventional ohmic-contacted diffusion sensing node. So, a reset noise and an image lag can be reduced.
The shared structure can be embodied by using the coupling capacitor instead of the ohmic-contacted diffusion sensing node.
While the invention is susceptible to various modifications and alternative forms, specific embodiments have been shown by way of example in the drawings and described in detail herein. However, it should be understood that the invention is not limited to the particular forms disclosed. Rather, the invention covers all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined in the appended claims.

Claims

What is Claimed is:
1. A pinned photodiode comprising: an epitaxial layer having a first conductive type; a first diffusion region having a second conductive type formed in the epitaxial layer; a second diffusion region having a first conductive type formed over the first diffusion region; a third diffusion region having a second conductive type formed in the epitaxial layer and electrically connected to the first diffusion region; and a coupling capacitor connected to the third diffusion region and configured to transmit outside a voltage change of the third diffusion region .
2. The pinned photodiode according to claim 1, wherein the second conductive type has an opposite polarity to that of the first conductive type.
3. The pinned photodiode according to claim 1, wherein the first diffusion region contacts physically with the third diffusion region.
4. The pinned photodiode according to claim 1, wherein the third diffusion region has the same impurity doping concentration as that of the first diffusion region.
5. The pinned photodiode according to claim 1, wherein a fourth diffusion region having a second conductive type contacts physically between the first diffusion region and the third diffusion region.
6. The pinned photodiode according to claim 1, wherein the coupling capacitor comprises: a first electrode formed with the third diffusion region; an insulating layer formed over the third diffusion region; and a second electrode formed over the insulating layer.
7. The pinned photodiode according to claim 6, wherein the second electrode of the coupling capacitor is formed of an opaque material and serves as an optical blocking mask for blocking incident light into the third diffusion region.
8. The pinned photodiode according to claim 1, wherein the second diffusion region is electrically connected to a ground level or a negative voltage source.
9. An active pixel comprising: a photodiode which comprises an epitaxial layer having a first conductive type; a first diffusion region having a second conductive type formed in the epitaxial layer; a second diffusion region having a first conductive type formed over the first diffusion region; a third diffusion region having a second conductive type formed in the epitaxial layer and electrically connected to the first diffusion region; and a coupling capacitor connected to the third diffusion region and configured to transmit outside a voltage change of the third diffusion region; a reset switch configured to reset the first diffusion region and the third diffusion region of the photodiode with a reset voltage source; a multi-functional switch, connected between a variable voltage source and an output terminal of the coupling capacitor, configured to apply a voltage of the variable voltage source to the output terminal; and a signal amplifier configured to transmit a voltage signal corresponding to the voltage change transmitted by the coupling capacitor to a signal line of a pixel array.
10. The active pixel according to claim 9, wherein the second conductive type has an opposite polarity to that of the first conductive type.
11. The active pixel according to claim 9, wherein the coupling capacitor comprises: a first electrode formed with the third diffusion region; an insulating layer formed over the third diffusion region; and a second electrode formed over the insulating layer.
12. The active pixel according to claim 9, wherein the first diffusion region is fully depleted in the reset operation.
13. The active pixel according to claim 9, wherein the reset switch is connected between the first diffusion region and the reset voltage source.
14. The active pixel according to claim 9, wherein the reset switch is connected between the third diffusion region and the reset voltage source.
15. The active pixel according to claim 9, wherein the reset switch includes a Field Effect Transistor (FET) or a transfer gate structure.
16. The active pixel according to claim 9, wherein the multi-functional switch forms a discharging path in order to prevent the output terminal of the coupling capacitor and the input terminal of the signal amplifier from being electrically a floating structure.
17. The active pixel according to claim 9, wherein the multi-functional switch sets voltages of the output terminal of the coupling capacitor and the input terminal of the signal amplifier to be at predetermined values respectively.
18. The active pixel according to claim 9, further comprising a switch configured to connect the output terminal of the signal amplifier to the signal line of the pixel array.
19. The active pixel according to claim 9, wherein the signal amplifier is a source follower structured amplifier.
20. The active pixel according to claim 9 or 19, wherein the reset voltage source is a driving voltage of the signal amplifier.
21. The active pixel according to claim 9, wherein two or more pixels share the multi-functional switch and the signal amplifier.
22. A method for sensing a signal of an active pixel, which comprises: a photodiode comprising an epitaxial layer having a first conductive type, a first diffusion region having a second conductive type formed in the epitaxial layer, a second diffusion region having a first conductive type formed over the first diffusion region, a third diffusion region having a second conductive type formed in the epitaxial layer and electrically connected to the first diffusion region, and a coupling capacitor connected to the third diffusion region and configured to transmit outside a voltage change of the third diffusion region; a reset switch configured to reset the first diffusion region and the third diffusion region of the photodiode with a reset voltage source; a multi-functional switch, connected between a variable voltage source and an output terminal of the coupling capacitor, configured to apply a voltage of the variable voltage source to the output terminal; and a signal amplifier configured to transmit a voltage signal corresponding to the voltage change transmitted by the coupling capacitor to a signal line of a pixel array, the method comprising the steps of: fixing the output terminal of the coupling capacitor at a first voltage level with the variable voltage source when the multi-functional switch is turned on; resetting the first diffusion region and the third diffusion region by turning on the reset switch; setting a voltage of the input terminal of the signal amplifier at a second voltage higher than the first voltage with the variable voltage source to read a value of the output voltage of the signal amplifier; storing electrons generated by absorbing light in the first diffusion region and the third diffusion region after the reset switch and the multi-functional switch are turned off; and sensing a change of the output voltage of the signal amplifier.
23. A method for sensing a signal of an active pixel, which comprises: a photodiode comprising an epitaxial layer having a first conductive type, a first diffusion region having a second conductive type formed in the epitaxial layer, a second diffusion region having a first conductive type formed over the first diffusion region, a third diffusion region having a second conductive type formed in the epitaxial layer and electrically connected to the first diffusion region, and a coupling capacitor connected to the third diffusion region and configured to transmit outside a voltage change of the third diffusion region externally; a reset switch configured to reset the first diffusion region and the third diffusion region of the photodiode with a reset voltage source; a multi-functional switch, connected between a variable voltage source and an output terminal of the coupling capacitor, configured to apply a voltage of the variable voltage source to the output terminal; and a signal amplifier configured to transmit a voltage signal corresponding to the voltage change transmitted by the coupling capacitor to a signal line of a pixel array, the method comprising the steps of: fixing the output terminal of the coupling capacitor at a first voltage level with the variable voltage when the multi-functional switch is turned on; resetting the first diffusion region and the third diffusion region by turning on the reset switch; storing electrons generated by absorbing light in the first diffusion region and the third diffusion region after the reset switch and the multi-functional switch are turned off; setting a voltage of the input terminal of the signal amplifier at a second voltage higher than an input threshold voltage of the signal amplifier with the variable voltage source after turning on the multi-functional switch, and reading an output signal of the signal amplifier after the multi-functional switch is turned off; removing the electrons stored in the first diffusion region and the third diffusion region by turning on the reset switch; and sensing a change of the output voltage of the signal amplifier.
24. The method according to claim 24, wherein the storing-the-electrons step is performed without turning off the multi-functional switch.
PCT/KR2006/004177 2006-05-25 2006-10-16 Active pixel having pinned photodiode with coupling capacitor and method for sensing a signal thereof WO2007139257A1 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10236400B2 (en) 2016-02-01 2019-03-19 Heptagon Micro Optics Pte. Ltd. Quantum dot film based demodulation structures
CN110085705A (en) * 2019-04-30 2019-08-02 德淮半导体有限公司 The forming method of semiconductor devices

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100790584B1 (en) 2006-11-30 2008-01-03 (주) 픽셀플러스 Image sensor having a partially fully depletion floating diffusion node

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5903021A (en) * 1997-01-17 1999-05-11 Eastman Kodak Company Partially pinned photodiode for solid state image sensors
US6744084B2 (en) * 2002-08-29 2004-06-01 Micro Technology, Inc. Two-transistor pixel with buried reset channel and method of formation
WO2005041304A2 (en) * 2003-09-05 2005-05-06 Micron Technology, Inc. Image sensor having pinned floating diffusion diode

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20050018512A (en) * 2003-08-14 2005-02-23 삼성전자주식회사 CMOS image sensor and method for fabricating same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5903021A (en) * 1997-01-17 1999-05-11 Eastman Kodak Company Partially pinned photodiode for solid state image sensors
US6744084B2 (en) * 2002-08-29 2004-06-01 Micro Technology, Inc. Two-transistor pixel with buried reset channel and method of formation
WO2005041304A2 (en) * 2003-09-05 2005-05-06 Micron Technology, Inc. Image sensor having pinned floating diffusion diode

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10236400B2 (en) 2016-02-01 2019-03-19 Heptagon Micro Optics Pte. Ltd. Quantum dot film based demodulation structures
CN110085705A (en) * 2019-04-30 2019-08-02 德淮半导体有限公司 The forming method of semiconductor devices

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