CN110061940A - A kind of equalizer system - Google Patents
A kind of equalizer system Download PDFInfo
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- CN110061940A CN110061940A CN201810643776.3A CN201810643776A CN110061940A CN 110061940 A CN110061940 A CN 110061940A CN 201810643776 A CN201810643776 A CN 201810643776A CN 110061940 A CN110061940 A CN 110061940A
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L25/03159—Arrangements for removing intersymbol interference operating in the frequency domain
Abstract
The invention belongs to high-speed communication field of circuit technology, provide a kind of equalizer system；The equalizer unit for including: EQ Gain controller and being connect with the EQ Gain controller；The EQ Gain controller is for generating multi-way control signals；The equalizer unit includes successively cascade: equalizer and N number of gain amplifier, and the equalizer unit is used to keep the DC current gain of the equalizer system and frequency peak all constant according to the multi-way control signals；The N is the positive integer more than or equal to 1；Effectively the frequency of signal can be compensated through the invention, the ability of equalization of circuit system can not be improved to solve balanced device in traditional technology, and then lead to the stability reduction and the higher problem of the bit error rate of signal of system.
Description
Technical field
The invention belongs to high-speed communication field of circuit technology more particularly to a kind of equalizer systems.
Background technique
In traditional integrated circuit, balanced device being capable of the various frequency content electric signal amplification quantities of well-balanced adjustment as one kind
Electronic equipment, balanced device has been widely used in various telecommunication circuits；For example, in telecommunication circuit, telecommunication circuit
The characteristic of low-pass filtering is presented in channel, and the high frequency section in input signal will be filtered out, if can not compensate due to low-pass filtering
Caused by frequency loss, then the signal quality that telecommunication circuit is exported can be detracted seriously, the bit error rate of signal be will increase；
Therefore the high fdrequency component for needing to be filtered out in thermal compensation signal by balanced device in telecommunication circuit, and then guarantee telecommunication circuit output
Signal have enough bandwidth, improve the quality of output signal.
However, balanced device is increased by changing the resistance value of resistance or the capacitance of capacitor etc. in traditional balanced device
The ability of equalization of communication circuitry, but when changing with the resistance value of the resistance in balanced device or the capacitance of capacitor,
The zero point of circuit system and the position of pole can also change, therefore can not effective compensation by the balanced device in traditional technology
The frequency component being filtered out in signal, reduces the ability of equalization of circuit system, and the stability of circuit system reduces.
Summary of the invention
The present invention provides a kind of equalizer system, it is intended to solve the resistance value in traditional technology by changing resistance in balanced device
Or the problem that the capacitance of capacitor can not improve the ability of equalization of circuit system, and then cause circuit system stability lower.
The present invention provides a kind of equalizer system, comprising: EQ Gain controller and with the EQ Gain controller connect
The equalizer unit connect；
The EQ Gain controller is for generating multi-way control signals；
The equalizer unit includes successively cascade: equalizer and N number of gain amplifier, the equalizer unit
For keeping the DC current gain of the equalizer system and frequency peak all constant according to the multi-way control signals；
The N is the positive integer more than or equal to 1.
In above-mentioned equalizer system, multi-way control signals are produced by EQ Gain controller, work as equalizer unit
When receiving multi-way control signals, equalizer unit makes the DC current gain and frequency peak of equalizer system according to multi-way control signals
All keep constant；Therefore when carrying out frequency compensation to signal by the equalizer system, the zero point and pole of equalizer system
Capital holding position is constant, and then can ensure that the DC current gain of equalizer system and frequency peak point all remain unchanged, effectively
The ability of equalization of equalizer system and the stability of system are improved, middle equalizer system can effectively reduce signal and exist through the invention
The bit error rate in transmission process；The ability of equalization of circuit system can not be improved to solve traditional technology by balanced device, and
The lower problem of the stability of its system.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for
For those skilled in the art, without creative efforts, it can also be obtained according to these attached drawings other attached
Figure.
Fig. 1 is a kind of function structure chart of equalizer system provided in an embodiment of the present invention；
Fig. 2 is a kind of circuit structure diagram of combinational logic circuit provided in an embodiment of the present invention；
Fig. 3 is a kind of function structure chart of equalizer provided in an embodiment of the present invention；
Fig. 4 is the circuit structure diagram that a kind of resistor network provided in an embodiment of the present invention adjusts unit；
Fig. 5 is the circuit structure diagram that a kind of capacitance network provided in an embodiment of the present invention adjusts unit；
Fig. 6 is the circuit structure diagram that a kind of inductance network provided in an embodiment of the present invention adjusts unit；
Fig. 7 is a kind of circuit structure diagram of equalizer provided in an embodiment of the present invention；
Fig. 8 is the circuit structure diagram of another equalizer provided in an embodiment of the present invention；
Fig. 9 is a kind of function structure chart of gain amplifier provided in an embodiment of the present invention；
Figure 10 is a kind of circuit structure diagram of gain amplifier provided in an embodiment of the present invention；
Figure 11 is the circuit structure diagram of another gain amplifier provided in an embodiment of the present invention；
Figure 12 is a kind of frequency response chart of equalizer system provided in an embodiment of the present invention.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, with reference to the accompanying drawings and embodiments, right
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.
The modular structure that Fig. 1 shows equalizer system 10 provided in an embodiment of the present invention is only shown for ease of description
Part related to the embodiment of the present invention, details are as follows:
As shown in Figure 1, equalizer system 10 includes EQ Gain controller 101 and equalizer unit 102, wherein balanced increase
Beneficial controller 101 is connect with equalizer unit 102, and EQ Gain controller 101 generates multi-way control signals D, wherein balanced increase
Beneficial controller 101 has the function of handling to signal and multi-way control signals D is transmitted to by conversion, EQ Gain controller 101
Equalizer unit 102, equalizer unit 102 make the DC current gain and frequency peak of equalizer system according to multi-way control signals D
It is all constant；Specifically, when traditional communication circuitry accesses impulse response, the DC current gain and frequency peak of communication circuitry
Value will appear certain fluctuation；However in equalizer system 10 in embodiments of the present invention, it can be made by equalizer unit 102
The DC current gain and frequency peak of equalizer system 10 are all constant, and then improve compensation of the equalizer system 10 to signal frequency
Ability, circuit system have higher stability.
Specifically, as shown in Figure 1, equalizer unit 102 includes successively cascade: equalizer 103 and N number of gain are put
Big device 104, N are the positive integer more than or equal to 1；Wherein N is to be set in advance, and those skilled in the art can arbitrarily adjust N
Value so that equalizer system 10 have optimal frequency compensation ability.
As an alternative embodiment, EQ Gain controller 101 includes combinational logic circuit, wherein combinational logic
Circuit accesses driving signal, and combinational logic circuit carries out logical operation to driving signal and logical combination obtains multi-channel control letter
Number；Optionally, input signal of the driving signal as EQ Gain controller 101, driving signal can be by external drives
Circuit generates, and driving signal is also possible to the feedback signal of equalizer system 10 itself, does not limit this；Preferably, it drives
Signal is the feedback signal of equalizer system 10 itself, when driving signal is the feedback signal of equalizer system 10, at this point,
Weighing apparatus system 10 is an automatic feedback system, and for driving signal as feedback signal, the stability of equalizer system 10 is stronger.
Specifically, combinational logic circuit includes multiple logic gates and multiple reversers, optionally, the logic gate includes:
With door or door, XOR gate, same or door and NAND gate etc., logic is carried out to multi-channel drive signal by the combinational logic circuit
Multi-way control signals are produced after operation and logical combination；Illustratively, Fig. 2 shows combinations provided in an embodiment of the present invention
The circuit structure of logic circuit 20, in Fig. 2, N=6, combinational logic circuit 20 include with door NAND and reverser INV, work as group
Combinational logic circuit 20 accesses 7 tunnel driving signal H1~H7, by multiple and door NAND and reverser INV to 7 tunnel driving signal H1
~H7 exports 7 tunnels control signal D1~D7 after carrying out multiple logical operation and multiple logical combination, so that equalizer unit 102 can
Signal D1~D7, which is controlled, according to this 7 tunnel realizes corresponding circuit function.
It should be noted that the circuit structure of combinational logic circuit shown in Fig. 2 is only EQ Gain in the present invention
One specific embodiment of controller 101, does not constitute the technology limiting to EQ Gain controller 101 in the present invention；Ability
Field technique personnel can adjust according to the actual needs combinational logic circuit circuit structure or using other circuit structures come
Realize the circuit function of EQ Gain controller 101；For example those skilled in the art can be patrolled using the timing in traditional technology
Circuit is collected to realize the EQ Gain controller 101 in the present invention, as long as the particular circuit configurations that those skilled in the art use
With the signal processing function having the same of EQ Gain controller 101 in the present invention.
As an alternative embodiment, Fig. 3 shows the module of equalizer 103 provided in an embodiment of the present invention
Structure, equalizer 103 include the first adjustment module 1031, and the first adjustment module 1031 connects with EQ Gain controller 101
It connects, EQ Gain controller 101 is transmitted to the first adjustment module 1031 for signal D is controlled, and the first adjustment module 1031 is according to control
Signal D processed adjusts the zero pole point position of equalizer 103, to carry out frequency compensation mistake to signal in equalizer system 10
Cheng Zhong changes the zero pole point position of equalizer 103 by the first adjustment module 1031 in time, and then makes equalizer system 10
Frequency peak and DC current gain keep constant, enhance the embodiment of the present invention in equalizer system 10 the ability of equalization.
Specifically, the first adjustment module 103 includes: that at least one resistor network adjusts unit 1032, at least one capacitor
Network adjustment unit 1033 and at least one inductance network adjust unit 1034；By combining resistor network to adjust unit
1032, capacitance network adjusts unit 1033 and inductance network adjusts unit 1034 and adjusts the zero of equalizer 103 in real time
Pole location, and then make equalizer system 10 that there is bigger frequency equilibrium compensation range to signal.
As an alternative embodiment, Fig. 4, which shows resistor network provided in an embodiment of the present invention, adjusts unit
1032 circuit structure, as shown in figure 4, resistor network adjusts the resistor network controlling brancher that unit 1032 includes multiple parallel connections
401；Wherein, resistor network controlling brancher 401 includes at least one CMOS tube and at least one resistance, resistor network controlling brancher
401 change the equivalent resistance that resistor network adjusts unit 1032 according to control signal D；Specifically, the grid access one of CMOS tube
Road controls signal, and CMOS tube is made to be connected or turn off by incoming control signal, adjusts unit 1032 to change resistor network
First end A and second end B between equivalent resistance, pass through resistor network and adjust unit 1032 and adjust equalizer 103
Zero pole point position；Optionally, as described in Figure 4, a variety of circuit structure forms can be used in resistor network controlling brancher 401；In Fig. 4
Resistor network controlling brancher 401 (a) for, resistor network controlling brancher 401 (a) includes NMOS tube NMOS1, NMOS tube
NMOS2, resistance R1, resistance R2 and resistance R3, wherein the first end of the source electrode of NMOS tube NMOS1 and resistance R1 are connected to resistance altogether
The drain electrode of the first end A of network adjustment unit 1032, NMOS tube NMOS1 and the second end of resistance R1 are connected to the first of resistance R2 altogether
End, the drain electrode of NMOS tube NMOS2 and the first end of resistance R3 are connected to the second end of resistance R2 altogether, the source electrode of NMOS tube NMOS2 and
The second end of resistance R3 is connected to the second end B that resistor network adjusts unit 1032 altogether, wherein the grid and NMOS of NMOS tube NMOS2
The grid of pipe NMOS2 accesses control signal D1 all the way jointly, and then controls NMOS tube by the low and high level of control signal D1
The conducting or shutdown of NMOS1 and NMOS tube NMOS2；Specifically, when control signal D1 be high level when, NMOS tube NMOS1 and
NMOS tube NMOS2 is simultaneously turned on, and is serially connected between the source electrode and drain electrode of NMOS tube NMOS1 due to resistance R1, and resistance R3 is serially connected in
Between the source electrode and drain electrode of NMOS tube NMOS2, at this point, resistance R1 and resistance R3 are short-circuited, and then resistor network controlling brancher 401
(a) equivalent resistance at both ends is the resistance value of resistance R2；If control signal D1 is low level, NMOS tube NMOS1 and NMOS tube NMOS2
It simultaneously switches off, resistor network controlling brancher 401 (a) includes being connected in series at this time: resistance R1, resistance R2 and resistance R3, that
The equivalent resistance at resistor network controlling brancher 401 (a) both ends is are as follows: this three's amplitude of resistance R1, resistance R2 and resistance R3
The sum of；Conducting or the shutdown shape of NMOS tube NMOS1 and NMOS tube NMOS2 are controlled by controlling the level state of signal D1
State, and then determine whether resistance R1 and resistance R3 is concatenated into resistor network controlling brancher 401 (a)；Therefore resistance network control
Branch 401 (a) changes equivalent between the first end A and second end B of resistor network adjusting unit 1032 according to control signal D1
Resistance.
According to discussed above, when the access of the grid of the CMOS tube in resistor network controlling brancher 401 controls signal all the way,
By the conducting or shutdown between the i.e. controllable CMOS tube drain electrode of control signal and source electrode, and then changes resistor network and adjust list
Equivalent resistance in member 1032；It is understood that it includes multiple that resistor network, which adjusts unit 1032, in embodiments of the present invention
Resistor network controlling brancher 401 in parallel, and a variety of circuit structures (packet of resistor network controlling brancher 401 is shown in Fig. 4
Include resistor network controlling brancher 401 (a)~401 (i)), but the circuit structure of resistor network controlling brancher 401 not only office
It is limited to circuit structure (including resistor network controlling brancher 401 (a)~401 of resistor network controlling brancher shown in Fig. 4 401
(i)), other types of circuit structure can also be used to implement the resistor network control in the embodiment of the present invention in those skilled in the art
Branch 401 processed；Therefore in embodiments of the present invention, pass through the i.e. changeable resistor network tune of multiple resistor network controlling branchers 401
The equivalent resistance in unit 1032 is saved, and then adjusts the zero pole point position of equalizer 103.
As an alternative embodiment, Fig. 5, which shows capacitance network provided in an embodiment of the present invention, adjusts unit
1033 circuit structure, as shown in figure 5, capacitance network adjusts the capacitance network controlling brancher that unit 1033 includes multiple parallel connections
501, wherein capacitance network controlling brancher 501 includes at least one CMOS tube and at least one capacitor, in each capacitance network
In controlling brancher 501, signal is controlled by the grid access of CMOS tube all the way, leading for CMOS tube is controlled by the control signal
Logical or shutdown, and then change the equivalent capacity that capacitance network adjusts unit 1033；As shown in figure 5, capacitance network controlling brancher
501, which are connected to capacitance network, is adjusted between the first end A of unit 1033 and the first end B of capacitance network adjusting unit 1033,
It include CMOS tube and capacitor in each capacitance network controlling brancher 501；It is with the capacitance network controlling brancher 501 (a) in Fig. 5
Example, capacitance network controlling brancher 501 (a) includes: NMOS tube NMOS11, NMOS tube NMOS12, capacitor C1, capacitor C2 and capacitor
C3；Wherein the first end of the source electrode of NMOS tube NMOS11 and capacitor C1 are connected to the first end A that capacitance network adjusts unit 1033 altogether,
The drain electrode of NMOS tube NMOS11 and the second end of capacitor C1 are connected to the first end of capacitor C2, the drain electrode of NMOS tube NMOS12 and electricity altogether
The first end for holding C3 is connected to the second end of capacitor C2 altogether, and the source electrode of NMOS tube NMOS12 and the second end of capacitor C3 are connected to capacitor altogether
The grid of the second end B of network adjustment unit 1033, NMOS tube NMOS11 and the grid of NMOS tube NMOS12 access all the way jointly
Signal D1 is controlled, the low and high level state by controlling signal D1 is leading for controllable NMOS tube NMOS11 and NMOS tube NMOS12
Logical or shutdown；Specifically, be connected between the drain electrode and source electrode of NMOS tube NMOS11 when controlling signal D1 is high level,
It is connected between the drain electrode and source electrode of NMOS tube NMOS12, then the capacitor C1 being serially connected between the drain electrode and source electrode of NMOS tube NMOS11
It is short-circuited, the capacitor C3 being serially connected between the drain electrode and source electrode of NMOS tube NMOS12 is short-circuited, at this time capacitance network controlling brancher
501 (a) equivalent capacity is the capacitance of capacitor C2；When control signal D1 be low level when, the drain electrode of NMOS tube NMOS11 with
Source electrode it is separated, the drain electrode of NMOS tube NMOS12 is separated with source electrode, and capacitance network controlling brancher 501 (a) includes at this time
Be sequentially connected in series: capacitor C1, capacitor C2 and capacitor C3, the equivalent resistance of capacitance network controlling brancher 501 (a) are equal to:
The sum of the capacitance of capacitor C1, the capacitance of capacitor C2 and the capacitance of capacitor C3 this three；Therefore by changing control signal D1's
The equivalent capacity between the first end A and second end B of capacitance network adjusting unit 1033 can be adjusted in level state.
Capacitance network as shown in Figure 5 adjusts the circuit structure of unit 1033, and it includes more that capacitance network, which adjusts unit 1033,
The capacitance network controlling brancher 501 of a parallel connection, it should be noted that the capacitance network controlling brancher 501 in the embodiment of the present invention
Circuit structure be not intended to be limited to capacitance network controlling brancher 501 (a) shown in Fig. 5~501 (i), art technology
Other circuit structures can also be used to implement the capacitance network controlling brancher 501 in the embodiment of the present invention, such as ability in personnel
The CMOS tube of capacitance network controlling brancher 501 and the connection structure of capacitor, novel to form in field technique personnel adjustable figure 5
Capacitance network adjusts unit 1033, to adjust unit by the i.e. changeable capacitance network of the level state for changing control signal D
Equivalent capacity in 1033.
As an alternative embodiment, Fig. 6, which shows inductance network provided in an embodiment of the present invention, adjusts unit
1034 circuit structure, as shown in fig. 6, inductance network adjusts the inductance network controlling brancher that unit 1034 includes multiple parallel connections
601, wherein inductance network controlling brancher 601 includes at least one CMOS tube and at least one inductance, inductance network controlling brancher
601, which are serially connected in inductance network, is adjusted between the first end A of unit 1034 and the second end B of inductance network adjusting unit 1034, electricity
Feel network-control branch 601 and the equivalent inductance that inductance network adjusts unit 1034 is changed according to control signal；Due in inductance net
In network controlling brancher 601, the access of the grid of CMOS tube controls signal all the way, by the control signal can make CMOS tube be connected or
Person's shutdown, and then change the equivalent inductance that inductance network adjusts unit 1034；Specifically, with inductance network controlling brancher in Fig. 6
For 601 (a), wherein inductance network controlling brancher 601 (a) includes: NMOS tube NMOS20, NMOS tube NMOS21, inductance L1, electricity
Feel L2 and inductance L3, the source electrode of NMOS tube NMOS20 and the first end of inductance L1 are connected to inductance network altogether and adjust unit 1034
The drain electrode of first end A, NMOS tube NMOS20 and the second end of inductance L1 are connected to the first end of inductance L2 altogether, NMOS tube NMOS21's
The first end of drain electrode and inductance L3 are connected to the second end of inductance L2 altogether, and the source electrode of NMOS tube NMOS21 and the second end of inductance L3 are total
It is connected to the second end B that inductance network adjusts unit 1034, the grid of NMOS tube NMOS21 and the grid of NMOS tube NMOS21 are common
Access controls signal D1 all the way, the i.e. controllable NMOS tube NMOS21 and NMOS tube NMOS21 of the level state by controlling signal D1
Conducting or shutdown；When controlling signal D1 is high level, be connected between the source electrode and drain electrode of NMOS tube NMOS20, inductance L1
It is short-circuited, is connected between the source electrode and drain electrode of NMOS tube NMOS21, inductance L3 is short-circuited, at this time inductance network controlling brancher 601
(a) equivalent inductance is the amplitude of inductance L2；When controlling signal D1 is low level, the source electrode and drain electrode of NMOS tube NMOS20
It is separated, the source electrode and drain electrode of NMOS tube NMOS21 it is separated, inductance network controlling brancher 601 (a) include be connected in series
: inductance L1, inductance L2 and inductance L3, the at this time equivalent inductance of inductance network controlling brancher 601 (a) are as follows: the width of inductance L1
The sum of value, the amplitude of inductance L2 and the amplitude of inductance L3 this three；Therefore in inductance network controlling brancher 601 (a), pass through
Control signal D1 control NMOS tube NMOS20 and NMOS tube NMOS21 is connected or is turned off, to change inductance network control branch
The equivalent resistance on road 601 (a)；Since inductance network adjusts the inductance network branch 601 that unit 1034 includes multiple parallel connections,
It is when each inductance network controlling brancher 601 changes the equivalent inductance of its own according to the level state of control signal, then electric
The equivalent inductance of sense network adjustment unit 1034 can also occur to change accordingly.
Fig. 6 has been shown that inductance network adjusts the physical circuit knot of multiple inductance network controlling branchers 601 in unit 1034
Structure (including inductance network controlling brancher 601 (a)~601 (i)), it is to be understood that inductance network branch in the embodiment of the present invention
The circuit structure on road 601 is not intended to be limited to inductance network controlling brancher 601 (a) shown in Fig. 6~601 (i), this field
Other circuit structures can be used also to implement inductance network controlling brancher in the embodiment of the present invention in technical staff；Such as this field
Technical staff obtains other flexible circuit structures according to inductance network controlling brancher 601 (a)~601 (i), to obtain novel electricity
Feel network-control branch；Therefore it is adjusted in unit 1034 in capacitance network, multiple inductance network controlling branchers 601 are according to multichannel control
Signal processed is the equivalent inductance that changeable inductance network adjusts unit.
In conjunction with attached drawing 3- attached drawing 6, since the first adjustment module 1031 includes: that at least one resistor network adjusts unit
1032, at least one capacitance network adjusts unit 1033 and at least one inductance network adjusts unit 1034, according to above-mentioned three
It (includes: that resistor network adjusts unit 1032, capacitance network adjusts unit 1033 and inductance network adjusts unit that kind, which adjusts unit,
1034) working principle can change the equivalent inductance of above three adjusting unit, equivalent resistance by controlling signal D respectively
And equivalent inductance；During equalizer system 10 carries out frequency compensation to signal, changed in real time by control signal D
The equivalent impedance (including: equivalent inductance, equivalent resistance and equivalent inductance) of first adjustment module 103 is realized for balanced device
The adjustment of 103 zero pole point position of circuit, and then improve the ability of equalization of equalizer system 10.
As an alternative embodiment, Fig. 7 shows the circuit of equalizer 103 provided in an embodiment of the present invention
Structure, as shown in fig. 7, equalizer 103 includes:, a resistor network adjusts unit R H1, a capacitance network adjusts unit CH1,
One inductance network adjusts unit LH1, first resistor R701, second resistance R702, first capacitor C701, the second capacitor C702, the
One NMOS tube M701, the second NMOS tube M702, the first reference current source IA1 and the second reference current source IA2；It needs to illustrate
It is that it is that the resistor network in above-mentioned attached drawing 3 adjusts unit 1032 that the resistor network in Fig. 7, which adjusts unit R H1, therefore, for
Resistor network adjusts the circuit structure of unit R H1 in the present embodiment and its working principle can refer to the resistance in attached drawing 3 and attached drawing 4
The embodiment of network adjustment unit 1032, similar, capacitance network adjusts circuit structure and its work of unit CH1 in Fig. 7
Principle can refer to the embodiment that the capacitance network in attached drawing 3 and attached drawing 5 adjusts unit 1033, and inductance network adjusts unit in Fig. 7
The circuit structure and its working principle of LH1 can refer to the embodiment that the inductance network in attached drawing 3 and attached drawing 6 adjusts unit 1034,
It will not be described in great detail herein；
As shown in fig. 7, inductance network adjust unit LH1 first termination DC power supply VDD, the first of first resistor R701
End and second resistance R702 first end be connected to altogether inductance network adjust unit LH1 second end, the second of first resistor R701
The drain electrode at end, the first end of first capacitor C701 and the first NMOS tube M701 is connected to the voltage output end of equalizer altogether
The second end of VOUT, first capacitor C701 is grounded GND, the second end of second resistance R702, the first end of the second capacitor C702 with
And second NMOS tube M702 drain electrode be connected to altogether equalizer voltage output end Vout, the second capacitor C702 second termination
The grid of ground GND, the grid of the first NMOS tube M701 and the second NMOS tube M702 are connected to the voltage input end of equalizer altogether
Vin, the source electrode of the first NMOS tube M701 connect the first end of the first reference current source IA1, and the source electrode of the second NMOS tube M702 connects
The first end of two reference current source IA2, the second end of the second end of the first reference current source IA1 and the second reference current source IA2
It is connected to ground altogether；Wherein, capacitance network adjusts the source electrode and the second NMOS tube M702 that unit CH1 is connected to the first NMOS tube M701
Between source electrode, it is in parallel with capacitance network adjusting unit CH1 that resistor network adjusts unit R H1.
In the circuit structure of above-mentioned equalizer 103, the first reference current source IA1 and the second reference current source IA2
All for generating reference current；The voltage input end Vin of equalizer is for accessing voltage signal, since telecommunication circuit can be right
The high-frequency band of voltage signal is filtered out, and then is mended by high fdrequency component of the equalizer 103 to the voltage signal
It repays, and compensated voltage signal is exported by the voltage output end Vout of equalizer, and then reduce voltage signal
The bit error rate；In the circuit structure of the equalizer 103 shown in Fig. 7, unit CH1, inductance network tune are adjusted by capacitance network
Section unit LH1 and resistor network adjust unit R H1 and collectively constitute the first adjustment module 1031 in equalizer 103, root
According to above-mentioned first adjustment module, 1031 working principle, when equalizer 103 carries out balance frequency compensation to voltage signal, the
One adjustment module 1031 adjusts the zero pole point position of equalizer 103 according to control signal D, with device system 10 of keeping in balance
Frequency peak and DC current gain are constant, to enhance equalizer 103 to the isostatic compensation ability of signal.
As an alternative embodiment, Fig. 8 shows the another of equalizer 103 provided in an embodiment of the present invention
Kind circuit structure, as shown in figure 8, equalizer 103 includes: that an inductance network adjusts unit LD1, two capacitance networks are adjusted
Unit: capacitance network adjusts unit Cs1 and capacitance network adjusts unit Cs2, four resistor networks adjust unit: resistor network tune
Save unit R s1, resistor network adjusts unit R s2, resistor network adjusts unit R s3 and resistor network adjusts unit R s4；Wherein
In attached drawing 8, the inductance network adjusts the circuit structure of unit LD1 and its working principle and can refer in attached drawing 3 and attached drawing 6
Inductance network adjusts the embodiment of unit 1034, and it (includes: that resistor network adjusts unit that aforementioned four resistor network, which adjusts unit,
Rs1, resistor network adjust unit R s2, resistor network adjusts unit R s3 and resistor network and adjusts unit R s4) circuit structure
And its working principle can refer to the embodiment that the resistor network in attached drawing 3 and attached drawing 4 adjusts unit 1032, above-mentioned two capacitor net
Network adjusts the circuit structure and its work original of unit (including: that capacitance network adjusts unit Cs1 and capacitance network adjusting unit Cs2)
Reason can refer to the embodiment that the capacitance network in attached drawing 3 and attached drawing 5 adjusts unit 1033.
Wherein, the first end that capacitance network adjusts the first end of unit Cs1 and resistor network adjusts unit R s1 is connected to altogether
The voltage input end Vin of weighing apparatus circuit, capacitance network adjusts the second end of unit Cs1 and resistor network adjusts the of unit R s2
One end is connected to the voltage output end Vout of equalizer altogether, and resistor network adjusts the second end and resistor network tune of unit R s1
The second end of section unit R s2 is connected to the first end that inductance network adjusts unit LD1 altogether, and resistor network adjusts the first of unit R s3
The first end that end and capacitance network adjust unit Cs2 is connected to the voltage input end Vin of equalizer altogether, and resistor network adjusts single
The second end that the first end and capacitance network of first Rs4 adjusts unit Cs2 is connected to the voltage output end Vout of equalizer, electricity altogether
The second end that the second end and the resistor network for hindering network adjustment unit R s3 adjust unit R s4 is connected to inductance network adjusting altogether
The second end of unit LD1.
Referring to the embodiment of equalizer 103 in above-mentioned Fig. 7, in equalizer 103 out shown in Fig. 8, by electricity
Feel network adjustment unit LD1, capacitance network adjusts unit Cs1, capacitance network adjusts unit Cs2, resistor network adjusts unit
Rs1, resistor network adjust unit R s2, resistor network adjusts unit R s3 and resistor network adjusts unit R s4 and collectively constitutes
First adjustment module 1031 of weighing apparatus circuit 103, when the voltage input end Vin of equalizer accesses voltage signal, first is adjusted
Section module 1031 adjusts the zero pole point of equalizer 103 according to control signal D, and then the voltage for reducing equalizer is defeated
The bit error rate of outlet Vout institute output signal.
It should be noted that equalizer shown in Fig. 7 and Fig. 8 is only balanced device electricity in the embodiment of the present invention
The specific embodiment on road 103 not constitutes the technology limiting to equalizer 103 in the present invention；Those skilled in the art
Other circuit structures can be used also to realize circuit function possessed by the equalizer 103 in the embodiment of the present invention, into
And keep constant the frequency peak of equalizer system 10 and DC current gain.
As an alternative embodiment, Fig. 9 shows the module of gain amplifier 104 provided in an embodiment of the present invention
Structure, as shown in figure 9, gain amplifier 104 includes the second adjustment module 1041, the second adjustment module 1041 and EQ Gain control
Device 101 processed connects, and when EQ Gain controller 101, which will control signal D, is transmitted to the second adjustment module 1041, second adjusts mould
Block 1041 adjusts the zero pole point position of gain amplifier 104 according to control signal D；Since equalizer unit 102 includes multiple grades
The gain amplifier 104 of connection, when frequency of the equalizer system 10 to signal carries out isostatic compensation, in every one step gain amplifier
It is the zero pole point position of adjustable gain amplifier 104 by the second adjustment module 1041, so that balanced device system in 104
The DC current gain and frequency peak of system 10 are all kept constant；Also, the number of gain amplifier 104 can in equalizer unit 102
To be arbitrarily adjusted, compatibility is stronger, so that equalizer system 10 has optimal isostatic compensation ability to signal.
As shown in figure 9, the second adjustment module 1041 include: at least one resistor network adjust unit 1042, at least one
Capacitance network adjusts unit 1043 and at least one inductance network adjusts unit 1044；It should be noted that the resistance in Fig. 9
The circuit structure and its working principle of network adjustment unit 1042 can refer to the resistor network in Fig. 3 and Fig. 4 and adjust unit 1032
Embodiment, the capacitance network in Fig. 9 adjusts the circuit structure of unit 1043 and its working principle and can refer in Fig. 3 and Fig. 5
Capacitance network adjusts the embodiment of unit 1033, and the inductance network in Fig. 9 adjusts the circuit structure and its work original of unit 1044
Reason can refer to the embodiment that the inductance network in Fig. 3 and Fig. 6 adjusts unit 1034；Therefore in the second adjustment module 1041, lead to
It crosses resistor network and adjusts unit 1042, capacitance network adjusting unit 1043 and inductance network adjusting unit 1042 according to control letter
The equivalent impedance (including: equivalent resistance, equivalent capacity and equivalent inductance) of the second adjustment module 1041 number is adjusted respectively, in turn
Realization is adjusted the zero pole point position of gain amplifier 104.
As an alternative embodiment, Figure 10 shows the electricity of gain amplifier 104 provided in an embodiment of the present invention
Line structure, as shown in Figure 10, gain amplifier 104 include: that an inductance network adjusts unit CD1, two resistor networks adjust list
Member: resistor network adjusts unit R D1 and resistor network adjusts unit R D2, two capacitance networks adjust unit: capacitance network is adjusted
Unit CL1 and capacitance network adjust unit CL2, third NMOS tube M1001, the 4th NMOS tube M1002 and third reference current
Source IA3；Wherein, each network unit in Figure 10 (include: inductance network adjust unit CD1, resistor network adjust unit R D1,
Resistor network adjusts unit R D2, capacitance network adjusts unit CL1 and capacitance network and adjusts unit CL2) circuit structure and its
Working principle, those skilled in the art can refer in Fig. 9 that each adjusting unit (includes: resistance net in the second adjustment module 1041
Network adjusts unit 1042, capacitance network adjusts unit 1043 and inductance network and adjusts unit 1044) embodiment.
As shown in Figure 10, the first end that resistor network adjusts the first end of unit R D1 and resistor network adjusts unit R D2 is total
It is connected to the first end that inductance network adjusts unit CD1, inductance network adjusts the second termination DC power supply VDD of unit CD1, resistance
The second end of network adjustment unit R D1, capacitance network adjust the first end of unit CL1 and the drain electrode of third NMOS tube M1001
It is connected to the voltage output end Vout of gain amplifier altogether, the second end that capacitance network adjusts unit CL1 is grounded GND, resistor network
Adjust the second end of unit R D2, capacitance network adjusts the first end of unit CL2 and the drain electrode of the 4th NMOS tube M1002 connects altogether
In the voltage output end Vout of gain amplifier, the second end that capacitance network adjusts unit CL2 is grounded GND, third NMOS tube
The grid of the grid of M1001 and the 4th NMOS tube M1002 are connected to the voltage input end Vin of gain amplifier, third NMOS tube altogether
The source electrode of the source electrode of M1001 and the 4th NMOS tube M1002 are connected to the first end of third reference current source IA3, third benchmark electricity altogether
The second end of stream source IA3 is grounded GND.
The circuit structure of the gain amplifier 104 gone out according to Fig.10, third reference current source IA3 are used for outputting reference
Electric current；Unit CD1 is adjusted by inductance network, resistor network adjusts unit R D1, resistor network adjusts unit R D2, capacitance network tune
Section unit CL1 and capacitance network adjust unit CL2 and collectively constitute the second adjustment module 1041 in gain amplifier 104；When
When the voltage input end Vin of every one step gain amplifier 104 accesses voltage signal, equalizer system 10 carries out frequency benefit to signal
When repaying, adjusted in real time by zero pole point position of second adjustment module 1041 to gain amplifier 104, and then make balanced device
The DC current gain and frequency peak of system 10 can remain stable, and the voltage output end Vout of gain amplifier can export frequency
The voltage signal of rate equilibrium.
As an alternative embodiment, Figure 11 shows the another of gain amplifier 104 provided in an embodiment of the present invention
A kind of circuit structure, as shown in figure 11, gain amplifier 104 include: that a resistor network adjusts unit R D3, an inductance network tune
Save unit CD2, a capacitance network adjusts unit CL3, the 5th NMOS tube M1101 and the first PMOS tube M1102；It needs to illustrate
It is that resistor network adjusts unit R D3 in Figure 11, inductance network adjusts unit CD2 and capacitance network adjusts the circuit of unit CL3
Structure and its working principle, those skilled in the art can refer in Fig. 9 each adjusting unit (packet in the second adjustment module 1041
Include: resistor network adjusts unit 1042, capacitance network adjusts unit 1043 and inductance network and adjusts unit 1044) implementation
Example.
As shown in figure 11, resistor network adjusts the grid and the 5th of the first end of unit R D3, the first PMOS tube M1102
The grid of NMOS tube M1101 is connected to the voltage input end Vin of gain amplifier altogether, and resistor network adjusts the second end of unit R D3
The first end that inductance network adjusts unit CD2 is connect, the source electrode of the first PMOS tube M1102 connects DC power supply VDD, the 5th NMOS tube
The source electrode of M1101 is grounded GND, and inductance network adjusts the second end of unit CD2, the drain electrode of the first PMOS tube M1102, the 5th NMOS
The first end that the drain electrode of pipe M1101 and capacitance network adjust unit CL3 is connected to the voltage output end Vout of gain amplifier altogether,
The second end that capacitance network adjusts unit CL3 is grounded GND.
In the circuit structure of gain amplifier 104 shown by Figure 11, unit R D3, inductance network are adjusted by resistor network
It adjusts unit CD2 and capacitance network adjusts unit CL3 and collectively constitutes the second adjustment module 1041 in gain amplifier 104；
In the circuit structure of gain amplifier 104 provided by the embodiment of the present invention, pass through the voltage input end Vin of gain amplifier
Voltage signal is accessed, the second adjustment module 1041 is the zero pole point position that gain amplifier 104 is adjusted according to control signal D,
Make equalizer system 10 that there is good frequency equilibrium compensation ability to the voltage signal in turn, at this time the voltage of gain amplifier
Output end vo ut can export the voltage signal of low error rate.
The circuit structure of the equalizer system 10 in conjunction with shown in above-mentioned attached drawing 1- attached drawing 11, in order to better illustrate this hair
The beneficial effect that equalizer system 10 is realized in bright embodiment, attached drawing 12 (a) show balanced device system in the embodiment of the present invention
The frequency response chart of system 10, the frequency response chart of equalizer system, comparison diagram 12 (a) and Figure 12 in attached drawing 12 (b) traditional technology
(b) two Swing frequency response diagram works as equalizer system (shown in such as Figure 12 (b)) in the frequency of equalizer system in the conventional technology
When carrying out frequency compensation to signal, the zero point and pole of equalizer system can all be moved, shown in attached drawing 12 (b)
The crest frequency point of frequency response chart, equalizer system is non-constant (by ω0Become ω1), the DC current gain of equalizer system (by
M0Become M7) also non-constant, therefore since the zero point of equalizer system and pole can be sent out during frequency compensation in traditional technology
Raw movement, this signal maximum bandwidth that directly results in equalizer and can compensate also accordingly reduce, the equilibrium of equalizer system
Ability decline.
And in embodiments of the present invention in the frequency response chart (such as attached drawing 12 (a)) of equalizer system 10, when balanced device system
When system carries out frequency compensation to signal, equalizer 103 and gain amplifier 104 can all be adjusted respectively according to control signal D
The zero pole point position of itself；Specifically, in conjunction with the working principle of above-mentioned equalizer system 10, in the high-speed transfer channel of signal
In, the zero pole point position of equalizer 103 is adjusted by the first adjustment module 103, is adjusted by the second adjustment module 1041
The zero pole point position of gain amplifier 104, by cooperating with each other for equalizer 103 and gain amplifier 104, so that
The whole zero pole point position of equalizer system 10 is kept constant；Therefore balanced in the frequency response chart shown by attached drawing 12 (a)
The highest frequency peak value of device system 10, which is always maintained at, constant (is always held at ω0), the DC current gain of equalizer system 10 also one
It directly keeps constant and (is always held at M0), when equalizer system 10 to signal carry out frequency compensation when, equalizer system 10 it is straight
Flow enhancement and frequency peak can maintain stationary value, thus through the embodiment of the present invention in equalizer system 10 can mend
It repays the signal energy due to caused by frequency decay in channel to be lost, there is stronger frequency equilibrium ability.
In the equalizer system 10 provided by the embodiment of the present invention, since equalizer system 10 is controlled including EQ Gain
Device 101 and equalizer unit 102, and equalizer unit 102 includes equalizer 103 and at least one gain amplifier
104, zero pole point position of first adjustment module 1031 according to control signal D adjustable equalizer circuit 103, the second adjustment module
1041 according to the zero pole point position for controlling signal D adjustable gain amplifier 104, passes through equalizer 103 and gain is amplified
Device 104 cooperates with each other, so that the DC current gain of equalizer system 10 and frequency peak are all kept constant, therefore logical
The frequency compensation that equalizer system 10 is able to carry out signal in larger range is crossed, the equal of equalizer system 10 is effectively improved
Weighing apparatus ability and its stability；And according to the circuit structure of above-mentioned equalizer system 10, equalizer system in the embodiment of the present invention
10 circuit structure is simple, is easily achieved, and can be widely used in high-speed communication circuit；To solve in traditional technology
The ability of equalization of equalizer system is weak, so cause circuit system stability reduce the problem of.
Herein, such as multiple and multichannel etc refers both to the quantity greater than 1；Such as first and second etc relationship art
Language is used merely to distinguish an entity with another entity, exists without necessarily requiring or implying between these entities
Any actual relationship or order.And the terms "include", "comprise" or any other variant are intended to non-row
His property includes, so that including the product or the intrinsic element of structure of a series of elements.What is do not limited more
In the case of, the element that is limited by sentence " including ... " or " including ... ", it is not excluded that include the element process,
There is also other elements in method, article or terminal device.In addition, herein, " being greater than ", " being less than ", " being more than " etc.
It is interpreted as not including this number；" more than ", " following ", " within " etc. be interpreted as including this number；The foregoing is merely the preferable of invention
Embodiment, not to limit invention, it is all invention spirit and principle within it is made it is any modification, equivalent replacement and
Improve etc., it should be included within the protection scope of invention.
Claims (10)
1. a kind of equalizer system characterized by comprising EQ Gain controller and connect with the EQ Gain controller
Equalizer unit；
The EQ Gain controller is for generating multi-way control signals；
The equalizer unit includes successively cascade: equalizer and N number of gain amplifier, the equalizer unit are used for
Keep the DC current gain of the equalizer system and frequency peak all constant according to the multi-way control signals；
The N is the positive integer more than or equal to 1.
2. equalizer system according to claim 1, which is characterized in that the EQ Gain controller includes:
Driving signal is accessed, for obtaining the multi-way control signals to driving signal progress logical operation and logical combination
Combinational logic circuit；
The driving signal is external drive circuit generation, or is the feedback signal of the equalizer system itself.
3. equalizer system according to claim 1, which is characterized in that the equalizer include: with it is described balanced
Gain controller connection, first of the zero pole point position for the equalizer according to the control Signal Regulation adjust mould
Block；
Wherein, first adjustment module includes: that at least one resistor network adjusts unit, at least one capacitance network adjusts list
Member and at least one inductance network adjust unit.
4. equalizer system according to claim 3, which is characterized in that the resistor network adjust unit include it is multiple simultaneously
The resistor network controlling brancher of connection；
Wherein, the resistor network controlling brancher includes at least one CMOS tube and at least one resistance, the resistor network control
Machine branch processed changes the equivalent resistance that the resistor network adjusts unit according to the control signal.
5. equalizer system according to claim 3, which is characterized in that the capacitance network adjust unit include it is multiple simultaneously
The capacitance network controlling brancher of connection；
Wherein, the capacitance network controlling brancher includes at least one CMOS tube and at least one capacitor, the capacitance network control
Branch processed changes the equivalent capacity that the capacitance network adjusts unit according to the control signal.
6. equalizer system according to claim 3, which is characterized in that the inductance network adjust unit include it is multiple simultaneously
The inductance network controlling brancher of connection；
Wherein, the inductance network controlling brancher includes at least one CMOS tube and at least one inductance, the inductance network control
Branch processed changes the equivalent inductance that the inductance network adjusts unit according to control signal.
7. equalizer system according to claim 3, which is characterized in that the equalizer includes: the resistance
Network adjustment unit, the capacitance network adjust unit, an inductance network adjusts unit, first resistor, second resistance,
First capacitor, the second capacitor, the first NMOS tube, the second NMOS tube, the first reference current source and the second reference current source；
Wherein, the inductance network adjusts the first termination DC power supply of unit, the first end of the first resistor and described the
The first end of two resistance is connected to the second end that the inductance network adjusts unit altogether, the second end of the first resistor, described the
The drain electrode of the first end of one capacitor and first NMOS tube is connected to the voltage output end of the equalizer altogether, and described
The second end of one capacitor is grounded, the second end of the second resistance, the first end of second capacitor and the 2nd NMOS
The drain electrode of pipe is connected to the voltage output end of the equalizer altogether, and the second end of second capacitor is grounded, and described first
The grid of NMOS tube and the grid of second NMOS tube are connected to the voltage input end of the equalizer altogether, and described first
The source electrode of NMOS tube connects the first end of first reference current source, and the source electrode of second NMOS tube connects the second benchmark electricity
The second end of the first end in stream source, the second end of first reference current source and second reference current source is connected to ground altogether；
Wherein, the capacitance network adjust unit be connected to the first NMOS tube source electrode and second NMOS tube source electrode it
Between, it is in parallel with capacitance network adjusting unit that the resistor network adjusts unit.
8. equalizer system according to claim 3, which is characterized in that the equalizer includes: an inductance
Network adjustment unit, two capacitance networks adjust unit: capacitance network adjusts unit Cs1 and capacitance network adjusts unit
Cs2, four resistor networks adjust unit: resistor network adjusts unit R s1, resistor network adjusts unit R s2, resistor network
It adjusts unit R s3 and resistor network adjusts unit R s4；
Wherein, the first end that the capacitance network adjusts the first end of unit Cs1 and the resistor network adjusts unit R s1 connects altogether
In the voltage input end of the equalizer, the second end of the capacitance network adjusting unit Cs1 and the resistor network tune
The first end of section unit R s2 is connected to the voltage output end of the equalizer altogether, and the resistor network adjusts the of unit R s1
The second end that two ends and the resistor network adjust unit R s2 is connected to the first end that the inductance network adjusts unit altogether, described
The first end that resistor network adjusts the first end of unit R s3 and the capacitance network adjusts unit Cs2 is connected to the balanced device altogether
The voltage input end of circuit, the resistor network adjusts the first end of unit R s4 and the capacitance network adjusts the of unit Cs2
Two ends are connected to the voltage output end of the equalizer, the second end of the resistor network adjusting unit R s3 and the electricity altogether
The second end of resistance network adjustment unit R s4 is connected to the second end that the inductance network adjusts unit altogether.
9. equalizer system according to claim 1, which is characterized in that the gain amplifier include: with it is described balanced
Gain controller connection, second of the zero pole point position for the gain amplifier according to the control Signal Regulation adjust mould
Block；
Wherein, second adjustment module includes: that at least one resistor network adjusts unit, at least one capacitance network adjusts list
Member and at least one inductance network adjust unit.
10. equalizer system according to claim 9, which is characterized in that the gain amplifier includes: an inductance
Network adjustment unit, two resistor networks adjust unit: resistor network adjusts unit R D1 and resistor network adjusts unit
RD2, two capacitance networks adjust unit: capacitance network adjusts unit CL1 and capacitance network adjusts unit CL2, third
NMOS tube, the 4th NMOS tube and third reference current source；
Wherein, the first end that the resistor network adjusts the first end of unit R D1 and the resistor network adjusts unit R D2 connects altogether
The first end of unit is adjusted in the inductance network, the inductance network adjusts the second termination DC power supply of unit, the electricity
Hinder the second end of network adjustment unit R D1, the first end of capacitance network adjusting unit CL1 and the third NMOS tube
Drain electrode is connected to the voltage output end of the gain amplifier altogether, and the capacitance network adjusts the second end ground connection of unit CL1, described
Resistor network adjusts the second end of unit R D2, the capacitance network adjusts the first end and the 4th NMOS tube of unit CL2
Drain electrode be connected to the voltage output end of the gain amplifier altogether, the capacitance network adjusts the second end ground connection of unit CL2, institute
The grid of the grid and the 4th NMOS tube of stating third NMOS tube is connected to the voltage input end of the gain amplifier altogether, described
The source electrode of third NMOS tube and the source electrode of the 4th NMOS tube are connected to the first end of the third reference current source altogether, and described
The second end of three reference current sources is grounded.
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| CN112737536A (en) * | 2020-12-24 | 2021-04-30 | 南方科技大学 | Continuous time linear equalizer and signal transceiving circuit |
| CN113206810A (en) * | 2021-07-05 | 2021-08-03 | 牛芯半导体(深圳)有限公司 | Adjustable equalizer and adjusting method |
| CN114301441A (en) * | 2021-12-31 | 2022-04-08 | 苏州芯动微电子科技有限公司 | Linear equalizer and MIPI C-PHY circuit |
| CN116055268A (en) * | 2023-03-30 | 2023-05-02 | 苏州浪潮智能科技有限公司 | Continuous time linear equalization circuit, chip interconnection physical interface circuit and receiving end |
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| CN114301441B (en) * | 2021-12-31 | 2024-02-20 | 苏州芯动微电子科技有限公司 | Linear equalizer and MIPI C-PHY circuit |
| CN116055268A (en) * | 2023-03-30 | 2023-05-02 | 苏州浪潮智能科技有限公司 | Continuous time linear equalization circuit, chip interconnection physical interface circuit and receiving end |
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|---|---|
| CN110061940B (en) | 2022-01-07 |
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Application publication date: 20190726 Assignee: NANJING WEIHAO TECHNOLOGY CO.,LTD. Assignor: SOUTH University OF SCIENCE AND TECHNOLOGY OF CHINA Contract record no.: X2023980049408 Denomination of invention: An Equalizer System Granted publication date: 20220107 License type: Common License Record date: 20231201 |