CN110034736A - 封装式射频功率放大器 - Google Patents
封装式射频功率放大器 Download PDFInfo
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- 239000002184 metal Substances 0.000 claims description 39
- 238000004806 packaging method and process Methods 0.000 claims description 8
- 239000000758 substrate Substances 0.000 claims description 6
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 3
- 239000010931 gold Substances 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 238000009434 installation Methods 0.000 claims description 3
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- 230000003071 parasitic effect Effects 0.000 description 2
- 229910002601 GaN Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
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Abstract
本发明涉及封装式射频RF功率放大器。本发明还涉及用于该功率放大器中的半导体芯片,以及包括该半导体芯片和/或功率放大器的电子设备或电子系统。根据本发明,半导体芯片包括与第一漏极接合组件间隔开设置并且电连接至第一漏极接合组件的第二漏极接合组件。其中,相比于第一漏极接合组件,第二漏极接合组件更靠近半导体芯片的输入侧。RF功率放大器包括在第一漏极接合组件与输出引线之间延伸的第一组多个接合线以及从第二漏极接合组件延伸至接地电容器的第一端的第二组多个接合线。
Description
技术领域
本发明涉及一种封装式射频(RF)功率放大器,本发明还涉及一种用于该功率放大器中的半导体芯片,以及包括该半导体芯片和/或功率放大器的电子设备或电子系统。
背景技术
图1A和图1B示出了现有的封装式功率放大器的示意性俯视图和截面图,并且图1C示出了现有的封装式功率放大器的等效电路。
现有的放大器包括封装件,该封装件具有输出引线1、输入引线2以及法兰3。输出引线1和输入引线2通过陶瓷环16与法兰3隔开。在封装式放大器被组装在印刷电路板(PCB)上后,法兰3通常与PCB的地相连接。
半导体芯片4设置在法兰3上。在该芯片上设置有RF功率晶体管5。功率晶体管5包括漏极指状物6和栅极指状物7,该漏极指状物6和栅极指状物7分别与第一漏极接合组件8和栅极接合组件9连接。例如,RF功率晶体管5可以包括硅基横向扩散金属氧化物半导体(LDMOS)晶体管。
半导体芯片4包括设置在相比于输出引线1更靠近输入引线2的输入侧A和设置在相比于输入引线2更靠近输出引线1的输出侧B。
封装式放大器还包括电容器C1和C2,该C1和C2可以在另一半导体芯片上实现或者可以设置成分立部件的形式。在图1A和图1B中,电容器C1和C2分别形成在半导体芯片10和11上。
多个接合线12从输入引线2延伸到电容器C2的第一端。电容器C2的另一端接地。例如,半导体芯片11的衬底材料可以是导电的,其允许从C2的另一端经由衬底至半导体芯片11所安装的法兰3的低欧姆连接。多个接合线12具有给定的电感,其在图1C所示的等效电路图中表示为电感器L1。另外的多个接合线13从C2的第一端延伸到栅极接合组件9。该多个接合线在图1C中表示为电感器L2。
两组多个接合线从第一漏极接合组件8延伸。在图1C中表示为电感器L4的第一组多个接合线15从漏极接合组件8延伸到输出引线1。在图1C中表示为电感器L3的第二组多个接合线14从第一漏极接合组件8延伸到电容器C1的第一端。类似于C2的接地端,C1的另一端也接地。
功率放大器可以可选地包括设置在半导体芯片10上的另一电容器C3。该电容器C3的第一端可以通过一个或多个接合线17被连接到输出引线1,C3的另一端接地。在图1C中,接合线表示为电感器L5。
功率晶体管5包括影响晶体管的特性的寄生部件。这些寄生部件中的一个是漏极-源极输出电容,该漏极-源极输出电容可以表示为在功率晶体管5的漏极端和源极端之间设置的电容器Cds,如图1C所示。如果未做说明,该寄生电容对功率放大器的增益和效率有很大的影响。
一个减轻Cds对性能影响的现有方法是使用被设置为与Cds并联的电感器。被一起使用时,这些部件会在放大器的工作频率处或工作频率附近产生并联谐振。这会确保Cds和电感器的合成阻抗足够高从而不再明显地降低放大器的RF性能。例如,Cds可以使用电感器至少部分地补偿,从而使得放大器觉察到工作频率处的阻抗,工作频率处的该阻抗的实部大于没有补偿的情况下的阻抗的实部。
在图1C中,上述被设置为与Cds并联的电感器由第二组多个接合线14也即L3形成。电容器C1应当足够大以在工作频率处作为射频短路。更具体地,L3和C1的串联连接可以在工作频率下作为电感,以使得与Cds产生并联谐振。在DC下,C1阻挡DC路径与地。
在L3和L4之间存在相对较大的互感系数。已知该互感会降低功率放大器的性能。更具体地,该互感会使得输出电容Cds不那么有效地被L3补偿,从而导致小的阻抗变换,并且因此导致比没有互耦合的情况下更低的输出阻抗,并且具有损耗。这也会接着在具有额外损耗的情况下降低效率,因为在下一个匹配步骤中需要较大的阻抗变换。
发明内容
本发明的目的是提供一种针对该问题的解决方案。根据本发明使用如权利要求1中所限定的功率放大器来实现该目的,其特征在于,半导体芯片包括设置为与第一漏极接合组件间隔开并且电连接至该第一漏极接合组件的第二漏极接合组件,其中,相比于第一漏极接合组件,该第二漏极接合组件被设置为更靠近半导体芯片的输入侧,并且其中,第二组多个接合线从第二漏极接合组件延伸到第一电容器的第一端。
根据本发明,第二组多个接合线所延伸的接合组件不同于第一组多个接合线所延伸的接合组件。此外,因为第二接合组件移至更偏于半导体芯片的输入侧,因此在同第一组多个接合线相关联的电流回路与同第二组多个接合线相关联的电流回路之间具有较少的重叠。这会导致在图1C的L3和L4之间较小的互感系数。因此,能够提高功率放大器的效率和输出阻抗。
如上所述,RF功率晶体管可以具有漏极-源极输出电容。第二组多个接合线的电感和第一电容器的电容可以被设置为使得在RF功率放大器的工作频率处或工作频率附近,第一电容和第二组多个接合线的串联连接与漏极-源极输出电容产生谐振。
RF功率晶体管可以包括在第一漏极接合组件和第二漏极接合组件之间延伸的多个漏极指状物。通常,漏极指状物与半导体芯片的输入侧和输出侧之间的方向对准。
封装式的RF功率放大器还可以包括电连接至输入引线的栅极接合组件,并且其中,RF功率放大器包括电连接至栅极接合组件的栅极,以及从栅极接合组件延伸并且与漏极指状物叉指式设置的多个栅极指状物.
在一个实施方式中,相比于第二漏极接合组件,栅极接合组件可以被设置为更靠近输入侧。因此,在该实施方式中,第二漏极接合组件设置在栅极接合组件与第一漏极接合组件之间。在此情况下,第二漏极接合组件可以包括第一接合杆,并且栅极指状物可以在该第一接合杆底下延伸。可替代地,第二漏极接合组件可以包括多个间隔开的第一接合垫,并且栅极指状物可以在第一接合垫之间延伸。为了实现上述设置,半导体芯片可以包括具有下金属层和上金属层的金属层叠。其中,相比于上金属层,下金属层被设置为更接近半导体芯片的衬底的表面。其中,在上金属层中形成有第一漏极接合组件和第二漏极接合组件以及栅极接合组件。并且其中,在至少下金属层中形成有漏极指状物和栅极指状物。例如,半导体芯片可以包括将在上金属层中形成的第二漏极接合组件电连接至漏极指状物的多个通孔,并且其中,栅极指状物在通孔之间延伸。
可替代地,相比于栅极接合组件,第二漏极接合组件被设置为更靠近输入侧。因此,在此实施方式中,栅极接合组件设置在第一接合组件和第二接合组件之间。在此情况下,栅极接合组件可以包括第二接合杆,并且漏极指状物可以在第二接合杆底下延伸。可替代地,栅极接合组件可以包括多个间隔开的第二接合垫,并且漏极指状物可以在第二接合垫之间延伸。为了实现上述设置,半导体芯片可以包括具有下金属层和上金属层的金属层叠。其中,相比于上金属层,下金属层被设置为更靠近半导体的衬底的表面。其中,在上金属层中形成有第一漏极接合组件和第二漏极接合组件以及栅极接合组件,并且其中,在下金属层中形成有漏极指状物和栅极指状物。例如,半导体芯片可以包括将在上金属层中形成的栅极接合组件电连接至栅极指状物的多个通孔,并且其中,漏极指状物在通孔之间延伸。
第一电容器可以形成在半导体芯片上。可替代地,第一电容器可以设置在半导体芯片与输出引线之间。例如,功率放大器可以包括设置于在封装件中半导体芯片与输出引线之间的另一半导体芯片。其中,第一电容器设置在另一半导体芯片上。该另一半导体芯片可以包括具有第一端和接地第二端的另一电容器。封装式RF功率放大器还可以包括从输出引线延伸到另一电容器的第一端的一个或多个第三接合线。该多个第三接合线可以与另一电容器形成输出匹配网络。
RF功率放大器的工作频率例如对应于待放大信号的载波频率可以在500MHz至40GHz的范围内。而且,第一电容器的电容可以大于5pF,并且其中,第二组多个接合线的电感可以在0.05nH和5nH的范围内。
半导体芯片可以包括硅基横向扩散金属氧化物半导体(LDMOS)晶体管或者氮化镓基场效应管(FET)。
根据另一方面,本发明涉及能够安装在具有输入引线和输出引线的封装件中的半导体芯片。其中,半导体芯片包括第一漏极接合组件和RF功率晶体管,该第一漏极接合组件被配置成用于安装从第一漏极接合组件延伸到输出引线的第一组多个接合线,该RF功率晶体管具有电连接至第一漏极接合组件的漏极。半导体芯片包括输入侧和输出侧。在半导体芯片安装在封装件中时,输入侧被设置为相比于输出引线更靠近输入引线,输出侧被设置为相比于输入引线更靠近输出引线。根据第二方面,半导体芯片的特征在于半导体芯片包括被设置为与第一漏极接合组件间隔开并且电连接至第一漏极接合组件的第二漏极接合组件。该第二漏极接合组件被配置成用于安装将第二漏极接合组件电连接至其第二端接地的第一电容器的第一端的第二组多个接合线。
半导体芯片还被配置为RF功率放大器的上述半导体芯片。
根据第三方面,本发明涉及包括上述半导体芯片和/或RF功率放大器的电子设备或电子系统,例如用于移动通信的基站。
附图说明
接下来,参考附图来更详细地描述本发明,其中,使用相同的附图标记来表示相同或相似的部件或元件,并且其中:
图1A和1B分别示出了现有的封装式RF功率放大器的俯视图和截面侧视图;
图1C示出了图1A中的放大器的等效电路图;
图2A至图2D示出了根据本发明的半导体芯片的各种实施方式;
图3示出了图2A中的安装在封装件中以形成根据本发明的RF功率放大器的半导体芯片的截面侧视图;以及
图4A和图4B更详细地示出了图2A的实施方式。
具体实施方式
图2A和图2D示出了根据本发明的半导体芯片400的各种实施方式。图2A示出了其中第二漏极接合组件形成为接合杆100并且设置在第一漏极接合组件8和栅极接合组件9之间的实施方式。此外,第一漏极接合组件8和栅极接合组件9也形成为接合杆。
在图2A的实施方式中,栅极指状物7在接合杆100的下面延伸。在图2A的实施方式中,第一电容器C1被实现为位于半导体芯片400的输出侧附近的集成电容器105。更具体地,形成为金属绝缘体金属电容器(MIMCAP)或金属氧化物半导体电容器(MOSCAP)的集成电容器105设置在第一漏极接合组件8和半导体芯片400的与输出侧B相对应的边缘106之间。可选择地,可以在半导体400和输出引线1之间的半导体芯片107上设置另一电容器C3。连同在输出引线1和另一电容器C3的第一端之间延伸的接合线108,可以形成输出匹配网络。在此情况下,该另一电容器C3的第二端接地。应当注意,在一些实施方式中,不设置该另一电容器C3,或者该另一电容器C3集成在半导体芯片400上。
图2B示出了其中第二漏极接合组件设置在第一漏极接合组件8和栅极接合组件9之间的实施方式。此外,第二漏极接合组件被形成为多个间隔开的接合垫101。在此实施方式中,栅极指状物在接合垫101之间延伸。
图2C示出了其中栅极接合组件设置为在第一漏极接合组件8和第二漏极接合组件100之间的多个间隔开的接合垫103的实施方式。在此实施方式中,漏极指状物6在接合垫103之间延伸。类似于图2C,栅极指状物7可以延伸至接合垫103的两侧或者仅至接合垫103的其中一侧。
图2D示出了其中将栅极接合组件设置为在第一漏极接合组件8和第二接合组件100之间的接合杆102的实施方式。在此实施方式中,漏极指状物6在接合杆102的下方延伸。而且,栅极指状物7可以延伸至接合杆102的两侧或者仅至接合杆102的一侧。
图3示出了图2A中的安装在封装件中以形成根据本发明的RF功率放大器的半导体芯片的截面侧视图。图1C的等效电路图同样应用于本实施方式。然而,通过比较本实施方式与图1B的截面图,很明显L3和L4显示出更低的互感系数,这是由于与接合线14和15相关联的回路之间的较小的电磁耦合。同样,另一电容器107和接合线108的匹配设置也是可选的。
图4A和4B更详细地示出了图2A中的实施方式。更具体地,图4A示出了包括多个金属层(M1至M4)的金属层叠。金属层可以用于限定信号传输的模式。在此示例中,接合杆100形成在金属M4中,而且漏极指状物6和栅极指状物7形成在金属层M1中。如果这些指状物与其他结构互相干扰,则可以将指状物延伸到上金属层。可以设置通孔108A至108C以将不同金属层中的结构互相连接。例如,通孔108A至108C可以用于将接合杆100连接至漏极指状物6.
图4B示出了栅极指状物7如何在接合杆100底下通过并不进行电接触。如果第二漏极接合组件如图2B所示被设置为多个间隔开的接合垫101,则甚至可以将栅极指状物7设置在与接合垫101相同的金属层上。这有利于以降低栅极-漏极电容和/或栅极电阻。
本领域技术人员应当很容易理解本发明不限于四层金属层,并且可以使用更多或更少的层。
以上已经使用本发明的详细实施方式描述了本发明,对于本领域技术人员显而易见的是,在不脱离所附权利要求所限定的范围的情况下可以进行各种修改。
Claims (24)
1.一种封装式RF功率放大器,包括:
封装件,包括输出引线(1)和输入引线(2);
安装在所述封装件中的半导体芯片(400),所述半导体芯片(400)包括:
第一漏极接合组件(8);和
RF功率晶体管(5),所述功率晶体管(5)具有电连接至所述第一漏极接合组件的漏极;
第一组多个接合线(15),从所述第一漏极接合组件延伸至所述输出引线;
第一电容器(C1),被设置在所述封装件中并且具有第一端和第二接地端;以及
第二组多个接合线(14),将所述漏极电连接至所述第一电容器的第一端,
其中,所述半导体芯片包括设置为相比于所述输出引线更靠近所述输入引线的输入侧(A)和设置为相比于所述输入引线更靠近所述输出引线的输出侧(B),
其特征在于,
所述半导体芯片包括设置为与所述第一漏极接合组件间隔开并且电连接至所述第一漏极接合组件的第二漏极接合组件(100),其中,相比于所述第一漏极接合组件,所述第二漏极接合组件被设置为更靠近所述半导体芯片的输入侧,并且其中,所述第二组多个接合线从所述第二漏极接合组件延伸至所述第一电容器的第一端。
2.根据权利要求1所述的封装式RF功率放大器,其中,所述RF功率放大器具有漏极-源极输出电容(Cds),并且其中,所述第二组多个接合线的电感和所述第一电容器的电容被设置为使得在所述RF功率放大器的工作频率处或所述功率频率附近,所述第一电容器和所述第二组多个接合线的串联连接与所述输出电容产生谐振。
3.根据权利要求1或2所述的封装式RF功率放大器,其中,所述RF功率晶体管包括在所述第一漏极接合组件和所述第二漏极接合组件之间延伸的多个漏极指状物(6)。
4.根据前述权利要求中任一项所述的封装式RF功率放大器,还包括电连接至所述输入引线的栅极接合组件(9),并且其中,所述RF功率晶体管包括电连接至所述栅极接合组件的栅极以及多个栅极指状物(7),所述多个栅极指状物(7)从所述栅极接合组件延伸并且与所述漏极指状物叉指式设置。
5.根据权利要求4所述的封装式RF功率放大器,其中,相比于所述第二漏极接合组件,所述栅极接合组件被设置为更靠近所述输入侧。
6.根据权利要求5所述的封装式RF功率放大器,其中,所述第二漏极接合组件包括第一接合杆(101),并且其中,所述栅极指状物在所述第一接合杆底下延伸。
7.根据权利要求5所述的封装式RF功率放大器,其中,所述第二漏极接合组件包括多个间隔开的第一接合垫(102),并且其中,所述栅极指状物在所述第一接合垫之间延伸。
8.根据权利要求5至7中任一项所述的封装式RF功率放大器,其中,所述半导体芯片包括具有下金属层(M1和M2)和上金属层(M3和M4)的金属层叠,其中,相比于所述上金属层,所述下金属层被设置为更靠近所述半导体芯片的衬底的表面,其中,所述第一漏极接合组件和所述第二漏极接合组件以及所述栅极接合组件形成在所述上金属层中,并且其中,所述漏极指状物和所述栅极指状物形成在至少所述下金属层中。
9.根据权利要求8所述的封装式RF功率放大器,其中,所述半导体芯片包括将在所述上金属层中形成的第二漏极接合组件电连接至所述漏极指状物的多个通孔(108A至108C),并且其中,所述栅极指状物在所述通孔之间延伸。
10.根据权利要求4所述的封装式RF功率放大器,其中,相比于所述栅极接合组件,所述第二漏极接合组件被设置为更靠近所述输入侧。
11.根据权利要求10所述的封装式RF功率放大器,其中,所述栅极接合组件包括第二接合杆(102),并且其中,所述漏极指状物在所述第二接合杆底下延伸。
12.根据权利要求10所述的封装式RF功率放大器,其中,所述栅极接合组件包括多个间隔开的第二接合垫(103),并且其中,所述栅极指状物在所述第二接合垫之间延伸。
13.根据权利要求10至12中任一项所述的封装式RF功率放大器,其中,半导体芯片包括具有下金属层和上金属层的金属层叠,其中,相比于所述上金属层,所述下金属层被设置为更靠近所述半导体芯片的衬底的表面,其中,所述第一漏极接合组件和所述第二漏极接合组件以及所述栅极接合组件形成在所述上金属层中,并且其中,所述漏极指状物和所述栅极指状物形成在至少所述下金属层中。
14.根据权利要求13所述的封装式RF功率放大器,其中,半导体芯片包括将在所述上金属层中形成的栅极接合组件电连接至所述栅极指状物的多个通孔,并且其中,所述漏极指状物在所述通孔之间延伸。
15.根据前述权利要求中任一项所述的封装式RF功率放大器,其中,所述第一电容器形成在所述半导体芯片上。
16.根据权利要求1至14中任一项所述的封装式RF功率放大器,其中,所述第一电容器设置在所述半导体芯片与所述输出引线之间。
17.根据权利要求16所述的封装式RF功率放大器,还包括设置在所述封装件中介于所述半导体芯片和所述输出引线之间的另一半导体芯片(107),其中,所述第一电容器设置在所述另一半导体芯片上。
18.根据权利要求17所述的封装式RF功率放大器,其中,所述另一半导体芯片包括具有第一端和接地第二端的另一电容器(C3),所述封装式RF功率放大器还包括从所述输出引线延伸至所述另一电容器的第一端的一个或多个第三接合线(108)。
19.根据前述权利要求中任一项所述的封装式RF功率放大器,其中,所述工作频率在500MHz至40GHz的范围内。
20.根据前述权利要求中任一项所述的封装式RF功率放大器,其中,所述第一电容器的电容大于5pF,并且其中,所述第二组多个接合线的电感在0.05nH至5nH的范围内。
21.根据前述权利要求中任一项所述的封装式RF功率放大器,其中,所述半导体芯片包括硅基横向扩散金属氧化物半导体LDMOS晶体管或氮化镓基场效应管FET。
22.一种半导体芯片(4),能够安装在具有输入引线(2)和输出引线(1)的封装件中,所述半导体芯片包括:
第一漏极接合组件,被配置为用于安装从所述第一漏极接合组件延伸至所述输出引线的第一组多个接合线(15);
RF功率晶体管,具有电连接至所述第一漏极接合组件的漏极;
其中,所述半导体芯片包括输入侧和输出侧,在所述半导体芯片安装在所述封装件中时,所述输入侧被设置为相比于所述输出引线更靠近所述输入引线,所述输出侧被设置为相比于所述输入引线更靠近所述输出引线;
其特征在于,
所述半导体芯片包括设置为与所述第一漏极接合组件间隔开并且电连接至所述第一漏极接合组件的第二漏极接合组件,并且所述第二漏极接合组件被配置为用于安装将所述第二漏极接合组件电连接至第一电容器的第一端的第二组多个接合线,所述第一电容器的第二端接地。
23.根据权利要求22所述的半导体芯片,其中,所述半导体芯片被配置为根据权利要求1至21中任一项所限定的半导体芯片。
24.一种电子设备或电子系统,例如用于移动通信的基站,包括根据权利要求22至23中任一项所述的半导体芯片和/或根据权利要求1至21中任一项所述的RF功率放大器。
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US11621322B2 (en) * | 2020-07-30 | 2023-04-04 | Wolfspeed, Inc. | Die-to-die isolation structures for packaged transistor devices |
NL2027009B1 (en) | 2020-11-30 | 2022-07-04 | Ampleon Netherlands Bv | RF amplifier package |
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CN110034736B (zh) | 2023-07-04 |
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