CN109994433A - 半导体装置封装 - Google Patents

半导体装置封装 Download PDF

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Publication number
CN109994433A
CN109994433A CN201810446862.5A CN201810446862A CN109994433A CN 109994433 A CN109994433 A CN 109994433A CN 201810446862 A CN201810446862 A CN 201810446862A CN 109994433 A CN109994433 A CN 109994433A
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conductive column
semiconductor device
device packages
adhesive layer
support plate
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CN201810446862.5A
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CN109994433B (zh
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李育颖
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Advanced Semiconductor Engineering Inc
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Advanced Semiconductor Engineering Inc
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Priority to CN202310596239.9A priority Critical patent/CN116581164A/zh
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Abstract

一种半导体装置封装包含载板、第一导电柱以及第一粘合层。所述第一导电柱安置于所述载板上。所述第一导电柱包含面向所述载板的下表面、与所述下表面相对的上表面以及在所述上表面与所述下表面之间延伸的侧表面。所述第一粘合层包围所述第一导电柱的所述侧表面的一部分。所述第一粘合层包括导电粒子和粘合剂。所述第一导电柱具有从所述上表面到所述下表面所测量的高度以及宽度。所述高度大于所述宽度。

Description

半导体装置封装
技术领域
本公开涉及一种半导体装置封装和一种制造半导体装置封装的方法。
背景技术
由于在制造半导体装置封装的工艺中的热循环期间，导电柱与(基板的)导电垫之间的焊接材料熔融，因此半导体装置封装中的导电柱可能移动、倾斜或掉落。移动、倾斜或掉落的导电柱可致使半导体装置封装的可靠性问题。
发明内容
在一或多个实施例中，半导体装置封装包含载板(carrier)、第一导电柱以及第一粘合层。第一导电柱安置于载板上。第一导电柱包含面向载板的下表面、与下表面相对的上表面和在上表面与下表面之间延伸的侧表面。第一粘合层包围第一导电柱的侧表面的一部分。第一粘合层包括导电粒子和粘合剂。第一导电柱具有从上表面到下表面所测量的高度和宽度。所述高度大于所述宽度。
在一或多个实施例中，半导体装置封装包含载板、导电柱、第一粘合层和绝缘层。导电柱安置于载板上且包含侧表面。第一粘合层包围导电柱的侧表面的一部分。第一粘合层包含导电粒子和粘合剂。绝缘层封装导电柱且暴露导电柱的外部接触。
在一或多个实施例中，一种用于制造半导体装置的方法包含将包括导电粒子和粘合剂的粘合层安置于载板上；将预处理或预成型导电柱安置于粘合层上；以及固化粘合层。
附图说明
图1是根据本公开的一些实施例的半导体装置封装的截面图。
图2A是根据本公开的一些实施例的半导体装置封装的截面图。
图2B是图2B的半导体装置封装的截面图的示意图。
图3是根据本公开的一些实施例的半导体装置封装的截面图。
图4是根据本公开的一些实施例的半导体装置封装的截面图。
图5是根据本公开的一些实施例的半导体装置封装的截面图。
图6A是根据本公开的一些实施例的半导体装置封装的截面图。
图6B是根据本公开的一些实施例的半导体装置封装的截面图。
图7A说明制造根据本公开的一些实施例的半导体装置封装的方法的一或多个阶段。
图7B说明制造根据本公开的一些实施例的半导体装置封装的方法的一或多个阶段。
图7C说明制造根据本公开的一些实施例的半导体装置封装的方法的一或多个阶段。
贯穿图式和详细描述使用共同参考标号来指示相同或相似元件。本公开的实施例将从结合附图获取的以下详细描述中变得更显而易见。
具体实施方式
除非另外规定，否则例如“上”、“下”、“向上”、“左”、“右”、“向下”、“顶部”、“底部”、“竖直”、“水平”、“侧面”、“高于”、“下部”、“上部”、“上方”、“下方”等空间描述相对于图式中所示的定向而指示。应理解，本文中所使用的空间描述是出于说明的目的，并且本文中所描述的结构的实际实施方案可以任何定向或方式在空间上布置，其限制条件为本公开的实施例的优点不因此布置而有偏差。
图1是根据本公开的一些实施例的半导体装置封装1的截面图。半导体装置封装1包含载板10、粘合层30、电介质层40、垫60和导电柱80。粘合层30可包含例如导电胶。
导电柱80安置于载板10上。导电柱80可包含预成型导电柱。导电柱80包含面向载板10的下表面801b、与下表面801b相对的上表面801u和在上表面801u与下表面801b之间延伸的侧表面801s。在一些实施例中，电介质层40包含聚丙烯(PP)、聚酰亚胺(PI)、味之素堆积膜(Ajinomoto Build-up Film；ABF)、其它合适的绝缘材料或其两个或多于两个的组合。
在一些实施例中，载板10包含硅(Si)、陶瓷、玻璃、金属、其它合适的无机材料或其两个或多于两个的组合。载板10可为基板、晶片或引线框。在一些实施例中，垫60和导电柱80中的每一个包含例如铜(Cu)、其它金属、金属合金、其它导电材料或其两个或多于两个的组合。粘合层30包围导电柱80的侧表面801s的一部分。在一些实施例中，粘合层30包含导电填充物，例如导电粒子(例如，金(Au)、银(Ag)、Cu、另一金属、金属合金或其它导电材料)和粘合剂(例如环氧树脂或其它树脂)。
在一些实施例中，粘合层30的粘合剂的热分解温度(Td)可高于回流工艺中的回流温度。粘合层30的粘合剂的熔融温度可高于回流工艺中的回流温度。举例来说，粘合层30的熔融温度可高于约260摄氏度(℃)。因此，在回流工艺期间，粘合层30不会在约25℃到约260℃范围内的工作温度下熔融或回流。导电柱80的侧表面801s的至少一部分可由具有相对较高熔融点的粘合层30包围，可在制造半导体装置封装1的工艺中的热循环期间固定或支撑导电柱80。
导电柱80具有从上表面801u到下表面801b所测量的高度H。在一些实施例中，高度H在约410微米(μm)到约490μm的范围内。导电柱80具有宽度D1。在一些实施例中，宽度D1在约270μm到约330μm的范围内。导电柱80的高度H大于导电柱80的宽度D1。下表面801b的粗糙度可能不同于侧表面801s。在一些实施例中，下表面801b的粗糙度大于侧表面801s。导电柱80的高度H与导电柱80的宽度D1的比率可能等于或大于约1.2:1，例如约1.3:1或更大、约1.4:1或更大、或约1.5:1或更大。导电柱80的下表面801b的相对较大粗糙度可提高下表面801b与粘合层30之间的粘合力和导电性。在一些实施例中，粘合层30的相对较大尺寸的导电填充物(例如，导电粒子)与下表面801b和垫60接触。可将粘合层30的相对较小尺寸的导电填充物装配到导电柱80的不均匀表面801b中来缓解导电柱80的下表面801b处的空隙问题。
垫60安置于载板10与导电柱80之间。电介质层40和垫60安置于载板10上。电介质层40限定暴露垫60的开口401p。垫60可为导电垫。导电柱80通过粘合层30而电连接到垫60。导电柱80通过开口401p中的粘合层30来电连接到垫60。在一些实施例中，导电柱80不与垫60直接接触，其间具有间隙。在一些其它实施例中，下表面801b的至少一部分与垫60直接接触。
电介质层40的开口401p的长度D2与导电柱80的宽度D1之间的差值可等于或大于约70μm。导电柱80的下表面801b安置于开口401p内。导电柱80的一部分可安置于电介质层40上。电介质层40的开口401p的长度D2与导电柱80的宽度D1之间的差值可能大于约70μm使得导电柱80的侧表面801s的一部分可由粘合层30来包围和支撑。
在一些实施例中，一个或多个导电柱可能相对于载板的表面法线而稍微倾斜。图2A是根据本公开的一些实施例的半导体装置封装2的截面图。半导体装置封装2包含载板10、粘合层30和32、电介质层40、垫60和62以及导电柱80和82。粘合层30可包含例如导电胶。
导电柱80和82安置于载板10上。导电柱80包含面向载板10的下表面801b、与下表面801b相对的上表面801u和在上表面801u与下表面801b之间延伸的侧表面801s。类似地，导电柱82包含面向载板10的下表面821b、与下表面821b相对的上表面821u和在上表面821u与下表面821b之间延伸的侧表面821s。在一些实施例中，电介质层40包含PP、PI、ABF、其它合适的绝缘材料或其两个或多于两个的组合。在一些实施例中，载板10包含Si、陶瓷、玻璃、金属、其它合适的无机材料或其两个或多于两个的组合。在一些实施例中，垫60和62以及导电柱80和82中的每一个包含例如Cu、其它金属、金属合金、其它导电材料或其两个或多于两个的组合。
粘合层30包围导电柱80的侧表面801s的一部分。粘合层32包围导电柱82的侧表面821s的一部分。在一些实施例中，粘合层30包含导电填充物，例如导电粒子(例如，Au、Ag或Cu)和粘合剂(例如环氧树脂)。导电柱80的侧表面801s的至少一部分可由具有相对较高熔融点的粘合层30包围，且可在制造半导体装置封装2的工艺中的热循环期间固定或支撑导电柱80。类似地，导电柱82的侧表面821s的至少一部分可由具有相对较高熔融点的粘合层32包围，且可在制造半导体装置封装2的工艺中的热循环期间固定或支撑导电柱82。
如图2A中所展示，导电柱80具有竖直几何中心轴A以及垫60具有竖直几何中心轴B。垫60的竖直几何中心轴B可能平行于载板10的表面法线。导电柱82具有竖直几何中心轴A'以及垫62具有竖直几何中心轴B'。垫62的竖直几何中心轴B'可能平行于载板10的表面法线。在一些实施例中，垫60的竖直几何中心轴B与垫62的竖直几何中心轴B'之间的距离(也称为间距)可为约400μm。
导电柱80的竖直几何中心轴A与垫60的竖直几何中心轴B之间的倾斜角可能等于或小于约5度，例如约4度或更小、或约3度或更小。导电柱82的竖直几何中心轴A'与垫62的竖直几何中心轴B'之间的倾斜角可能等于或小于约5度，例如约4度或更小、或约3度或更小。由导电柱80的竖直几何中心轴A相对于垫60的竖直几何中心轴B限定的倾斜角可能等于或小于约5度且可帮助避免相邻两个导电柱80和82的桥接(短路)。
图2B是图2A的半导体装置封装2的截面图的示意图。在一些实施例中，半导体装置封装2的两个导电柱80与82之间的最小距离D3可为约21.56μm。半导体装置封装2的两个导电柱80与82的底部之间的距离D4可为约100μm。
图3是根据本公开的一些实施例的半导体装置封装3的截面图。半导体装置封装3类似于图1的半导体装置封装1，除粘合层30安置于电介质层40的顶表面上以外。相同编号组件中的一些不再相对于图3描述。半导体装置封装3包含载板10、粘合层30、电介质层40、垫60和导电柱80。
在一些实施例中，粘合层30包含导电填充物，例如导电粒子(例如，Au、Ag或Cu)和粘合剂(例如环氧树脂)。粘合层30的粘合剂的热分解温度(Td)可能高于回流工艺中的回流温度。粘合层30的粘合剂的熔融温度可高于回流工艺中的回流温度。举例来说，粘合层30的熔融温度可能大于约260℃。垫60安置于载板10与导电柱80之间。电介质层40和垫60安置于载板10上。电介质层40限定暴露垫60的开口401p。导电柱80通过粘合层30而电连接到垫60。导电柱80通过开口401p中的粘合层30而电连接到垫60。
在上表面801u与下表面801b之间延伸的侧表面801s的一部分可由粘合层30支撑。粘合层30未安置于电介质层40的顶表面上。粘合层30与电介质层40的开口401p的侧壁的一部分接触。
图4是根据本公开的一些实施例的半导体装置封装4的截面图。半导体装置封装4类似于图1的半导体装置封装1，除粘合层30的一部分安置于电介质层40的顶表面上以外。相同编号组件中的一些不再相对于图4描述。半导体装置封装4包含载板10、粘合层30、电介质层40、垫60和导电柱80。
导电柱80安置于载板10和电介质层40上。导电柱80包含面向载板10的下表面801b、与下表面801b相对的上表面801u和在上表面801u与下表面801b之间延伸的侧表面801s。粘合层30包围导电柱80的侧表面801s的一部分。粘合层30的一部分安置于电介质层40的顶表面上。
电介质层40限定暴露垫60的开口401p。导电柱80通过粘合层30而电连接到垫60。导电柱80安置于电介质层40的顶表面上方。导电柱80通过开口401p中的粘合层30来电连接到垫60。
图5是根据本公开的一些实施例的半导体装置封装5的截面图。半导体装置封装5包含半导体装置封装2a、半导体装置封装2b、半导体装置封装2c、电子组件20、绝缘层70以及焊料凸块90。
半导体装置封装2a、2b和2c类似于图1的半导体装置封装1，且相同编号组件中的至少一些不再相对于图5描述。半导体装置封装2a包含导电柱80a和82a、粘合层30a和32a、电介质层40、以及垫60a和62a。半导体装置封装2b包含导电柱80b和82b、粘合层30b和32b、电介质层40以及垫60b和62b。半导体装置封装2c包含导电柱80c、粘合层32c、电介质层40以及垫60c。
导电柱80c可安置于电子组件20下方。导电柱80c由粘合层32c支撑。粘合层32c包含导电填充物和绝缘材料。电子组件20安置于载板10上。电子组件10邻近于导电柱80a、82a、80b和82b。绝缘层70封装电子组件20以及导电柱80a、82a、80b和82b。举例来说，绝缘层70封装导电柱80a、80b、82a和82b以及暴露导电柱80a、80b、82a和82b的外部触点的顶表面。在一些实施例中，对应于粘合层30a的导电柱80a的下表面的粗糙度不同于导电柱80a的侧表面的粗糙度。导电柱80a的下表面的粗糙度可能大于导电柱80a的侧表面的粗糙度。在一些实施例中，导电柱80c的竖直几何中心轴与垫60c的竖直几何中心轴之间的倾斜角可等于或小于5度。
图6A是根据本公开的一些实施例的半导体装置封装6a的截面图。半导体装置封装6a类似于图1的半导体装置封装1，并且不再相对于图6描述相同编号组件中的一些。半导体装置封装6a包含载板10、粘合层30、电介质层40、垫60以及导电柱80。
在一些实施例中，垫60包含层90、91和92。在一些实施例中，层90可包含例如铝(Al)、其它金属、金属合金、其它导电材料或其两个或多于两个的组合。在一些实施例中，层91可包含例如钛(Ti)、其它金属、金属合金、其它导电材料或其两个或多于两个的组合。在一些实施例中，层92可包含例如Cu、其它金属、金属合金、其它导电材料或其两个或多于两个的组合。在一些实施例中，粘合层30包含导电填充物，例如导电粒子(例如，Au、Ag或Cu)和粘合剂(例如环氧树脂)。导电柱80的侧表面801s的一部分由粘合层30支撑。导电柱80的侧表面801s的一部分是由具有相对较高熔融点的粘合层30包围，且可在制造半导体装置封装6a的工艺中的热循环期间固定或支撑导电柱80。
图6B是根据本公开的一些实施例的半导体装置封装6b的截面图。半导体装置封装6b似于图1的半导体装置封装1，并且不再相对于图6B描述相同编号组件中的一些。半导体装置封装6b包含载板10、电介质层40、垫60'以及导电柱80。
在一些实施例中，垫60'包含层90、91、92、92'、93和94。在一些实施例中，层90可包含例如Al、或其它金属、金属合金、其它导电材料或其两个或多于两个的组合。在一些实施例中，层91可包含例如Ti、或其它金属、金属合金、其它导电材料或其两个或多于两个的组合。在一些实施例中，层92可为晶种层，所述晶种层包含例如Cu、或其它金属、金属合金、其它导电材料或其两个或多于两个的组合。在一些实施例中，层92'可包含例如Cu、或其它金属、金属合金、其它导电材料或其两个或多于两个的组合。
在一些实施例中，层93可包含例如镍(Ni)、或其它金属、金属合金、其它导电材料或其两个或多于两个的组合。在一些实施例中，层93可包含例如锡(Sn)、或其它金属、金属合金、其它导电材料或其两个或多于两个的组合。Sn层93具有相对较低熔融点。导电柱80可能在制造半导体装置封装6b的工艺中的热循环期间倾斜，由于层93可能回流。
图7A到7C说明制造半导体装置封装1的方法的各个阶段。参考图7A，提供载板10。在一些实施例中，载板10包含Si、陶瓷、玻璃、金属、其它合适的无机材料或其两个或多于两个的组合。
参考图7B，垫60安置于载板10的顶表面上。在一些实施例中，垫60包含例如Cu、或其它金属、金属合金、其它导电材料或其两个或多于两个的组合。电介质层40安置于载板10的顶表面上且覆盖垫60的至少一部分。在一些实施例中，电介质层40包含PP、PI、ABF、其它合适的绝缘材料或其两个或多于两个的组合。电介质层40限定暴露垫60的开口401p。电介质层40的开口401p具有长度D2。粘合层30安置于开口401p中且从电介质层40的顶表面中突出。在一些实施例中，粘合层30包含导电填充物，例如导电粒子(例如，Au、Ag或Cu)和粘合剂(例如环氧树脂)。安置粘合层可包含提供漏印板来使载板10的垫60上的粘合层30印刷具有由漏印板限定的图案。漏印板可包含开口来对齐预处理导电柱80来通过漏印板的开口连接粘合层30。
粘合层30的粘合剂的热分解温度(Td)可能高于回流工艺中的回流温度。粘合层30的粘合剂的熔融温度可高于回流工艺中的回流温度。在一些实施例中，粘合层30的熔融温度可能大于约260℃。
参考图7C，预处理或预成型导电柱80安置于粘合层30上。安置预处理导电柱80可包含在固化粘合层30之前将预处理导电柱80按压到粘合层30中。在一些实施例中，导电柱80包含例如Cu、其它金属、金属合金、其它导电材料或其两个或多于两个的组合。导电柱80的下表面801b是粗糙的。导电柱80的下表面801b其上可具有一些较小空隙。可将粘合层30的至少一部分填充到下表面801b的空隙中。可将粘合层30的相对较小尺寸的导电填充物装配到导电柱80的不均匀表面801b中来缓解空隙问题。导电柱80的下表面801b的相对较大粗糙度可提高下表面801b与粘合层30之间的粘合力和导电性。粘合层30的相对较大尺寸的导电填充物与下表面801b和垫60接触。将导电柱80安置到粘合层30中之后，粘合层30经固化(例如，经硬化)。接着，获得图1的半导体装置封装1。导电柱80的侧表面801s的一部分是由具有相对较高熔融点的粘合层30包围，且可在制造半导体装置封装1的工艺中的热循环期间固定或支撑导电柱80。
如本文所使用，术语“近似”、“大体上”、“大量的”和“约”用于描述及解释较小变化。当与事件或情况结合使用时，所述术语可指事件或情况精确发生的例子以及事件或情况极近似地发生的例子。举例来说，当结合数值使用时，术语可指小于或等于数值的±10％的变化，例如，小于或等于±5％、小于或等于±4％、小于或等于±3％、小于或等于±2％、小于或等于±1％、小于或等于±0.5％、小于或等于±0.1％、或小于或等于±0.05％。因此，术语参考两个值“大致相等”可指两个值的比率处于0.9与1.1之间的范围内并包括0.9和1.1。
另外，有时在本文中以范围格式呈现量、比率和其它数值。应理解，此范围格式是为了便利和简洁而使用，且应灵活地理解，不仅包含明确地指定为范围极限的数值，而且包含涵盖于那个范围内的所有个别数值或子范围，如同明确地指定每一数值和子范围一般。
如本文所用，除非上下文另外明确规定，否则单数术语“一(a/an)”和“所述”可包含复数指示物。在一些实施例的描述中，提供于另一组件“上”或“上方”的组件可涵盖前一组件直接在后一组件上(例如，与后一组件物理接触)的情况，以及一或多个中间组件位于前一组件与后一组件之间的情况。
尽管已参考本公开的特定实施例描述并说明本公开，但这些描述和说明并不限制本公开。所属领域的技术人员应理解，可在不脱离如由所附权利要求书界定的本发明的真实精神和范围的情况下，作出各种改变且取代等效物。所述图式可能未必按比例绘制。由于制造工艺及公差，本发明中的艺术再现与实际设备之间可存在区别。可存在并未具体说明的本公开的其它实施例。应将本说明书和图式视为说明性而非限定性的。可进行修改，以使特定情形、材料、物质组成、方法或工艺适宜于本公开的目标、精神和范围。所有此类修改是既定在所附权利要求书的范围内。虽然本文所公开的方法已参考按特定次序执行的特定操作加以描述，但应理解，可在不脱离本公开的教示的情况下组合、细分或重新排序这些操作以形成等效方法。因此，除非本文中特别指示，否则操作的次序和分组并不限制本公开。

Claims (23)

1.一种半导体装置封装，其包括：
载板(carrier)；
第一导电柱，其安置于所述载板上，所述第一导电柱包含面向所述载板的下表面、与所述下表面相对的上表面以及在所述上表面与所述下表面之间延伸的侧表面；及
第一粘合层，其包围所述第一导电柱的所述侧表面的一部分，所述第一粘合层包括导电粒子和粘合剂；
其中所述第一导电柱具有从所述上表面到所述下表面所测量的高度以及宽度，且所述高度大于所述宽度。
2.根据权利要求1所述的半导体装置封装，其中所述下表面的粗糙度不同于所述侧表面的粗糙度。
3.根据权利要求1所述的半导体装置封装，其中所述下表面的粗糙度大于所述侧表面的粗糙度。
4.根据权利要求1所述的半导体装置封装，其进一步包括安置于所述载板与所述第一导电柱之间的垫，且其中所述第一导电柱的竖直几何中心轴与所述垫的竖直几何中心轴之间的倾斜角等于或小于5度。
5.根据权利要求1所述的半导体装置封装，其进一步包括安置于所述载板上的电介质层和垫，其中所述电介质层限定暴露所述垫的开口，且所述第一导电柱通过所述第一粘合层而电连接到所述垫。
6.根据权利要求5所述的半导体装置封装，其中所述电介质层的所述开口的长度与所述第一导电柱的所述宽度之间的差值等于或大于70微米(μm)。
7.根据权利要求5所述的半导体装置封装，其中所述第一导电柱的所述下表面安置于所述开口内。
8.根据权利要求5所述的半导体装置封装，其中所述第一导电柱的一部分安置于所述电介质层上，以及所述第一导电柱通过所述开口中的所述第一粘合层而电连接到所述垫。
9.根据权利要求1所述的半导体装置封装，其中所述第一导电柱的所述高度与所述第一导电柱的所述宽度的比率等于或大于1.2:1。
10.根据权利要求1所述的半导体装置封装，其中所述第一粘合层的所述粘合剂的热分解温度高于回流工艺中的回流温度。
11.根据权利要求10所述的半导体装置封装，其中所述粘合层的所述粘合剂的熔融温度高于回流工艺中的回流温度。
12.根据权利要求11所述的半导体装置封装，其中所述熔融温度高于260摄氏温度(℃)。
13.根据权利要求1所述的半导体装置封装，其中所述载板是基板、晶片或引线框。
14.根据权利要求1所述的半导体装置封装，其进一步包括：
电子组件，其安置于所述载板上，所述电子器件邻近于所述第一导电柱；以及
绝缘层，其封装所述电子组件和所述第一导电柱。
15.根据权利要求14所述的半导体装置封装，其进一步包括安置在所述电子组件下方的第二导电柱和包围所述第二导电柱的侧表面的一部分的第二粘合层，其中所述第二粘合层包含导电填充物和绝缘材料。
16.一种半导体装置封装，其包括：
载板；
导电柱，其安置于所述载板上且包含侧表面；
第一粘合层，其包围所述导电柱的所述侧表面的一部分，所述第一粘合层包括导电粒子和粘合剂；以及
绝缘层，其封装所述导电柱且暴露所述导电柱的外部接触。
17.根据权利要求16所述的半导体装置封装，其中对应于所述粘合层的所述导电柱的下表面的粗糙度不同于所述导电柱的所述侧表面的粗糙度。
18.根据权利要求17所述的半导体装置封装，其中所述下表面的粗糙度大于所述侧表面的粗糙度。
19.根据权利要求16所述的半导体装置封装，其进一步包括安置于所述载板与所述导电柱之间的垫，且其中所述导电柱的竖直几何中心轴与所述垫的竖直几何中心轴之间的倾斜角等于或小于5度。
20.一种用于制造半导体装置的方法，其包括：
将包括导电粒子和粘合剂的粘合层安置于载板上；
将预成型导电柱安置于所述粘合层上；以及
固化所述粘合层。
21.根据权利要求20所述的方法，其进一步包括提供漏印板来印刷所述载板的垫上的所述粘合层。
22.根据权利要求20所述的方法，其进一步包括提供漏印板，所述漏印板包含对齐所述预成型导电柱的开口来通过所述开口连接所述粘合层。
23.根据权利要求22所述的方法，其进一步包括将所述预成型导电柱按压到所述粘合层中。
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US10741482B2 (en) 2020-08-11
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