CN109979406A - Driving circuit, display device and voltage compensation control method - Google Patents

Driving circuit, display device and voltage compensation control method Download PDF

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Publication number
CN109979406A
CN109979406A CN201910241129.4A CN201910241129A CN109979406A CN 109979406 A CN109979406 A CN 109979406A CN 201910241129 A CN201910241129 A CN 201910241129A CN 109979406 A CN109979406 A CN 109979406A
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China
Prior art keywords
offset voltage
driving signal
grayscale value
circuit
original driving
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CN201910241129.4A
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CN109979406B (en
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熊志
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HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
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HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3696Generation of voltages supplied to electrode drivers

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

The application relates to a driving circuit, a display device and a voltage compensation control method. Wherein, drive circuit includes: the device comprises a compensation voltage generating circuit, a digital-to-analog conversion circuit, an operational amplification circuit and a buffer; the digital-to-analog conversion circuit is used for acquiring an original driving signal output by the time schedule controller, performing digital-to-analog conversion on the original driving signal and outputting the converted driving signal to the in-phase input end of the operational amplification circuit; the compensation voltage generating circuit is used for generating compensation voltage according to the polarity and the gray-scale value of the original driving signal and outputting the compensation voltage to the non-inverting input end of the operational amplifying circuit, and the compensation voltage is used for compensating pixel electrode voltage drop caused by high-low level change of a scanning voltage signal of the display panel; the output end of the operational amplification circuit is connected with the non-inverting input end of the buffer, the inverting input end of the buffer is connected with the output end of the buffer, and the output end of the buffer is used for being connected with a data line of the display panel. When the display is driven by the driving signal provided by the driving circuit, the display does not flicker.

Description

Driving circuit, display device and voltage compensation method
Technical field
The present invention relates to display actuation techniques fields, more particularly to a kind of driving circuit, display device and voltage compensation Control method.
Background technique
Here statement only provides background information related with the application, without inevitably constituting the prior art.
(Thin Film Transistor Liquid Crystal Display, tft liquid crystal are aobvious by TFT-LCD Show device) it is one of the principal item that current flat panel is shown, have become modern IT, display platform important in video product. TFT-LCD Panel (film crystal liquid crystal display panel 1) is by binding technology by PCB (Printed Circuit Board, printed circuit board 3), Source Driver IC (data driving chip 2) and LCD CELL (liquid crystal cell) be connected with It constitutes TFT-LCD display system (as shown in Figure 1);TFT-LCD is used as data-driven using data driving chip 2, to display surface The data line of plate 1 provides data voltage signal, provides scanning voltage signal to the scan line of display panel 1 with scanning chip.By In the effect of gate-source parasitic capacitance Cgs, when scanning voltage signal switchs to low level by high level, the corresponding pixel electricity of source electrode There is certain reduction when pole tension Vs is compared with transistor turns, leads to load, display surface unstable in the pixel voltage at liquid crystal both ends Plate flashes when showing.In order to solve this problem, currently, normal open, which overregulates, reduces common voltage Vcom, so that scanning voltage signal By high level be lower level when liquid crystal both ends pixel voltage Vs-Vcom be able to maintain unanimously, but this common voltage is fixed Vcom declines the design of some value, when pixel electrode voltage Vs changes, since the size of parasitic capacitance Clc is by liquid crystal both ends Pixel voltage Vs-Vcom influence, so Δ V will change, Vs-Vcom will lead to not being adjusted in synchronism and be consistent, show production Raw flashing.
Summary of the invention
Based on this, it is necessary in example technique since pixel voltage Vs-Vcom can not follow Vs to change same step Section, and the problem of flashing when leading to display provide a kind of driving circuit, display device and voltage compensation method.
On the one hand, the embodiment of the invention provides a kind of driving circuits, comprising: offset voltage generative circuit, digital-to-analogue conversion Circuit, operational amplification circuit and buffer;
D/A converting circuit is used to obtain the original driving signal of sequence controller output, and original driving signal is carried out It is exported after digital-to-analogue conversion to the non-inverting input terminal of operational amplification circuit;
Offset voltage generative circuit is used to generate offset voltage according to the polarity and grayscale value of original driving signal, and exports Offset voltage to operational amplification circuit non-inverting input terminal, wherein offset voltage be used for compensate display panel scanning voltage letter Pixel electrode voltage caused by when the variation of number low and high level falls;
The output end of operational amplification circuit is separately connected the same mutually defeated of the inverting input terminal of operational amplification circuit and buffer Enter end;
The inverting input terminal of buffer and the output end of buffer connect, and the output end of buffer is for connecting display surface The data line of plate.
Offset voltage generative circuit is used for the grayscale value in original driving signal preset in one of the embodiments, When in the first relation table, then the first relation table is looked into according to the polarity of original driving signal and grayscale value, generates offset voltage, In, the first relation table is used to characterize polarity, grayscale value and the offset voltage relationship of original driving signal.
In one of the embodiments, in the first relation table each grayscale value according to descending order, the adjacent ash of every two Rank value forms a grayscale section;
Offset voltage generative circuit is used for when the grayscale value of original driving signal is not in the first relation table, then according to original The polarity of beginning driving signal determines the grayscale at grayscale value locating grayscale section both ends in the first relation table of original driving signal Value corresponding the first offset voltage and the second offset voltage, grayscale value, the first offset voltage further according to original driving signal With the second offset voltage according to linear internal difference model, the grayscale value at grayscale section both ends generates offset voltage.
Offset voltage generative circuit includes: processor and memory in one of the embodiments,;
Memory is for storing the first relation table and linear internal difference model;
The first end of processor is for connecting sequence controller, and the second end of processor is connect with memory, processor Third end connects the non-inverting input terminal of operational amplification circuit, and processor is used to determine the grayscale value of original driving signal preset When in the first relation table, the first relation table is looked into according to the polarity of original driving signal, grayscale value, generates offset voltage;
When processor is also used to determine grayscale value not in the first relation table, then determined according to the polarity of original driving signal The grayscale value of original driving signal first compensation electricity corresponding to the grayscale value at locating grayscale section both ends in the first relation table Pressure and the second offset voltage, further according to the grayscale value of original driving signal, the grayscale value at grayscale section both ends, the first offset voltage With the second offset voltage according to linear internal difference model, offset voltage is generated.
Driving circuit in one of the embodiments, further include:
First resistor is serially connected between the non-inverting input terminal of operational amplification circuit and the output end of D/A converting circuit;
Second resistance, be serially connected in operational amplification circuit non-inverting input terminal and offset voltage generative circuit output end it Between;
3rd resistor is serially connected between the inverting input terminal of operational amplification circuit and ground;
4th resistance is serially connected between the inverting input terminal of operational amplification circuit and the output end of operational amplification circuit;
First resistor, second resistance, the resistance value of 3rd resistor and the 4th resistance are equal.
On the other hand, the embodiment of the invention also provides a kind of display device, including sequence controller, display panel and on Driving circuit is stated, sequence controller is for providing original driving signal.
Display panel includes glass substrate in one of the embodiments,;Driving circuit is arranged on the glass substrate, and drives Dynamic circuit is electrically connected with glass substrate.
A kind of voltage compensation method, comprising:
Obtain the original driving signal of sequence controller output;
Digital-to-analogue conversion is carried out to original driving signal;
Offset voltage is generated according to the polarity of original driving signal and grayscale value;
Original driving signal and offset voltage after logarithmic mode conversion carry out plus and minus calculation, obtain compensated driving letter Number;
Wherein, pixel electricity caused by when the scanning voltage signal low and high level that offset voltage is used to compensate display panel changes Pole tension falls.
The step of generating offset voltage according to the polarity of original driving signal and grayscale value in one of the embodiments, is wrapped It includes:
If the grayscale value of original driving signal is in the first relation table, according to the polarity and grayscale of original driving signal Value looks into the first relation table, generates offset voltage, wherein the first relation table is used to characterize polarity, the grayscale value of original driving signal With offset voltage relationship.
The step of generating offset voltage according to the polarity of original driving signal and grayscale value in one of the embodiments, is wrapped It includes:
If the grayscale value of original driving signal is not in the first relation table, it is determined that the grayscale value of original driving signal exists First offset voltage corresponding to the grayscale value at locating grayscale section both ends and the second offset voltage in first relation table, further according to The grayscale value of original driving signal, the grayscale value at grayscale section both ends, the first offset voltage and the second offset voltage are according to linear Internal difference model generates offset voltage.
One or more embodiment provided by the invention at least has the advantages that the digital-to-analogue conversion in driving circuit Circuit obtains the original driving signal of sequence controller output, and exports after original driving signal is carried out digital-to-analogue conversion to operation The non-inverting input terminal of amplifying circuit, meanwhile, offset voltage generative circuit is generated according to the polarity and grayscale value of original driving signal Offset voltage, and the inverting input terminal of the offset voltage to operational amplification circuit is exported, by the operation of operational amplification circuit, obtain To compensated driving signal, which is delivered to the data line of display panel through buffer.The present invention is real The driving circuit that example offer is provided, by carrying out dynamic adjustment to original driving signal in front end, to make up since scanning voltage is believed Number high level be lower level when caused by pixel electrode voltage fall so that the pixel voltage at liquid crystal both ends is able to maintain one It causes, promotes display quality.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of liquid crystal display-driving system in an example;
Fig. 2 is the schematic diagram of driving circuit internal structure and display panel connection relationship in an example technique;
Fig. 3 is the relation schematic diagram in an example technique between data line, scan line, pixel and parasitic capacitance;
Fig. 4 is the structural schematic diagram of driving circuit in one embodiment;
Fig. 5 is the schematic diagram of the first relation table in one embodiment;
Fig. 6 is the structural schematic diagram of driving circuit and controller in one embodiment;
Fig. 7 is the structural schematic diagram of display device in one embodiment;
Fig. 8 is the flow diagram of voltage compensation method in one embodiment;
Fig. 9 is the flow diagram of voltage compensation method in another embodiment.
Specific embodiment
To facilitate the understanding of the present invention, a more comprehensive description of the invention is given in the following sections with reference to the relevant attached drawings.In attached drawing Give preferred embodiment of the invention.But the invention can be realized in many different forms, however it is not limited to this paper institute The embodiment of description.On the contrary, purpose of providing these embodiments is make it is more thorough and comprehensive to the disclosure.
It should be noted that it can be directly to separately when an element is considered as " connection " another element One element and it is in combination be integrated, or may be simultaneously present centering elements.Term as used herein " installation ", " one End ", " other end " and similar statement are for illustrative purposes only.
Unless otherwise defined, all technical and scientific terms used herein and belong to technical field of the invention The normally understood meaning of technical staff is identical.Term as used herein in the specification of the present invention is intended merely to description tool The purpose of the embodiment of body, it is not intended that in the limitation present invention.Term " and or " used herein includes one or more phases Any and all combinations of the listed item of pass.
In an example technique, the internal structure of driving circuit using digital-to-analogue conversion 21 often as shown in Fig. 2, connected slow The structure for rushing device 22 provides data voltage signal for data line.
When scanning voltage signal is high level, transistor turns, corresponding data voltage signal load is in transistor Pixel electrode 23 influences the factor that each sub-pixel is shown, in addition to being that (Vcom is Vs-Vcom for driving the pixel voltage of display The common voltage loaded on public electrode), there are also capacitor Cst, Clc and Cgs as shown in Figure 3.When scanning voltage signal is by upper When the high level of one frame jumps to low level, due to charge conservation and parasitic capacitance Cgs effect and feedthrough effect (feed Though effect), pixel electrode voltage Vs is when scanning voltage signal is low level while turning off (transistor), compared to scanning electricity Pressure signal reduces when being high level
Fallen in example technique by reducing common voltage Vcom to compensate this portion voltage.But by common electrical pressing The design that Vcom declines some value is determined, when pixel electrode voltage Vs changes, since the size of parasitic capacitance Clc is by liquid crystal two The pixel voltage Vs-Vcom at end influences, so Δ V will change, Vs-Vcom will lead to not being adjusted in synchronism and be consistent, display Generate flashing.
The embodiment of the invention provides a kind of a kind of driving circuits as shown in Figure 4, comprising: offset voltage generative circuit 43, D/A converting circuit 42, operational amplification circuit 44 and buffer 45;D/A converting circuit 42 is for obtaining sequence controller 41 The original driving signal of output, and output is same mutually defeated to operational amplification circuit 44 after original driving signal is carried out digital-to-analogue conversion Enter end;Offset voltage generative circuit 43 is used to generate offset voltage according to the polarity and grayscale value of original driving signal, and exports Offset voltage to operational amplification circuit 44 non-inverting input terminal, wherein offset voltage is used to compensate the scanning voltage of display panel 46 Voltage Drop of pixel electrode caused by when signal low and high level changes;The output end of operational amplification circuit 44 is separately connected operation The inverting input terminal of amplifying circuit 44 and the non-inverting input terminal of buffer 45, inverting input terminal and the buffer 45 of buffer 45 Output end connection, and the output end of buffer 45 is used to connect the data line of display panel.
Wherein, offset voltage generative circuit 43 is to refer to generate offset voltage to compensate due to scanning voltage signal height When level change (high level Vgh switchs to low level Vgl), capacitor acts on pixel electrode caused by under (capacitor Cst, Cgs and Clc) The circuit that 46 voltage Vs fall.D/A converting circuit 42 (Digital Analog Converter, D/A converter or DAC) refers to Discrete digital quantity is converted to the circuit of the analog quantity of connection variation.The effect of buffer 45 is sent to for temporarily storing The data of display panel can coordinate the data processing speed between buffering drive circuit inside and this kind of peripheral hardware of display panel Degree, realizes the synchronization of data transmission.
Specifically, being directed in traditional technology, the mode of common voltage to some definite value is reduced, in 46 voltage of pixel electrode When variation, adjustment can not be followed by loading the pixel voltage at liquid crystal both ends, lead to still have scintillation when display.This hair The driving circuit that bright embodiment provides, internal offset voltage generative circuit 43 receive the original driving from sequence controller 41 The polarity and grayscale value of signal, generate corresponding offset voltage.In addition, driving circuit is internally integrated an operational amplification circuit 44, operational amplification circuit 44 is electric by its non-inverting input terminal received original driving signal and compensation through data converting circuit conversion After pressure carries out operation, output is by modified data drive signal to buffer 45, and after 45 coordinative role of buffer, output is extremely The data line of display panel drives the display of each sub-pixel on display panel.Using driving circuit provided in an embodiment of the present invention, It can assess its brought 46 voltage Vs's of pixel electrode by the characteristic in front end according to the original driving signal of present frame Fall degree, to generate a corresponding offset voltage, compensates the 46 voltage Δ V of pixel electrode that may fall, keep liquid crystal two The consistency of the pixel voltage Vs-Vcom at end promotes display quality.
Offset voltage generative circuit 43 is used for the grayscale value in original driving signal default in one of the embodiments, The first relation table in when, then the first relation table is looked into according to the polarity of original driving signal and grayscale value, generates offset voltage, In, the first relation table is used to characterize polarity, grayscale value and the offset voltage relationship of original driving signal.
Specifically, offset voltage generative circuit 43 can be according to the process that original driving signal generates offset voltage, lead to The means such as experiment are crossed, measure the 46 voltage Vs of pixel electrode of some grayscale values and the lower display panel of polarity effect falls value Δ V, Obtain the first relation table as shown in Figure 5.Then during the work time, offset voltage generative circuit 43 is according to sequence controller 41 The grayscale value of the original driving signal sent, judges the value whether in the relation table of storage, if looking into the first relation table Table determines corresponding offset voltage Δ V.The transmission offset voltage Δ V of offset voltage generative circuit 43 is anti-to operational amplification circuit 44 Phase input terminal, the original driving signal after the digital-to-analogue conversion received with non-inverting input terminal carry out operation, obtain Vs+ Δ V (here Refer to the superposition of voltage swing, if original driving signal polarity is negative, Vs+ Δ V polarity here is negative, to display panel inside Capacitor caused by 46 Voltage Drop of pixel electrode compensate, the pixel voltage at liquid crystal both ends is maintained at Vs-Vcom after compensation, Flicker free when display, display effect are good.
In one of the embodiments, in the first relation table each grayscale value according to descending order, the adjacent ash of every two Rank value forms a grayscale section;Offset voltage generative circuit 43 is used for the grayscale value in original driving signal not in the first relationship When in table, it is determined that the grayscale value institute at the grayscale value of original driving signal grayscale section both ends locating in the first relation table is right The first offset voltage and the second offset voltage answered, further according to the grayscale value of original driving signal, the grayscale at grayscale section both ends Value, the first offset voltage and the second offset voltage generate offset voltage according to linear internal difference model.
In the case of the grayscale value of original driving signal is not in above-mentioned relation table, it can determine whether it in above-mentioned first relationship Which grayscale section in table, it is believed that in certain between the grayscale value and offset voltage of the original driving signal in the section Linear relationship, the linear relationship expression formula are linear internal difference model.Specifically, when the grayscale value of original driving signal is not first When in relation table, according to the grayscale value of original driving signal, the grayscale value corresponding first at corresponding grayscale section both ends is found Then offset voltage and the second offset voltage mend the grayscale value of original driving signal, the grayscale value at grayscale section both ends, first It repays voltage and the second offset voltage substitutes into linear internal difference model, available offset voltage exports the offset voltage to operation and puts The inverting input terminal of big circuit 44.For example, if the grayscale value n of original driving signal is greater than 0 (the first offset voltage) (the less than 31 Two offset voltages), then its corresponding offset voltage, ifGrayscale value n is greater than 31 (the first offset voltages) Less than 60 (the second offset voltages), then its corresponding offset voltage
In one of the embodiments, as shown in fig. 6, offset voltage generative circuit 43 includes: processor 431 and memory 432;Memory 432 is for storing the first relation table and linear internal difference model;The first end of processor 431 is for connecting timing control The second end of device 41 processed, processor 431 is connect with memory 432, the third end connection operational amplification circuit 44 of processor 431 Non-inverting input terminal, when processor 431 is used to determine that the grayscale value of original driving signal to be in preset first relation table, according to original The polarity of beginning driving signal, grayscale value look into the first relation table, generate offset voltage;Processor 431 is also used to determine grayscale value not When in the first relation table, it is determined that the grayscale value of original driving signal grayscale section both ends locating in the first relation table First offset voltage and the second offset voltage corresponding to grayscale value, grayscale value, grayscale section further according to original driving signal The grayscale value at both ends, the first offset voltage and the second offset voltage generate offset voltage according to linear internal difference model.
Wherein, processor 431, which refers to, can be realized reading data, the equipment of operation.Specifically, processor 431 and timing Controller 41 communicates to connect, and receives the original driving signal that sequence controller 41 generates.Also, processor 431 is also from memory The data of the first relation table are obtained in 432, then by the number in the polarity of original driving signal and grayscale value and the first relation table According to being compared, when grayscale value is in the first relation table, can table look-up to obtain corresponding offset voltage, then processor 431 is defeated The offset voltage is become to the non-inverting input terminal of operational amplification circuit 44 with compensating display panel scanning voltage signal by high level out When low level, the electricity of 46 Voltage Drop of pixel electrode guarantees that pixel voltage of the load at liquid crystal both ends is constant, and display is stablized, It does not flash.If processor 431 does not find data corresponding with the grayscale value of original driving signal in the first relation table, locate Reason device 431 judges which grayscale section that the grayscale value of the original driving signal is fallen in the first relation table, and corresponding first closes It is the data in table, obtains the corresponding offset voltage of two endpoint grayscale values in the grayscale section, is denoted as the first compensation electricity respectively Pressure and the second offset voltage, the first offset voltage is less than the second offset voltage.Then by grayscale value n, the ash of original driving signal Grayscale value a and b, the first offset voltage Pa, the second offset voltage Pb at rank section both ends are substituting to linear internal difference modelWherein, a <b, Pa are corresponding first offset voltage of a grayscale value, and Pb is that b grayscale corresponding second is mended Repay voltage.Wherein, COF (Chip On Flex, or, Chip On can be passed through between processor 431 and sequence controller 41 Film, flip chip) etc. be attached.
In one of the embodiments, as shown in Figure 4 and Figure 6, driving circuit further include: first resistor R1 is serially connected in fortune It calculates between the non-inverting input terminal of amplifying circuit 44 and the output end of D/A converting circuit 42;Second resistance R2 is serially connected in operation and puts Between the big non-inverting input terminal of circuit 44 and the output end of offset voltage generative circuit 43;3rd resistor R3 is serially connected in operation and puts Between the inverting input terminal and ground of big circuit 44;4th resistance R4 is serially connected in the inverting input terminal and fortune of operational amplification circuit 44 Between the output end for calculating amplifying circuit, first resistor, second resistance, the resistance value of 3rd resistor and the 4th resistance are equal.Such as Fig. 4 With shown in Fig. 6, the voltage of node a isFirst resistor, second resistance, 3rd resistor and the 4th again Resistance is equal, so the voltage of node c is twice of the voltage of node a:It needs to illustrate It is that other than using the resistance provided in the present embodiment distribution and connection type, other are adjusted between resistance by changing Section and connection relationship etc., so that the mode that the output voltage of operational amplification circuit is Vs+ Δ V belongs to protection model of the invention It encloses.
A kind of controller, as shown in Figure 6, comprising: sequence controller 41 and above-mentioned driving circuit 40, sequence controller 41 are used In the original driving signal of offer.With described in above-described embodiment, sequence controller 41 exports original driving signal to driving circuit 40, driving circuit 40 compensates tune to original driving signal according to the polarity and grayscale value of the original driving signal received It is whole, load an offset voltage, when to export to data line, the pixel voltage at liquid crystal both ends be able to maintain it is constant so that aobvious Show that panel stablizes display, do not flash, improves display quality.It should be noted that controller provided in an embodiment of the present invention can be with Using 40 structure of driving circuit in above-mentioned any one embodiment, the compensation of Lai Shixian pixel electrode signal.
A kind of display device, as shown in fig. 7, comprises sequence controller 41, display panel 10 and above-mentioned driving circuit 40, when Sequence controller 41 is for providing original driving signal.Display device provided by the embodiments of the present application passes through above-mentioned sequence controller 41 generate original driving signal, and compensate operation to original driving signal by driving circuit 40, export compensated driving Signal is to the data line on display panel 10.Sequence controller 41 can also export scanning voltage signal by shift register etc. Scan line to display panel 10, scanning voltage signal usually for high point, open by transistor, and driving circuit 40 is mentioned to data line For driving signal for driving liquid crystal deflection, display is realized, since the driving circuit 40 in display device provided by the present application exists Front end has carried out compensation adjustment to original driving signal, so mending when scanning voltage signal is converted to low level from high level It repays voltage offset and falls the pixel electrode voltage as caused by the presence of parasitic capacitance Cgs and fall part, load can be kept in liquid The pixel voltage at brilliant both ends is consistent, and display is stablized.
Display panel 10 includes glass substrate in one of the embodiments,;Driving circuit 40 is arranged on the glass substrate, And driving circuit 40 is electrically connected with glass substrate.By the way that on the glass substrate, display dress may be implemented in the setting of driving circuit 40 The ultra-narrow frame design set.
A kind of voltage compensation method, as shown in Figure 8, comprising:
S10: the original driving signal of sequence controller output is obtained;
S20: digital-to-analogue conversion is carried out to original driving signal;
S30: offset voltage is generated according to the polarity of original driving signal and grayscale value;
S40: original driving signal and offset voltage after logarithmic mode conversion carry out plus and minus calculation, obtain compensated driving Signal;
Wherein, pixel electricity caused by when the scanning voltage signal low and high level that offset voltage is used to compensate display panel changes Pole tension falls.
Specifically, when the transistor in order to compensate for display panel becomes turning off from being connected as caused by parasitic capacitance Cgs Pixel electrode voltage falls, voltage compensation method provided by the present application, first obtains the original driving of sequence controller output Then signal carries out digital-to-analogue conversion to original driving signal, generate compensation electricity according to the polarity of original driving signal and grayscale value Pressure, original driving signal and offset voltage after logarithmic mode conversion carry out plus and minus calculation, obtain compensated driving signal, and defeated Out to the data line of display panel, fall for compensating the pixel electrode voltage as caused by feedthrough phenomenon.Wherein, it realizes above-mentioned The hardware of voltage compensation method is constituted can be such as above-mentioned driving circuit as described in the examples, but is not limited only to above-mentioned driving The structure of circuit.
In one of the embodiments, as shown in figure 9, generating compensation electricity according to the polarity of original driving signal and grayscale value The step of pressure includes:
S31: if the grayscale value of original driving signal is in the first relation table, according to the polarity of original driving signal and Grayscale value looks into the first relation table, generates offset voltage, wherein the first relation table is used to characterize polarity, the ash of original driving signal Rank value and offset voltage relationship.
The step of generating offset voltage according to the polarity of original driving signal and grayscale value in one of the embodiments, is wrapped It includes:
S32: if the grayscale value of original driving signal is not in the first relation table, according to the polarity of original driving signal Determine that the grayscale value of original driving signal first is mended corresponding to the grayscale value at locating grayscale section both ends in the first relation table Voltage and the second offset voltage are repaid, further according to the grayscale value of original driving signal, the grayscale value at grayscale section both ends, the first compensation Voltage and the second offset voltage generate offset voltage according to linear internal difference model.
About generate offset voltage process and its hardware configuration that may be relied on, can refer to above-mentioned driving circuit, Description in the embodiments such as display device, this will not be repeated here.
Each technical characteristic of embodiment described above can be combined arbitrarily, for simplicity of description, not to above-mentioned reality It applies all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not deposited In contradiction, all should be considered as described in this specification.
The embodiments described above only express several embodiments of the present invention, and the description thereof is more specific and detailed, but simultaneously Limitations on the scope of the patent of the present invention therefore cannot be interpreted as.It should be pointed out that for those of ordinary skill in the art For, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to guarantor of the invention Protect range.Therefore, the scope of protection of the patent of the invention shall be subject to the appended claims.

Claims (10)

1. a kind of driving circuit characterized by comprising offset voltage generative circuit, D/A converting circuit, operational amplification circuit And buffer;
The D/A converting circuit is used to obtain the original driving signal of sequence controller output, and by the original driving signal It exports after carrying out digital-to-analogue conversion to the non-inverting input terminal of the operational amplification circuit;
The offset voltage generative circuit is used to generate offset voltage according to the polarity and grayscale value of the original driving signal, and Export the non-inverting input terminal of the offset voltage to the operational amplification circuit, wherein the offset voltage is for compensating display Pixel electrode voltage caused by when the scanning voltage signal low and high level variation of panel falls;
The output end of the operational amplification circuit be separately connected the operational amplification circuit inverting input terminal and the buffer Non-inverting input terminal;
The inverting input terminal of the buffer is connect with the output end of the buffer, and the output end of the buffer is for connecting Connect the data line of the display panel.
2. driving circuit according to claim 1, which is characterized in that the offset voltage generative circuit is used in the original When the grayscale value of beginning driving signal is in preset first relation table, then according to the polarity and grayscale value of the original driving signal The first relation table is looked into, the offset voltage is generated, wherein first relation table is used to characterize the pole of the original driving signal Property, grayscale value and the offset voltage relationship.
3. driving circuit according to claim 2, which is characterized in that each grayscale value is according to incremental in first relation table Sequence arranges, and the adjacent grayscale value of every two forms a grayscale section;
The offset voltage generative circuit is used for when the grayscale value of the original driving signal is not in first relation table, The grayscale value of the original driving signal institute in first relation table is then determined according to the polarity of the original driving signal Locate the first offset voltage and the second offset voltage corresponding to the grayscale value at grayscale section both ends, believes further according to the original driving Number grayscale value, grayscale section both ends grayscale value, first offset voltage and second offset voltage according to institute Linear internal difference model is stated, offset voltage is generated.
4. driving circuit according to claim 3, which is characterized in that the offset voltage generative circuit includes: processor And memory;
The memory is for storing first relation table and the linear internal difference model;
The first end of the processor connects for connecting the sequence controller, the second end of the processor and the memory It connects, the third end of the processor connects the non-inverting input terminal of the operational amplification circuit, and the processor is described for determining When the grayscale value of original driving signal is in preset first relation table, according to the polarity of the original driving signal, grayscale value The first relation table is looked into, the offset voltage is generated;
When the processor is also used to determine the grayscale value not in first relation table, then believed according to the original driving Number polarity determine the original driving signal grayscale value locating grayscale section both ends in first relation table grayscale Value corresponding the first offset voltage and the second offset voltage, grayscale value, the grayscale further according to the original driving signal The grayscale value at section both ends, the first offset voltage and the second offset voltage generate offset voltage according to the linear internal difference model.
5. driving circuit described in any one of -4 according to claim 1, which is characterized in that further include:
First resistor, be serially connected in the operational amplification circuit non-inverting input terminal and the D/A converting circuit output end it Between;
Second resistance is serially connected in the non-inverting input terminal of the operational amplification circuit and the output end of the offset voltage generative circuit Between;
3rd resistor is serially connected between the inverting input terminal and ground of the operational amplification circuit;
4th resistance, be serially connected in the operational amplification circuit inverting input terminal and the operational amplification circuit output end it Between;
The first resistor, the second resistance, the resistance value of the 3rd resistor and the 4th resistance are equal.
6. a kind of display device, which is characterized in that including any one of sequence controller, display panel and claim 1-5 institute The driving circuit stated, the sequence controller are used to provide the described original driving signal.
7. display device according to claim 6, which is characterized in that the display panel includes glass substrate;The drive Dynamic circuit is arranged on the glass substrate, and the driving circuit is electrically connected with the glass substrate.
8. a kind of voltage compensation method characterized by comprising
Obtain the original driving signal of sequence controller output;
Digital-to-analogue conversion is carried out to the original driving signal;
Offset voltage is generated according to the polarity of the original driving signal and grayscale value;
Original driving signal and the offset voltage after logarithmic mode conversion carry out plus and minus calculation, obtain compensated driving letter Number;
Wherein, pixel electricity caused by when the scanning voltage signal low and high level that the offset voltage is used to compensate display panel changes Pole tension falls.
9. voltage compensation method according to claim 8, which is characterized in that according to the pole of the original driving signal Property and grayscale value generate offset voltage the step of include:
If the grayscale value of the original driving signal is in the first relation table, according to the polarity of the original driving signal and Grayscale value looks into the first relation table, generates the offset voltage, wherein first relation table is for characterizing original driving signal Polarity, grayscale value and offset voltage relationship.
10. voltage compensation method according to claim 9, which is characterized in that according to the original driving signal Polarity and grayscale value generate the step of offset voltage and include:
If the grayscale value of the original driving signal is not in first relation table, according to the original driving signal Polarity determines the grayscale value institute at grayscale value locating grayscale section both ends in first relation table of the original driving signal Corresponding first offset voltage and the second offset voltage, grayscale value, the grayscale section further according to the original driving signal The grayscale value at both ends, first offset voltage and second offset voltage generate compensation according to the linear internal difference model Voltage.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110855138A (en) * 2019-10-25 2020-02-28 西安班特利奥能源科技有限公司 Dead zone compensation method for three-level converter
CN112669762A (en) * 2020-12-23 2021-04-16 Tcl华星光电技术有限公司 Driving chip, display panel and driving method thereof

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101354870A (en) * 2007-07-24 2009-01-28 北京京东方光电科技有限公司 TFT-LCD control method
CN101615382A (en) * 2008-06-27 2009-12-30 群康科技(深圳)有限公司 Liquid crystal indicator
CN103544927A (en) * 2013-11-07 2014-01-29 京东方科技集团股份有限公司 Display drive circuit, display device and display drive method
CN103674998A (en) * 2013-10-24 2014-03-26 北京大学深圳研究生院 Plant health state detection method based on thermal imaging technology
EP3038096A1 (en) * 2014-12-24 2016-06-29 LG Display Co., Ltd. Liquid crystal display and driving method thereof
TWI637368B (en) * 2017-08-11 2018-10-01 奇景光電股份有限公司 Display panel driving apparatus and method for compensating pixel voltage
US20190088229A1 (en) * 2017-09-21 2019-03-21 Seiko Epson Corporation Display driver, electro-optical device, and electronic apparatus

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101354870A (en) * 2007-07-24 2009-01-28 北京京东方光电科技有限公司 TFT-LCD control method
CN101615382A (en) * 2008-06-27 2009-12-30 群康科技(深圳)有限公司 Liquid crystal indicator
CN103674998A (en) * 2013-10-24 2014-03-26 北京大学深圳研究生院 Plant health state detection method based on thermal imaging technology
CN103544927A (en) * 2013-11-07 2014-01-29 京东方科技集团股份有限公司 Display drive circuit, display device and display drive method
EP3038096A1 (en) * 2014-12-24 2016-06-29 LG Display Co., Ltd. Liquid crystal display and driving method thereof
TWI637368B (en) * 2017-08-11 2018-10-01 奇景光電股份有限公司 Display panel driving apparatus and method for compensating pixel voltage
US20190088229A1 (en) * 2017-09-21 2019-03-21 Seiko Epson Corporation Display driver, electro-optical device, and electronic apparatus

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110855138A (en) * 2019-10-25 2020-02-28 西安班特利奥能源科技有限公司 Dead zone compensation method for three-level converter
CN110855138B (en) * 2019-10-25 2021-08-03 西安班特利奥能源科技有限公司 Dead zone compensation method for three-level converter
CN112669762A (en) * 2020-12-23 2021-04-16 Tcl华星光电技术有限公司 Driving chip, display panel and driving method thereof

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