CN109962709B - Method and system for testing analog-to-digital converter - Google Patents
Method and system for testing analog-to-digital converter Download PDFInfo
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- CN109962709B CN109962709B CN201910239161.9A CN201910239161A CN109962709B CN 109962709 B CN109962709 B CN 109962709B CN 201910239161 A CN201910239161 A CN 201910239161A CN 109962709 B CN109962709 B CN 109962709B
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Abstract
The invention discloses a method and a system for testing an analog-to-digital converter, and belongs to the field of testing. The invention sends a clock signal to the analog-to-digital converter by controlling the controller, judges whether the setting of the controller is abnormal or not, and prevents test failure caused by abnormal setting of the controller; whether the communication of the analog-to-digital converter is successful is judged by monitoring the communication state between the controller and the analog-to-digital converter, so that the test result is prevented from being influenced by the abnormality of a communication interface of the analog-to-digital converter; whether the analog-to-digital converter outputs the data signal or not is monitored, whether the setting of the analog-to-digital converter is normal or not is identified, and the test result is prevented from being influenced due to the abnormal setting of the analog-to-digital converter. The invention eliminates the fault from the controller to the analog-to-digital converter in one step in the communication process of the controller and the analog-to-digital converter, realizes the purpose of accurately positioning the fault, and has short time and high effect.
Description
Technical Field
The present invention relates to the field of testing, and in particular, to a method and a system for testing an analog-to-digital converter.
Background
In the application of the current far-field speech product, the test of an ADC (Analog-to-Digital Converter, chinese Analog-to-Digital Converter or Analog-to-Digital Converter) often requires the support of the original chip factory, the test period is long, and the fault cannot be accurately located.
Disclosure of Invention
In view of the above problems, a method and a system for testing an analog-to-digital converter are provided to achieve fast testing speed and accurate fault positioning.
The invention provides a test method of an analog-to-digital converter, wherein the analog-to-digital converter to be tested is connected with a controller and is used for collecting an audio input signal, and the test method comprises the following steps:
controlling the controller to send a clock signal to the analog-to-digital converter;
identifying whether the controller and the analog-to-digital converter are abnormal or not according to the clock signal and the feedback of the analog-to-digital converter;
when at least one abnormality exists between the controller and the analog-to-digital converter, monitoring the communication state between the controller and the analog-to-digital converter;
when the communication between the controller and the analog-to-digital converter is normal, monitoring whether the analog-to-digital converter outputs a data signal or not when audio input signal acquisition is carried out, and if so, ending; if not, adjusting the setting of the controller.
Preferably, the identifying whether the controller and the analog-to-digital converter are abnormal according to the clock signal and the feedback of the analog-to-digital converter includes:
identifying whether the setting of the controller is abnormal according to whether the frequency of the clock signal meets a preset condition, if so, setting the controller to be normal; if not, setting the controller to be abnormal;
and acquiring whether the analog-to-digital converter outputs a feedback data signal to the controller, wherein if the analog-to-digital converter outputs the feedback data signal, the power supply of the analog-to-digital converter is normal, and if the analog-to-digital converter does not output the feedback data signal, the power supply of the analog-to-digital converter is abnormal.
Preferably, the monitoring the communication state between the controller and the analog-to-digital converter includes:
monitoring whether the communication state between the controller and the analog-to-digital converter is normal, if so, corresponding the configuration address of the controller to the setting address of the analog-to-digital converter; if not, the configuration address of the controller is inconsistent with the setting address of the analog-to-digital converter.
Preferably, when the audio input signal is acquired, when the analog-to-digital converter does not output a data signal, reading a register address of the analog-to-digital converter, judging that the register is normally set, and if not, adjusting the address of the register; if yes, acquiring the digital sampling rate and the data format of the analog-to-digital converter, identifying whether the data sampling rate and the data format are normal, and outputting an identification result.
The invention also provides a test system of the analog-to-digital converter, the analog-to-digital converter to be tested is connected with the controller and is used for collecting the audio input signal, and the test system comprises:
the control unit is used for controlling the controller to send a clock signal to the analog-to-digital converter;
the identification unit is used for identifying whether the controller and the analog-to-digital converter are abnormal or not according to the clock signal and the feedback of the analog-to-digital converter;
the monitoring unit is used for monitoring the communication state between the controller and the analog-to-digital converter when at least one abnormality exists between the controller and the analog-to-digital converter;
the adjusting unit is used for monitoring whether the analog-to-digital converter outputs a data signal or not when audio input signal acquisition is carried out when the communication between the controller and the analog-to-digital converter is normal, and if so, ending; if not, adjusting the setting of the controller.
Preferably, the identification unit is configured to identify whether the setting of the controller is abnormal according to whether the frequency of the clock signal meets a preset condition, and if so, the setting of the controller is normal; if not, setting the controller to be abnormal;
the identification unit is further used for acquiring whether the analog-to-digital converter outputs a feedback data signal to the controller, if so, the analog-to-digital converter supplies power normally, and if not, the analog-to-digital converter supplies power abnormally.
Preferably, the monitoring unit is configured to monitor whether a communication state between the controller and the analog-to-digital converter is normal, and if so, a configuration address of the controller corresponds to a setting address of the analog-to-digital converter; if not, the configuration address of the controller is inconsistent with the setting address of the analog-to-digital converter.
Preferably, when the adjusting unit collects the audio input signal, when the analog-to-digital converter does not output a data signal, the adjusting unit reads the register address of the analog-to-digital converter, judges that the register is normally set, and if not, adjusts the address of the register; if yes, acquiring the digital sampling rate and the data format of the analog-to-digital converter, identifying whether the data sampling rate and the data format are normal, and outputting an identification result.
The beneficial effects of the above technical scheme are that:
in the technical scheme, the controller is controlled to send a clock signal to the analog-to-digital converter, whether the setting of the controller is abnormal or not is judged, and test failure caused by abnormal setting of the controller is prevented; whether the communication of the analog-to-digital converter is successful is judged by monitoring the communication state between the controller and the analog-to-digital converter, so that the test result is prevented from being influenced by the abnormality of a communication interface of the analog-to-digital converter; whether the analog-to-digital converter outputs the data signal or not is monitored, whether the setting of the analog-to-digital converter is normal or not is identified, and the test result is prevented from being influenced due to the abnormal setting of the analog-to-digital converter. The invention eliminates the fault from the controller to the analog-to-digital converter in one step in the communication process of the controller and the analog-to-digital converter, realizes the purpose of accurately positioning the fault, and has short time and high effect.
Drawings
FIG. 1 is a flow chart of an embodiment of a method for testing an analog-to-digital converter according to the present invention;
fig. 2 is a block diagram of an embodiment of a test system for an analog-to-digital converter according to the invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict.
The invention is further described with reference to the following drawings and specific examples, which are not intended to be limiting.
As shown in fig. 1, the present invention provides a testing method for an analog-to-digital converter, wherein the analog-to-digital converter to be tested is connected to a controller and is used for collecting an audio input signal, and the testing method comprises the following steps:
s1, controlling the controller to send a clock signal to the analog-to-digital converter;
in practical applications, before step S1 is executed, the power supply of the adc to be tested may be checked to ensure that the test is performed when the power supply is normal.
S2, identifying whether the controller and the analog-to-digital converter are abnormal or not according to the clock signal and the feedback of the analog-to-digital converter;
specifically, the step S2 includes:
identifying whether the setting of the controller is abnormal according to whether the frequency of the clock signal meets a preset condition, if so, setting the controller to be normal; if not, setting the controller to be abnormal;
wherein the clock signal comprises: the method comprises the following steps that a reference clock, a bit clock and a sampling clock are all used, the reference clock, the bit clock and the sampling clock send clock signals to an analog-to-digital converter through a controller, and if no signal exists or the frequency of the signal is different from a preset threshold value, the step S3 is executed; and acquiring whether the analog-to-digital converter outputs a feedback data signal to the controller, if so, supplying power to the analog-to-digital converter normally, otherwise, supplying power to the analog-to-digital converter abnormally, and executing the step S3.
S3, monitoring the communication state between the controller and the analog-to-digital converter when at least one abnormality exists between the controller and the analog-to-digital converter;
specifically, the step S3 includes:
monitoring whether the communication state between the controller and the analog-to-digital converter is normal, if so, corresponding the configuration address of the controller to the setting address of the analog-to-digital converter; if not, the configuration address of the controller is inconsistent with the setting address of the analog-to-digital converter.
When the controller is communicated with the analog-to-digital converter, monitoring an I2C communication port of the analog-to-digital converter, checking whether the I2C reports errors, and if not, indicating that the software setting of the controller is consistent with the hardware setting of the analog-to-digital converter; if the I2C is wrong, it indicates that the software settings of the controller may not be consistent with the settings of the analog-to-digital converter, or the I2C signal is problematic, and further elimination is required. And measuring the I2C signal, and confirming whether the frequency and the amplitude of the I2C signal are correct or not. Meanwhile, the waveforms of the SCK and the SDA of the I2C can be compared to read signals, whether ACK replies or not is confirmed, and if not, the I2C address reading and writing are mistaken; if ACK is replied, it indicates that the address of I2C is correct.
S4, when the communication between the controller and the analog-to-digital converter is normal, monitoring whether the analog-to-digital converter outputs a data signal or not when audio input signal acquisition is carried out, and if so, ending; if not, adjusting the setting of the controller.
In the step S4, when audio input signal acquisition is performed, when the analog-to-digital converter does not output a data signal, reading a register address of the analog-to-digital converter, determining that the register is normally set, and if not, adjusting the address of the register; if yes, acquiring the digital sampling rate and the data format of the analog-to-digital converter, identifying whether the data sampling rate and the data format are normal, and outputting an identification result.
After the communication between the controller and the analog-to-digital converter is confirmed to be successful, if the analog-to-digital converter does not output data signals when audio input signals are collected, whether register control of the analog-to-digital converter in the controller is correct or not needs to be further determined, a register address of the analog-to-digital converter needs to be read, whether register setting is correct or not needs to be confirmed through comparison, and therefore the problem that debugging fails due to unsuccessful software setting is avoided.
It should be noted that: the I2C communication port is normal, and the register may be flushed, so that the register needs to be read out to ensure that the register is set correctly.
When DATA _ OUT of the DATA output port of the analog-to-digital converter has a signal output and the register is correctly set, if there is a problem in acquiring the audio input signal, further examination is required at this time:
and (3) measuring and confirming whether a signal is output from DATA _ OUT of a DATA output port of the analog-to-digital converter by using an oscilloscope, and simultaneously confirming: whether the sampling rate is correct or not and whether the data format is correct or not (the alignment mode set by the analog-to-digital converter is not consistent with the alignment mode set by the controller, which also can lead to unsuccessful recording).
In the embodiment, the controller is controlled to send a clock signal to the analog-to-digital converter, whether the setting of the controller is abnormal is judged, and test failure caused by the abnormal setting of the controller is prevented; the communication state between the controller and the analog-to-digital converter is monitored, whether the communication of the analog-to-digital converter is successful or not is judged, and the test result is prevented from being influenced due to the abnormal communication interface of the analog-to-digital converter; whether the analog-to-digital converter outputs the data signal or not is monitored, whether the setting of the analog-to-digital converter is normal or not is identified, and the test result is prevented from being influenced due to the abnormal setting of the analog-to-digital converter. The invention eliminates the fault from the controller to the analog-to-digital converter in one step in the communication process of the controller and the analog-to-digital converter, realizes the purpose of accurately positioning the fault, and has short time and high effect.
As a distance and not a limitation, the left and right channels of a Microphone (MIC) are found to be consistent in a debugging test process, and even if one MIC is disconnected, the same data of two chanels are recorded; the fault can be cleared by:
(1) Adopting differential connection;
(2) Checking whether the register is set reasonably, wherein the mode results in a left sound channel string and a right sound channel string due to improper register setting;
for example: looking at the input registers of the ADC, registers 52/54 and 55/57 of ADC page1 are the input selections of the ADC, corresponding to 0x34/0x36 and 0x37/0x39, from the previous read registers:
-0x34=3f, d7-D6=00, leftadc is LCH _ SEL4: IN2L (P)/IN 3L (M) differential input, and selects 0dB;
-0x36=33, D3-D2=00, left ADC is LCH _ SEL2X: IN2R (P)/IN 3R (M) differential input, and selects 0dB, and the sum of 0X34 registers will result IN one left ADC selecting two MIC paths simultaneously;
from the register analysis, it can be seen that 0x37 and 0x39 simultaneously select the paths of two MICs for the rightADC, so that the two MICs will have the same signal;
so 0x34/0x36/0x37/0x39 needs to be set to 0x3F.
It should be noted that: the invention is mainly used for debugging the analog-to-digital converter to be used in sound recovery or MIC recording in far-field voice products.
As shown in fig. 2, a test system of an analog-to-digital converter, in which the analog-to-digital converter to be tested is connected to a controller, and is configured to collect an audio input signal, includes: the device comprises a control unit 1, an identification unit 2, a monitoring unit 3 and an adjusting unit 4; wherein:
the control unit 1 is used for controlling the controller to send a clock signal to the analog-to-digital converter;
the identification unit 2 is used for identifying whether the controller and the analog-to-digital converter are abnormal or not according to the clock signal and the feedback of the analog-to-digital converter;
specifically, the identification unit 2 is configured to identify whether the setting of the controller is abnormal according to whether the frequency of the clock signal meets a preset condition, and if so, the setting of the controller is normal; if not, the setting of the controller is abnormal;
the identification unit 2 is further configured to acquire whether the analog-to-digital converter outputs a feedback data signal to the controller, if so, the analog-to-digital converter supplies power normally, and if not, the analog-to-digital converter supplies power abnormally.
A monitoring unit 3, configured to monitor a communication state between the controller and the analog-to-digital converter when at least one of the controller and the analog-to-digital converter is abnormal;
in this embodiment, the monitoring unit 3 is configured to monitor whether a communication state between the controller and the analog-to-digital converter is normal, and if so, a configuration address of the controller corresponds to a setting address of the analog-to-digital converter; if not, the configuration address of the controller is inconsistent with the setting address of the analog-to-digital converter.
When the controller communicates with the analog-to-digital converter, an I2C communication port of the analog-to-digital converter is monitored, whether I2C reports errors is checked, and if not, the software setting of the controller is consistent with the hardware setting of the analog-to-digital converter; if the I2C is reported in error, it indicates that the software settings of the controller may not be consistent with the settings of the analog-to-digital converter, or the I2C signal is problematic, and further rejection is required. And measuring the I2C signal, and confirming whether the frequency and the amplitude of the I2C signal are correct or not. Meanwhile, the waveforms of the SCK and the SDA of the I2C can be compared to read signals, whether ACK replies or not is confirmed, and if not, the I2C address reading and writing are mistaken; if ACK is replied, it indicates that the address of I2C is correct.
The adjusting unit 4 is used for monitoring whether the analog-to-digital converter outputs a data signal or not when audio input signal acquisition is carried out when the communication between the controller and the analog-to-digital converter is normal, and if so, ending; if not, adjusting the setting of the controller.
Specifically, when the adjusting unit 4 collects an audio input signal, when the analog-to-digital converter does not output a data signal, the adjusting unit reads the register address of the analog-to-digital converter, judges that the setting of the register is normal, and if not, adjusts the address of the register; if yes, acquiring the digital sampling rate and the data format of the analog-to-digital converter, identifying whether the data sampling rate and the data format are normal, and outputting an identification result.
After the communication between the controller and the analog-to-digital converter is confirmed to be successful, if the analog-to-digital converter does not output data signals when audio input signals are collected, whether register control of the analog-to-digital converter in the controller is correct or not needs to be further determined, a register address of the analog-to-digital converter needs to be read, whether register setting is correct or not needs to be confirmed through comparison, and therefore the problem that debugging fails due to unsuccessful software setting is avoided.
It should be noted that: the I2C communication port is normal, and the register may be flushed, so that the register needs to be read out to ensure that the register is set correctly.
In the embodiment, the controller is controlled to send a clock signal to the analog-to-digital converter, whether the setting of the controller is abnormal is judged, and test failure caused by the abnormal setting of the controller is prevented; the communication state between the controller and the analog-to-digital converter is monitored, whether the communication of the analog-to-digital converter is successful or not is judged, and the test result is prevented from being influenced due to the abnormal communication interface of the analog-to-digital converter; whether the analog-to-digital converter outputs the data signal or not is monitored, whether the setting of the analog-to-digital converter is normal or not is identified, and the test result is prevented from being influenced due to the abnormal setting of the analog-to-digital converter. The invention eliminates the fault from the controller to the analog-to-digital converter in one step in the communication process of the controller and the analog-to-digital converter, realizes the purpose of accurately positioning the fault, and has short time and high effect.
While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and detail may be made without departing from the spirit and scope of the invention.
Claims (8)
1. A test method of an analog-to-digital converter to be tested is connected with a controller and used for collecting an audio input signal, and is characterized by comprising the following steps:
controlling the controller to send a clock signal to the analog-to-digital converter;
identifying whether the controller and the analog-to-digital converter are abnormal or not according to the clock signal and the feedback of the analog-to-digital converter;
when at least one abnormality exists between the controller and the analog-to-digital converter, monitoring the communication state between the controller and the analog-to-digital converter;
when the communication between the controller and the analog-to-digital converter is normal, monitoring whether the analog-to-digital converter outputs a data signal or not when audio input signal acquisition is carried out, and if so, ending; if not, adjusting the setting of the controller.
2. The method for testing an analog-to-digital converter according to claim 1, wherein the identifying whether the controller and the analog-to-digital converter are abnormal according to the clock signal and the feedback of the analog-to-digital converter comprises:
identifying whether the setting of the controller is abnormal according to whether the frequency of the clock signal meets a preset condition, if so, setting the controller to be normal; if not, setting the controller to be abnormal;
and acquiring whether the analog-to-digital converter outputs a feedback data signal to the controller, wherein if the analog-to-digital converter outputs the feedback data signal to the controller, the power supply of the analog-to-digital converter is normal, and if the analog-to-digital converter does not output the feedback data signal, the power supply of the analog-to-digital converter is abnormal.
3. The method for testing an analog-to-digital converter according to claim 1, wherein the monitoring the communication status between the controller and the analog-to-digital converter comprises:
monitoring whether the communication state between the controller and the analog-to-digital converter is normal, if so, corresponding the configuration address of the controller to the setting address of the analog-to-digital converter; if not, the configuration address of the controller is inconsistent with the setting address of the analog-to-digital converter.
4. The method for testing the analog-to-digital converter according to claim 1, wherein when the audio input signal is collected, when the analog-to-digital converter does not output a data signal, the register address of the analog-to-digital converter is read, the setting of the register is judged to be normal, and if not, the address of the register is adjusted; if yes, acquiring the digital sampling rate and the data format of the analog-to-digital converter, identifying whether the digital sampling rate and the data format are normal, and outputting an identification result.
5. A test system for an analog-to-digital converter, the analog-to-digital converter to be tested being connected to a controller for acquiring an audio input signal, the test system comprising:
the control unit is used for controlling the controller to send a clock signal to the analog-to-digital converter;
the identification unit is used for identifying whether the controller and the analog-to-digital converter are abnormal or not according to the clock signal and the feedback of the analog-to-digital converter;
the monitoring unit is used for monitoring the communication state between the controller and the analog-to-digital converter when at least one abnormality exists between the controller and the analog-to-digital converter;
the adjusting unit is used for monitoring whether the analog-to-digital converter outputs a data signal or not when audio input signal acquisition is carried out when the communication between the controller and the analog-to-digital converter is normal, and if so, ending; if not, adjusting the setting of the controller.
6. The system for testing an analog-to-digital converter according to claim 5, wherein the identification unit is configured to identify whether the setting of the controller is abnormal according to whether the frequency of the clock signal meets a preset condition, and if so, the setting of the controller is normal; if not, setting the controller to be abnormal;
the identification unit is further used for acquiring whether the analog-to-digital converter outputs a feedback data signal to the controller, if so, the analog-to-digital converter supplies power normally, and if not, the analog-to-digital converter supplies power abnormally.
7. The system as claimed in claim 5, wherein the monitoring unit is configured to monitor whether a communication status between the controller and the analog-to-digital converter is normal, and if yes, a configuration address of the controller corresponds to a setup address of the analog-to-digital converter; if not, the configuration address of the controller is inconsistent with the setting address of the analog-to-digital converter.
8. The system for testing an analog-to-digital converter according to claim 5, wherein when the adjusting unit collects the audio input signal, when the analog-to-digital converter does not output the data signal, the adjusting unit reads the address of the register of the analog-to-digital converter to determine that the register is normally set, and if not, the adjusting unit adjusts the address of the register; if yes, acquiring the digital sampling rate and the data format of the analog-to-digital converter, identifying whether the digital sampling rate and the data format are normal, and outputting an identification result.
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| CN101536298A (en) * | 2007-01-25 | 2009-09-16 | 半导体元件工业有限责任公司 | DC-DC converter controller having optimized load transient response and method thereof |
| JP2013257816A (en) * | 2012-06-14 | 2013-12-26 | Denso Corp | Information processor |
| CN109120264A (en) * | 2018-07-27 | 2019-01-01 | 北京时代民芯科技有限公司 | A kind of girz analog-digital converter Auto-Test System and method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101536298A (en) * | 2007-01-25 | 2009-09-16 | 半导体元件工业有限责任公司 | DC-DC converter controller having optimized load transient response and method thereof |
| JP2013257816A (en) * | 2012-06-14 | 2013-12-26 | Denso Corp | Information processor |
| CN109120264A (en) * | 2018-07-27 | 2019-01-01 | 北京时代民芯科技有限公司 | A kind of girz analog-digital converter Auto-Test System and method |
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