CN109952560A - Timing method and its device, the electronic device of virtual timer - Google Patents

Timing method and its device, the electronic device of virtual timer Download PDF

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Publication number
CN109952560A
CN109952560A CN201780001891.4A CN201780001891A CN109952560A CN 109952560 A CN109952560 A CN 109952560A CN 201780001891 A CN201780001891 A CN 201780001891A CN 109952560 A CN109952560 A CN 109952560A
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timer
virtual
timing
hardware
virtual timer
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CN201780001891.4A
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CN109952560B (en
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周永林
杨柯
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Shenzhen Goodix Technology Co Ltd
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Shenzhen Goodix Technology Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements

Abstract

A kind of timing method and its device, electronic device of virtual timer enter interrupt phase and stop hardware timer (S701) if timing method includes: the time of the counting of hardware timer to its timing reference；Refresh the stage in virtual timer, judges whether there is the virtual timer (S702) for reaching timing in virtual timer queue；If so, then executing corresponding application task (S703)；If nothing, corresponding application task is not executed；According to time-consuming of the hardware timer between stopping when entering interrupt phase and its starting recently before, the most short timer time (S704) for entering interrupt phase since at the time of hardware timer stops in virtual timer queue is determined；Timing reference is updated into hardware timer startup stage and according to the longest timing of most short timer time and hardware timer, interrupt phase is exited to restart hardware timer (S705), the performance for effectively increasing processor reduces the burden of processor.

Description

Timing method and its device, the electronic device of virtual timer Technical field
The invention relates to the timing methods and its device of timer technique field more particularly to a kind of virtual timer, electronic device.
Background technique
Common timer can be divided into hardware timer and virtual timer (also referred to as software timer).Hardware timer has the advantages that precision is high, real-time is high, but for processor (CPU or MCU), the quantity of hardware timer is often limited, and therefore, it is difficult to meet the scene for needing a large amount of timers；Virtual timer can satisfy the scene for needing a large amount of timers, without being limited by hardware timer number.
In the prior art, on the one hand, virtual timer needs are refreshed according to the minimum timing period wherein as the hardware timer of reference clock, and judge whether virtual timer reaches timing, it can be seen that, when the timing cycle of hardware timer is smaller, virtual timer refreshes just more frequent, thus causes the burden of processor resource bigger.On the other hand, virtual timer is often subsidiary among operating system, and the entire minimum core of graft procedure system is generally required using virtual timer resource.And for lightweight Embedded Application, since the resource of its processor is limited, when applying under complex application context, if the entire minimum core that graft procedure system must be all needed using virtual timer, the waste of processor resource can be increased.
Summary of the invention
In view of this, one of the technical issues of the embodiment of the present application is solved is to provide the timing method and its device, electronic device of a kind of virtual timer, to overcome above-mentioned technological deficiency in the prior art.
The embodiment of the present application provides a kind of timing method of virtual timer comprising:
If the time of the counting of hardware timer to its timing reference, enters interrupt phase and stops the hardware timer；
Refresh the stage in virtual timer, judges whether there is the virtual timer for reaching timing in virtual timer queue；If so, then executing corresponding application task；If nothing, corresponding application task is not executed；
According to the hardware timer from the time-consuming between stopping described when entering interrupt phase and its before starting recently, determines and enter most short timer time of the interrupt phase since at the time of the hardware timer stops in the virtual timer queue；
The timing reference is updated into hardware timer startup stage and according to the longest timing of the most short timer time and the hardware timer, exits interrupt phase to restart the hardware timer.
The embodiment of the present application provides a kind of timing means of virtual timer comprising:
Interrupt module, for into interrupt phase and stopping the hardware timer when the time of the counting of hardware timer is to its timing reference；
Timing module judges whether there is the virtual timer for reaching timing in virtual timer queue for refreshing the stage in virtual timer；If so, then executing corresponding application task；If nothing, corresponding application task is not executed；
Refresh module, for, from the time-consuming between stopping described when entering interrupt phase and its before starting recently, determining according to the hardware timer and entering most short timer time of the interrupt phase since at the time of the hardware timer stops in the virtual timer queue；
Starting module exits interrupt phase for entering hardware timer startup stage and updating the timing reference according to the longest timing of the most short timer time and the hardware timer to restart the hardware timer.
The embodiment of the present application provides a kind of electronic device comprising: hardware timer, several virtual timers, processor enter interrupt phase when the time of the counting of hardware timer is to its timing reference and stop the hardware timer；The processor is used for:
Refresh the stage in virtual timer, judges whether there is the virtual timer for reaching timing in virtual timer queue；If so, then executing corresponding application task；If nothing, corresponding application task is not executed；
According to the hardware timer from the time-consuming between stopping described when entering interrupt phase and its before starting recently, determines and enter most short timer time of the interrupt phase since at the time of the hardware timer stops in the virtual timer queue；
So that hardware timer enters hardware timer startup stage and updates the timing reference according to the longest timing of the most short timer time and the hardware timer, interrupt phase is exited to restart the hardware timer.
In the embodiment of the present application, if the time of the counting of hardware timer to its timing reference, enters interrupt phase and stops the hardware timer；Refresh the stage in virtual timer, judges whether there is the virtual timer for reaching timing in virtual timer queue；If so, then executing corresponding application task；If nothing, corresponding application task is not executed；According to the hardware timer from the time-consuming between stopping described when entering interrupt phase and its before starting recently, determines and enter most short timer time of the interrupt phase since at the time of the hardware timer stops in the virtual timer queue；The timing reference is updated into hardware timer startup stage and according to the longest timing of the most short timer time and the hardware timer, interrupt phase is exited to restart the hardware timer, to reduce the refreshing frequency of virtual timer resource, to guarantee that the utilization rate of CPU is lower, therefore the performance for effectively increasing processor, reduces the burden of processor.
In addition, in an alternative embodiment, by defining global variable and virtual timer property element, so that the timing of virtual timer is departing from operating system, and it is common to different operating system, just need cpu resource caused by the minimum core of graft procedure system to waste so as to avoid virtual timer to be used.
Detailed description of the invention
Some specific embodiments of the embodiment of the present application are described in detail by way of example and not limitation with reference to the accompanying drawings hereinafter.Identical appended drawing reference denotes same or similar part or part in attached drawing.It should be appreciated by those skilled in the art that the drawings are not necessarily drawn to scale.In attached drawing:
Fig. 1 is initialization process schematic diagram in the embodiment of the present application one；
Fig. 2 is the flow diagram of virtual timer startup stage in the embodiment of the present application two；
Fig. 3 is the flow diagram for stopping hardware timer in the embodiment of the present application three；
Fig. 4 is the flow diagram that virtual timer is inserted into the embodiment of the present application four；
Fig. 5 is the flow diagram that virtual timer refreshes the stage in the embodiment of the present application five；
Fig. 6 is the flow diagram of hardware timer startup stage in the embodiment of the present application six；
Fig. 7 is the timing method flow diagram of virtual timer in the embodiment of the present application seven；
Fig. 8 is the stopping process flow diagram of virtual timer in the embodiment of the present application eight；
Fig. 9 is the structural schematic diagram of the timing means of virtual timer in the embodiment of the present application nine.
Specific embodiment
Any technical solution for implementing the embodiment of the present application must be not necessarily required to reach simultaneously above all advantages.
In order to make those skilled in the art more fully understand the technical solution in the embodiment of the present application, below in conjunction with the attached drawing in the embodiment of the present application, the technical scheme in the embodiment of the application is clearly and completely described, obviously, described embodiment is only the embodiment of the present application a part of the embodiment, instead of all the embodiments.Based on the embodiment in the embodiment of the present application, the range of the embodiment of the present application protection is all should belong in those of ordinary skill in the art's every other embodiment obtained.
In the following embodiments of the application, by taking concrete application as an example, the technology of the application is illustrated according to the sequencing of application, it should be noted that, following illustrative sequencings are intended merely to clearly explain the technical solution of this application, are not to be particularly limited as to execute according to following sequencings.
It is illustrated for having a hardware timer and multiple virtual timers for carrying out software timing task below, hardware timer provides timing base for virtual timer, each virtual timer has a uniqueness ID number, multiple virtual timers form the virtual timer resource that may participate in timed task, and when the partial virtual timer of actual participation timed task forms virtual timer queue, the virtual timer of completion timing task can reenter in virtual timer resource from deleting in virtual timer queue.
It should be noted that, in concrete application occasion, the corresponding relationship of configuration hardware timer and virtual timer quantitatively can be actually needed, and specific corresponding to relationship, those of ordinary skill in the art, which are referred to the explanation that following hardware timers correspond to multiple virtual timers, can be realized.
Before executing following timing methods, it first defines for the fixed structural body of each virtual timer (for example being referred to as first structure body), first structure body includes multiple first property elements, it for example include: the flag bit (being indicated with used_flag) whether any virtual timer of characterization has been used, record the property element (being indicated with remain_ms) of the timing of any virtual timer, characterize the flag bit (being indicated with reload_flag) that any virtual timer is periodical virtual timer or single virtual timer, the property element (being indicated with reload_ms) of the timing of record period virtual timer.
Virtual timer is managed for convenience, define another structural body (for example being referred to as the second structural body), second structural body also includes multiple second property elements, it for example include: the property element (being indicated with used_sw_timer) for recording the number for the virtual timer that timed task is participated in virtual timer queue, record the property element (using latest_sw_timer_index) for the minimum ID number of virtual timer that timed task is participated in virtual timer queue, record the property element (being indicated with SW_TIMER_CNT) of the most numbers of virtual timer in virtual timer resource.
For the ease of being managed to above described structure, two global variables are illustratively defined: virtual fixed When device head variable (being indicated with sw_timer_head), time-consuming variable (being indicated with past_time_ms), in which: include at least one in above-mentioned first structure body and the second structure head in the virtual timer header file；Time-consuming variable is used to record time-consuming of the hardware timer before stopping and the stopping between starting recently.
In the present embodiment, by defining above-mentioned global variable and first structure body and the second structural body, so that the timing of virtual timer is departing from operating system, and it is common to different operating system, just need cpu resource caused by the minimum core of graft procedure system to waste so as to avoid virtual timer to be used.
When using the timing method of the application, virtual timer and hardware timer can be initialized first, specific initialization process is shown in Figure 1.
Fig. 1 is initialization process schematic diagram in the embodiment of the present application one；As shown in Figure 1, it includes the following steps:
S101, initialization global variable, the property element for respectively including including first structure body and the second structural body；
Specifically, two global variables are respectively as follows: virtual timer head variable sw_timer_head, time-consuming variable past_time_ms, since virtual timer header file includes at least one in above-mentioned first structure body and the second structure head, and first structure body includes above-mentioned multiple first property elements, second structural body includes above-mentioned multiple second property elements again, therefore, by initialization global variable to realize above-mentioned part or all of first property element, the initialization of some or all of second property element, to be ready for the subsequent timing execution having when timed task.
Specifically, when being initialized to global variable, first virtual timer head variable sw_timer_head can be initialized, then time-consuming variable past_time_ms is initialized；Alternatively, can also first be initialized to time-consuming variable past_time_ms, then virtual timer head variable sw_timer_head is initialized；Alternatively, initialization and time-consuming variable past_time_ms can also be carried out to virtual timer head variable sw_timer_head while being initialized.
S102, the operating mode for initializing hardware timer.
In the present embodiment, in order to realize the timing function of hardware timer, the final realization for guaranteeing virtual timer timed task, the operating mode of hardware timer can be comparison pattern, be also possible to overflow pattern.
In following embodiments, it is compared with the time for setting hardware timer counting for the operating mode of hardware timer with the timing reference of setting, when the timing for reaching hardware timer, and then enters and compare interrupt phase, the final timed task for realizing virtual timer.
In a concrete application scene, in order to realize initialization shown in FIG. 1, an interface function (such as void sw_timer_init (void)) can be pre-defined, above-mentioned initialization procedure is realized by the interface function.
After the initialization process for completing above-mentioned Fig. 1, when if desired executing new timed task, then enter virtual timer startup stage, detailed process is shown in Figure 2.It should be noted that new timed task includes first timed task, or there are timed task, and increased new timed task.
Fig. 2 is the flow diagram of virtual timer startup stage in the embodiment of the present application two；As shown in Fig. 2, it includes the following steps S201 to S210:
S201, judge the new timed task needed for timing it is whether reasonable, if so, thening follow the steps S202；If it is not, the judging result that timing needed for then returning to the new timed task is invalid；
In the present embodiment, whether the matched timing of new timed task institute described in the timing threshold decision with specific reference to setting is reasonable.
Specifically, in the present embodiment, the timing threshold value has upper threshold and bottom threshold, accordingly, judges whether the matched timing of the new timed task institute is reasonable according to the upper threshold and bottom threshold.If the matched timing of the new timed task institute is located at the upper threshold and bottom threshold limit in the range of (including endpoint), the new timed task matched timing it is reasonable；Otherwise, unreasonable.
In the present embodiment, upper threshold and bottom threshold can be adjusted with practical application request.
Specifically, in a concrete application scene can following formula (1) carry out whether timing needed for the new timed task reasonably judges.
Min_delay_ms≤delay_ms≤max_delay_ms (1)
In formula (1), min_delay_ms indicates that bottom threshold, max_delay_ms indicate that upper threshold, delay_ms indicate the matched timing of the new timed task institute.
As shown in formula (1), the matched timing of new timed task institute is equal to bottom threshold and perhaps upper threshold or is greater than bottom threshold and is less than upper threshold, all can determine that the matched timing of new timed task institute is reasonable.
S202, judge whether there are also not used virtual timers in virtual timer resource, if so, thening follow the steps S203；Otherwise, it returns to virtual timer resource and not used virtual timer is not present；
In the present embodiment, according to most numbers of virtual timer in the virtual timer quantity and virtual timer resource for executing each timed task in virtual timer queue, judge whether there are also not used virtual timers in virtual timer resource.
Specifically, the virtual timer quantity that each timed task is executed in virtual timer queue is obtained by reading numerical values in dependence element used_sw_timer, most numbers of virtual timer in virtual timer resource are obtained in dependence element S W_TIMER_CNT, if being less than the numerical value read from SW_TIMER_CNT from reading numerical values in used_sw_timer, determine that there are also not used virtual timers in virtual timer resource；If being equal to the numerical value read from SW_TIMER_CNT from reading numerical values in used_sw_timer, determine there is no not used virtual timer in virtual timer resource.
S203, stop the hardware timer in virtual timer startup stage, and determine that the hardware timer stops in virtual timer startup stage to away from the time-consuming between nearest starting；
In the present embodiment, why to stop the hardware timer in step S203, be to be inserted into virtual timer in virtual timer queue due to subsequent, redefine the timing reference of hardware timer.
Specifically, in the present embodiment, the detailed schematic process of step S203 can be as shown in Figure 3.
Fig. 3 is the flow diagram for stopping hardware timer in the embodiment of the present application three.As shown in figure 3, it includes the following steps S213 to S223.
S213, stop the hardware timer；
In the present embodiment, it specifically can stop the hardware timer by enable signal or turn off the clock source of the hardware timer.
S223, determine that the hardware timer stops in virtual timer startup stage to away from the time-consuming between nearest starting；
In the present embodiment, if it is plus coujnt, then when calculating the time-consuming in step S223, subtracted with the dwell time in step S213 away from the nearest starting time；If it is based on if subtracting techniques, then the dwell time in step S213 is subtracted with away from the nearest starting time.
Further, the time-consuming in step S223 is being obtained, corresponding numerical value is assigned to time-consuming variable past_time_ms.
In the present embodiment, step S213 is executed before step S223, and still, in other embodiments, step S223 can also be executed in step S213.
S204, the virtual timer of the new timed task is corresponded to from determination in the not used virtual timer and is inserted it into the virtual timer queue.
In the present embodiment, the exemplary detailed process of step S204 can be as shown in Figure 4.
Fig. 4 is the flow diagram that virtual timer is inserted into the embodiment of the present application four.As shown in figure 4, it includes the following steps S214 to step S244.
S214, not used virtual timer is found in virtual timer queue；
Specifically, if if being ranked up from short to long to virtual timer in virtual timer queue according to timing, that is sequence of the shorter virtual timer of timing in virtual timer queue is forward, and sequence of the virtual timer of timing length in virtual timer queue is rearward, then in the present embodiment, not used virtual timer is found in step S214, traversal virtual timer queue is until search out first not used virtual timer from front to back, and using the not used virtual timer as virtual timer used in subsequent step S213.
S224, the use number for updating virtual timer in virtual timer；
Specifically, as previously mentioned, by step S224 be equivalent to modification property element used_sw_timer numerical value, the present embodiment, before the update on the basis of, increase property element used_sw_timer numerical value；For example if one virtual timer of insertion, then the numerical value of property element used_sw_timer adds one.
S234, new virtual timer is registered in virtual timer queue according to the virtual timer and incoming property element that determine in step S214；
In the present embodiment, the property element transmitted in step S234 include: virtual timer whether used flag bit used_flag, virtual timer timing property element remain_ms, participate in each property element required for the above-mentioned completion timing such as the property element used_sw_timer of number of virtual timer of timed task.
In the present embodiment, the property element that the process of registration is effectively equivalent to be passed to is added to the insertion process that virtual timer is finally completed in virtual timer queue.
S244, the successful result of virtual timer insertion is returned.
S205, judge whether there is the virtual timer for reaching timing in virtual timer queue in the virtual timer refreshing stage, if so, thening follow the steps S206: executing corresponding application task；If nothing, corresponding application task is not executed；
In the present embodiment, specifically, the timing that each virtual timer property element remain_ms is indicated in virtual timer queue when stopping hardware timer in step S203 is subtracted to the numerical value for being used in recording step S223 obtain time-consuming time-consuming variable past_time_ms；In a concrete application scene, if difference is less than or equal to 0, then it represents that corresponding virtually the virtual timer that device is arrival timing surely；In an other concrete application scene, if difference is less than the timing resolution of virtual timer, it is corresponding virtual fixed equally to also illustrate that Meeting device is the virtual timer for reaching timing.
S207, stopped in virtual timer startup stage to the time-consuming between the starting nearest apart from the stopping according to the hardware timer, determine the most short timer time in the virtual timer queue described after being inserted into virtual timer；
In the present embodiment, in a concrete application scene, above-mentioned steps S205 and step S207 can refresh the stage entering virtual timer；
Fig. 5 is the flow diagram that virtual timer refreshes the stage in the embodiment of the present application five；As shown in figure 5, it specifically comprises the following steps S216 to S276:
The timing that each virtual timer property element remain_ms is indicated in virtual timer queue when stopping hardware timer in step S203 is subtracted and is used in recording step S223 obtain the numerical value of time-consuming time-consuming variable past_time_ms and obtains several differences by S216, traversal virtual timer queue；
The corresponding difference of each virtual timer in S226, traversal virtual timer queue, determines the virtual timer for reaching timing；If jumping to step S276 without the virtual timer for reaching timing；
In a concrete application scene, if difference is less than or equal to 0, then it represents that corresponding virtually the virtual timer that device is arrival timing surely；In an other concrete application scene, if difference is less than the timing resolution of virtual timer, the virtual timer for corresponding to and virtually that device is arrival timing surely is equally also illustrated that.
S236, the corresponding application task of virtual timer for reaching timing is executed；
S246, judge that reaching the virtual timer of timing is periodical virtual timer or single virtual timer；If the virtual timer for reaching timing is periodical virtual timer, S256 is thened follow the steps；It is no to then follow the steps S266；
S256, the timing for configuring the timing of the arrival to the periodical virtual timer, and jump to step S276；
In the present embodiment, step S256 specific implementation are as follows: the timing of the arrival is assigned to property element reload_ms is again assigned to the numerical value of property element reload_ms and be used to record the remain_ms of the periodical virtual timer timing.
It S266, by the virtual timer attribute modification for reaching timing is while the property element used_sw_timer virtual timer indicated to be subtracted one using number using terminating and be currently in unused state；And jump to step S276；
It is that virtual timer is configured with the above-mentioned flag bit used_flag that whether uses, modifies the value of the flag bit used_flag, indicates that the virtual timer of arrival timing is configured to using terminating and be currently in unused state.
S276, the hardware timer stop in virtual timer startup stage to the time-consuming between the starting nearest apart from the stopping, determining the most short timer time in the virtual timer queue described after being inserted into virtual timer.
In the present embodiment, the specific implementation of step S276 can determine the most short timer time in the virtual timer queue described after being inserted into virtual timer according to the minimum ID number of the property element latest_sw_timer_index virtual timer recorded.
S208, judge whether there is also the virtual timers for executing timed task in the virtual timer queue, if so, thening follow the steps S209；Otherwise, step S210 is executed；
In the present embodiment, it can specifically be determined by the numerical value of property element used_sw_timer, if Its value is non-zero, indicates that there is also the virtual timers of the timed task of execution；Indicate that there is no the virtual timers for executing timed task if its value is 0.
In an other embodiment, step S208 be can be omitted.
S209, hardware timer startup stage is reentered, and the timing reference is updated according to the longest timing of most short timer time and the hardware timer in the virtual timer queue described after being inserted into virtual timer, and restart the hardware timer in virtual timer startup stage.
In the present embodiment, the specific implementation process of step S209 is as shown in Figure 6.
Fig. 6 is the flow diagram of hardware timer startup stage in the embodiment of the present application six；As shown in fig. 6, device includes the following steps S219 to S239:
S219, the updated timing reference is determined according to the longest timing of most short timer time and the hardware timer after being inserted into virtual timer in the virtual timer queue；
In the present embodiment, above-mentioned steps S218 is realized especially by following formula (2).
Cmp_val=MIN (remain_ms, HARDWARE_MAX_DELAY_MS) (2)
In above-mentioned formula (2), remain_ms is the property element for recording virtual timer timing, HARDWARE_MAX_DELAY_MS is the property element for recording the longest timing of hardware timer, by seeking the minimum value of remain_ms and HARDWARE_MAX_DELAY_MS, to obtain the updated timing reference.
In the present embodiment, for above-mentioned formula (2), may but being not limited to tool, there are two types of situations:
In a kind of situation, when the most short timer time after be inserted into virtual timer in the virtual timer queue is greater than the longest timing of hardware timer, due to when executing timed task, when the maximum timing for reaching hardware timer, the timing of virtual timer has counted not yet, above-mentioned new timed task can be also generated at this time, and needs updating software timer resource later.Since virtual timer queue can change, so needing to restart hardware timer；In the case of another, when the most short timer time after be inserted into virtual timer in the virtual timer queue is greater than the longest timing of hardware timer, when being reached at this time due to the most short timer time, the longest timing of hardware timer does not arrive also, also due to virtual timer queue can change, therefore updating software timer resource is needed, and needs to restart hardware timer.
It can be seen that, since the timing reference of hardware timer and the longest timing of hardware timer are related, and timing reference is related due to the timing of virtual timer, when the timing of virtual timer is longer, the refreshing frequency of virtual timer resource is lower, to guarantee that the utilization rate of CPU is lower, therefore the performance of processor is effectively increased, reduces the burden of processor.
S229, the updated timing reference is filled into the comparator that the regular device of hardware includes, to complete the update of the timing reference；
S239, the hardware timer is enabled.
In the present embodiment, the hardware timer is enabled especially by enable signal, to restart the hardware timer.
S210, the successful result of generation virtual timer starting is jumped to.
In the present embodiment, when implementing the starting of above-mentioned virtual timer, corresponding interface function can be pre-defined, illustratively, such as uint16_t sw_timer_start (uint8_t reload_flag, uint32_t time_ms, uint8_t*p_timer_id), wherein, reload_flag is any virtual timing of characterization as previously described Device is the flag bit of periodical virtual timer or single virtual timer, and time_ms indicates that the corresponding timing of new timed task, * p_timer_id indicate the ID number of the virtual timer device of insertion.It is passed to property element in above-mentioned steps S234 also these property elements are added in virtual timer queue together, wherein it should be noted that and the numerical value of time_ms is assigned to remain_ms.
After completing above-mentioned initialization correlation and after the starting of virtual timer and hardware timer, so that it may execute complete Timing Processing process.
Fig. 7 is the timing method flow diagram of virtual timer in the embodiment of the present application seven；As shown in fig. 7, it includes the following steps S701 to S705:
If the time of the counting of S701, the hardware timer to its timing reference, enters interrupt phase and stops the hardware timer；
In the present embodiment, if the difference of the time of the counting of the hardware timer and timing reference is 0, time of the counting of the hardware timer to its timing reference.
It is described to enter after the hardware interrupts stage in the present embodiment, before stopping the hardware timer, further includes: remove hardware interrupts flag bit；
S702, refresh the stage in virtual timer, judge whether there is the virtual timer for reaching timing in virtual timer queue；If thening follow the steps S703: executing corresponding application task；If nothing, corresponding application task is not executed, enters step S705 later；
This step judges whether have the realization for the virtual timer for reaching timing similar to above-mentioned steps S205 in virtual timer queue in the refreshing stage, refers to above-mentioned related record.
S704, according to the hardware timer from enter interrupt phase when it is described stopping and its before recently starting between time-consuming, determine enter most short timer time of the interrupt phase since at the time of the hardware timer stops in the virtual timer queue；
In the present embodiment, step S704, which is determined, enters most short timer time of the interrupt phase since at the time of the hardware timer stops in the virtual timer queue similar to above-mentioned steps S207, refers to above-mentioned related record.
S705, the timing reference is updated into hardware timer startup stage and according to the longest timing of the most short timer time and the hardware timer, exits interrupt phase to restart the hardware timer.
In the present embodiment, step S705 enters the processing of hardware timer startup stage similar to above-mentioned steps S208, refers to above-mentioned related record.
In the present embodiment, interrupt phase is exited according to hardware interrupts flag bit after removing when exiting interrupt phase, due to removing hardware interrupts flag bit, after having executed the update timing reference, to ensure that exiting for interrupt phase.
It should be noted that, in other embodiments, it is described execute corresponding application task after, it determines before entering most short timer time of the interrupt phase since at the time of the hardware timer stops in the virtual timer queue, further include: when the virtual timer for reaching timing is periodical virtual timer, configure the timing of the arrival to the timing of the periodical virtual timer；When the virtual timer for reaching timing is single virtual timer, the virtual timer attribute of timing will be reached It is revised as using terminating and be currently in unused state.The attribute modification is depended on and is modified to the numerical value of flag bit used_flag to realize.
Further, when the virtual timer for reaching timing is single virtual timer, further includes: stop and delete the virtual timer for reaching timing from the virtual timer queue.
One in the specific implementation, being the processing for realizing above-mentioned Fig. 7, a function can configure, for example be void timerA_isr_handler (void).
The specific virtual timer process flow shown in Figure 8 of stopping processing of virtual timer is realized.Fig. 8 is the stopping process flow diagram of virtual timer in the embodiment of the present application eight.As shown in figure 8, it includes the following steps S811-S817:
S811, into virtual timer stop phase and judge the virtual timer to be stopped ID number it is whether effective；If effectively, thening follow the steps S812；If invalid, the invalid result of the ID of virtual timer is returned；
In the present embodiment, the maximum virtual timer quantity that the ID number for the virtual timer to be stopped indicates if more than property element SW_TIMER_CNT, then it is invalid to determine.
For example, if the ID number of the virtual timer stopped and timed task mismatch, it is invalid to determine in the present embodiment.
Whether the timing of S812, the judgement virtual timer to be stopped is most short timer time into interrupt phase when the hardware timer stops in virtual timer queue；If so, thening follow the steps S813；Otherwise, the virtual timer to be stopped is not most short timer time corresponding virtual timer；
In the present embodiment, it can determine that the most short timer time when executing S812 in virtual timer queue by property element latest_sw_timer_index, it is not right that the timing of the most short timer time and the virtual timer to be stopped carries out, if the two is equal, the timing for the virtual timer then to be stopped is the most short timer time into interrupt phase when the hardware timer stops in virtual timer queue, that is, the virtual timer to be stopped is most short timer time corresponding virtual timer；If the two is unequal, the virtual timer to be stopped is not most short timer time corresponding virtual timer.
Virtual timer to stopping is most short timer time corresponding virtual timer, because subsequent will stop the virtual timer or restarting progress periodically timing, so starting virtual timer refresh process, redefines the most short timer time in virtual timer queue；If the virtual timer stopped is not most short timer time corresponding virtual timer, since the most short timer time in virtual timer queue can't change, therefore, the virtual timer of stopping can directly being deleted from virtual timer queue, to avoid deactivation hardware timer again and update timing base, to improve efficiency, delay is reduced, the burden of cpu resource is alleviated.
S813, stop hardware timer, and time-consuming of the hardware timer before the stopping of virtual timer stop phase and the stopping between starting recently in virtual timer stop phase；
In the present embodiment, step S813 is similar to above-mentioned steps S203.
S814, the flag bit used_flag of the effective virtual timer of ID in step S811 is revised as to false, and the property element used_sw_timer virtual timer indicated is subtracted one using number；
In the present embodiment, to be deleted from virtual timer queue due to reaching timing and stopping the virtual timer of timing, accordingly, relevant property element is safeguarded.
S815, refresh the corresponding application task of virtual timer that stage execution reaches timing in virtual timer；
S816, the time-consuming according to the hardware timer before the stopping of virtual timer stop phase and the stopping between starting recently, determine the most short timer time in the virtual timer queue；
In the present embodiment, step S816 similar step S206.
S817, the timing reference is updated into hardware timer startup stage and according to the longest timing of the most short timer time and the hardware timer, exits interrupt phase to restart the hardware timer.
In the present embodiment, step S817 is similar to above-described embodiment 208.
In concrete application scene, a function, such as uint16_t sw_timer_stop (uint8_t timer_id) can be configured for realization stopping process shown in Fig. 8.
In the above-described embodiments, for embedded system, under different MCU platforms, the longest timing of hardware timer is related to the bit wide of the clock of hardware timer, hardware timer.In the influence for not considering clock, then the influence to longest timing just only has the bit wide of hardware timer.The usually bit wide of our hardware timer and the platform of MCU is related, for example the most commonly used is 16 hardware timers and 32 hardware timers, therefore, due to when determining hardware regularly timing reference, the minimum value of most short timer time and longest timing are taken, to also just shield the otherness of different platform longest timing.
It should be noted that in the above-described embodiments, when needing to refresh or restart or stop virtual timer, can according to need carry out hardware interrupts, repeating no more in detail.
Fig. 9 is the structural schematic diagram of the timing means of virtual timer in the embodiment of the present application nine；As shown in fig. 9, it includes:
Interrupt module 901, for into interrupt phase and stopping the hardware timer when the time of the counting of the hardware timer is to its timing reference；
Timing module 902 judges whether there is the virtual timer for reaching timing in virtual timer queue for refreshing the stage in virtual timer；If so, then executing corresponding application task；If nothing, corresponding application task is not executed；
Refresh module 903, for, from the time-consuming between stopping described when entering interrupt phase and its before starting recently, determining according to the hardware timer and entering most short timer time of the interrupt phase since at the time of the hardware timer stops in the virtual timer queue；
Starting module 904 exits interrupt phase for entering hardware timer startup stage and updating the timing reference according to the longest timing of the most short timer time and the hardware timer to restart the hardware timer.
Interrupt module 901, timing module 902, refresh module 903, starting module 904 can execute in the corresponding specific steps of above method embodiment or further the step of.
The present embodiment also provides a kind of electronic device comprising: hardware timer, several virtual timers, processor enter interrupt phase when the time of the counting of the hardware timer is to its timing reference and stop the hardware timer；The processor is used for:
Refresh the stage in virtual timer, judges whether there is the virtual timer for reaching timing in virtual timer queue；If so, then executing corresponding application task；If nothing, corresponding application task is not executed；
According to the hardware timer from the time-consuming between stopping described when entering interrupt phase and its before starting recently, determines and enter most short timer time of the interrupt phase since at the time of the hardware timer stops in the virtual timer queue；
So that hardware timer enters hardware timer startup stage and updates the timing reference according to the longest timing of the most short timer time and the hardware timer, interrupt phase is exited to restart the hardware timer.
In the present embodiment, processor can be also possible to MCU with CPU.
The electronic device of the embodiment of the present application can be specific circuit, or complete machine electronic equipment, including but not limited to:
(1) mobile communication equipment: the characteristics of this kind of equipment is that have mobile communication function, and to provide speech, data communication as main target.This Terminal Type includes: smart phone (such as iPhone), multimedia handset, functional mobile phone and low-end mobile phone etc..
(2) super mobile personal computer equipment: this kind of equipment belongs to the scope of personal computer, has calculating and processing function, generally also has mobile Internet access characteristic.This Terminal Type includes: PDA, MID and UMPC equipment etc., such as iPad.
(3) portable entertainment device: this kind of equipment can show and play multimedia content.Such equipment includes: audio, video player (such as iPod), handheld device, e-book and intelligent toy and portable car-mounted navigation equipment.
(4) server: the equipment of the service of calculating is provided, the composition of server includes processor, hard disk, memory, system bus etc., server is similar with general computer architecture, but due to needing to provide highly reliable service, processing capacity, stability, reliability, safety, scalability, in terms of it is more demanding.
(5) other electronic devices with data interaction function.
The apparatus embodiments described above are merely exemplary, wherein the module as illustrated by the separation member may or may not be physically separated, the component shown as module may or may not be physical module, can be in one place, or may be distributed on multiple network modules.Some or all of the modules therein can be selected to achieve the purpose of the solution of this embodiment according to the actual needs.Those of ordinary skill in the art are without paying creative labor, it can understand and implement.
Through the above description of the embodiments, those skilled in the art can be understood that each embodiment can be realized by means of software and necessary general hardware platform, naturally it is also possible to pass through hardware.Based on this understanding, substantially the part that contributes to existing technology can be embodied in the form of software products above-mentioned technical proposal in other words, the computer software product may be stored in a computer readable storage medium, and the computer readable recording medium includes for any mechanism of the readable form storage of computer (such as computer) or transmission information.Such as, machine readable media include read-only memory (ROM), random access memory (RAM), magnetic disk storage medium, optical storage media, flash medium, electricity, light, sound or other forms transmitting signal (such as, carrier wave, infrared signal, digital signal etc.) etc., the computer software product includes that some instructions are used so that a computer equipment (can be personal computer, server or the network equipment etc.) execute method described in certain parts of each embodiment or embodiment.
It will be understood by those skilled in the art that the embodiments of the present application may be provided as method, apparatus (equipment) or computer program products.Therefore, the embodiment of the present application can be used complete hardware embodiment, completely it is soft The form of part embodiment or embodiment combining software and hardware aspects.Moreover, the form for the computer program product implemented in the computer-usable storage medium (including but not limited to magnetic disk storage, CD-ROM, optical memory etc.) that one or more wherein includes computer usable program code can be used in the embodiment of the present application.
The embodiment of the present application is that reference is described according to the method, apparatus (equipment) of the embodiment of the present application and the flowchart and/or the block diagram of computer program product.It should be understood that the combination of process and/or box in each flow and/or block and flowchart and/or the block diagram that can be realized by computer program instructions in flowchart and/or the block diagram.These computer program instructions be can provide to the processor of general purpose computer, special purpose computer, Embedded Processor or other programmable data processing devices to generate a machine, so that generating by the instruction that computer or the processor of other programmable data processing devices execute for realizing the device for the function of specifying in one or more flows of the flowchart and/or one or more blocks of the block diagram.
These computer program instructions, which may also be stored in, to be able to guide in computer or other programmable data processing devices computer-readable memory operate in a specific manner, so that instruction stored in the computer readable memory generates the manufacture including command device, which realizes the function of specifying in one or more flows of the flowchart and/or one or more blocks of the block diagram.
These computer program instructions also can be loaded onto a computer or other programmable data processing device, so that series of operation steps are executed on a computer or other programmable device to generate computer implemented processing, thus the step of instruction executed on a computer or other programmable device is provided for realizing the function of specifying in one or more flows of the flowchart and/or one or more blocks of the block diagram.
Finally, it should be noted that above embodiments are only to illustrate the technical solution of the embodiment of the present application, rather than its limitations；Although the application is described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it is still possible to modify the technical solutions described in the foregoing embodiments or equivalent replacement of some of the technical features；And these are modified or replaceed, the spirit and scope of each embodiment technical solution of the application that it does not separate the essence of the corresponding technical solution.

Claims (17)

  1. A kind of timing method of virtual timer characterized by comprising
    If the time of the counting of hardware timer to its timing reference, enters interrupt phase and stops the hardware timer；
    Refresh the stage in virtual timer, judges whether there is the virtual timer for reaching timing in virtual timer queue；If so, then executing corresponding application task；If nothing, corresponding application task is not executed；
    According to the hardware timer from the time-consuming between stopping described when entering interrupt phase and its before starting recently, determines and enter most short timer time of the interrupt phase since at the time of the hardware timer stops in the virtual timer queue；
    The timing reference is updated into hardware timer startup stage and according to the longest timing of the most short timer time and the hardware timer, exits interrupt phase to restart the hardware timer.
  2. Timing method according to claim 1, which is characterized in that it is described to enter after the hardware interrupts stage, before stopping the hardware timer, further includes: remove hardware interrupts flag bit；Accordingly, exiting interrupt phase includes exiting interrupt phase according to hardware interrupts flag bit after removing.
  3. Timing method according to claim 1, it is characterized in that, before the time to its timing reference of the counting of the hardware timer, further includes: at least one of property element, the operating mode of the hardware timer in initialization of virtual timer resource in each virtual timer.
  4. Timing method according to claim 3, it is characterized in that, the property element includes: the flag bit for characterizing any virtual timer and whether having been used, the timing for recording any virtual timer, characterizes the flag bit that any virtual timer is periodical virtual timer or single virtual timer.
  5. Timing method according to claim 1, it is characterized in that, if desired new timed task is executed, into virtual timer startup stage, and whether timing needed for judging the new timed task is reasonable, if so, further judging whether there are also not used virtual timers in virtual timer resource, if so, from the virtual timer for determining the corresponding new timed task in the not used virtual timer and inserting it into the virtual timer queue.
  6. According to the timing method in claim 5, it is characterized in that, according to most numbers of virtual timer in the virtual timer quantity and virtual timer resource for executing each timed task in virtual timer queue, judge whether there are also not used virtual timers in virtual timer resource.
  7. Timing method according to claim 5, which is characterized in that whether the matched timing of new timed task institute according to the timing threshold decision of setting is reasonable.
  8. Timing method according to claim 7, which is characterized in that the timing threshold value has upper threshold and bottom threshold, accordingly, judges whether the matched timing of the new timed task institute is reasonable according to the upper threshold and bottom threshold.
  9. Timing method according to claim 5, it is characterized in that, before the virtual timer for corresponding to the new timed task is inserted into the virtual timer queue, further include: stop the hardware timer in virtual timer startup stage, and determines that the hardware timer stops in virtual timer startup stage to away from the time-consuming between nearest starting；
    After the corresponding virtual timer of the new timed task is inserted into the virtual timer queue, Further include:
    Judge whether there is the virtual timer for reaching timing in virtual timer queue in the virtual timer refreshing stage, if so, then executing corresponding application task；If nothing, corresponding application task is not executed；
    Stopped in virtual timer startup stage to the time-consuming between the starting nearest apart from the stopping according to the hardware timer, determines the most short timer time in the virtual timer queue described after being inserted into virtual timer；
    Reenter hardware timer startup stage, and the timing reference is updated according to the longest timing of most short timer time and the hardware timer in the virtual timer queue described after being inserted into virtual timer, and restart the hardware timer in virtual timer startup stage.
  10. Timing method according to claim 9, it is characterized in that, after judging whether to have in virtual timer queue the virtual timer for reaching timing in virtual timer startup stage, further include: judge whether there is also the virtual timers for executing timed task in the virtual timer queue, if so, reentering hardware timer startup stage.
  11. Timing method according to claim 1, which is characterized in that it is described execute corresponding application task after, determine before entering most short timer time of the interrupt phase since at the time of the hardware timer stops in the virtual timer queue, further includes:
    When the virtual timer for reaching timing is periodical virtual timer, it configures the timing of the arrival to the timing of the periodical virtual timer；
    It is using terminating and be currently in unused state by the virtual timer attribute modification for reaching timing when the virtual timer for reaching timing is single virtual timer.
  12. Timing method according to claim 11, which is characterized in that when the virtual timer for reaching timing is single virtual timer, further includes: stop and delete the virtual timer for reaching timing from the virtual timer queue.
  13. Timing method according to claim 12, which is characterized in that stop reach timing virtual timer include:
    Into virtual timer stop phase and judge whether the ID number for the virtual timer to be stopped is effective；
    If effectively, judging whether the timing for the virtual timer to be stopped is most short timer time into interrupt phase when the hardware timer stops in virtual timer queue；If so, stopping hardware timer in virtual timer stop phase, and enters virtual timer and refresh the stage；
    Refresh the corresponding application task of virtual timer that stage execution reaches timing in virtual timer；
    According to time-consuming of the hardware timer before the stopping of virtual timer stop phase and the stopping between starting recently, the most short timer time in the virtual timer queue is determined；
    The timing reference is updated into hardware timer startup stage and according to the longest timing of the most short timer time and the hardware timer, exits interrupt phase to restart the hardware timer.
  14. Timing method according to claim 11, it is characterized in that, the flag bit whether used is configured with for virtual timer, when the virtual timer for reaching timing is single virtual timer, it is using terminating and be currently in unused state to include: the value for modify flag bit, to indicate that the virtual timer of arrival timing is configured to using terminating and be currently in unused state by the virtual timer attribute modification for reaching timing.
  15. Timing method according to claim 1, which is characterized in that stop the hardware timer Later, before judging whether to have in virtual timer queue the virtual timer for reaching timing further include:
    It traverses all virtual timers in the virtual timer queue and determines the timing of wherein each virtual timer and the difference of the time-consuming, to judge whether there is the virtual timer for reaching timing in virtual timer queue according to the difference.
  16. A kind of timing means of virtual timer characterized by comprising
    Interrupt module, for into interrupt phase and stopping the hardware timer when the time of the counting of hardware timer is to its timing reference；
    Timing module judges whether there is the virtual timer for reaching timing in virtual timer queue for refreshing the stage in virtual timer；If so, then executing corresponding application task；If nothing, corresponding application task is not executed；
    Refresh module, for, from the time-consuming between stopping described when entering interrupt phase and its before starting recently, determining according to the hardware timer and entering most short timer time of the interrupt phase since at the time of the hardware timer stops in the virtual timer queue；
    Starting module exits interrupt phase for entering hardware timer startup stage and updating the timing reference according to the longest timing of the most short timer time and the hardware timer to restart the hardware timer.
  17. A kind of electronic device characterized by comprising hardware timer, several virtual timers, processor, if the time of the counting of hardware timer to its timing reference, enters interrupt phase and stops the hardware timer；The processor is used for:
    Refresh the stage in virtual timer, judges whether there is the virtual timer for reaching timing in virtual timer queue；If so, then executing corresponding application task；If nothing, corresponding application task is not executed；
    According to the hardware timer from the time-consuming between stopping described when entering interrupt phase and its before starting recently, determines and enter most short timer time of the interrupt phase since at the time of the hardware timer stops in the virtual timer queue；
    So that hardware timer enters hardware timer startup stage and updates the timing reference according to the longest timing of the most short timer time and the hardware timer, interrupt phase is exited to restart the hardware timer.
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