CN112463125B - Timing method and equipment of virtual timer - Google Patents
Timing method and equipment of virtual timer Download PDFInfo
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- CN112463125B CN112463125B CN202011429859.6A CN202011429859A CN112463125B CN 112463125 B CN112463125 B CN 112463125B CN 202011429859 A CN202011429859 A CN 202011429859A CN 112463125 B CN112463125 B CN 112463125B
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Abstract
The application is applicable to the technical field of computers, and provides a timing method of a virtual timer, which comprises the following steps: acquiring first increment time of a monotonically-increasing clock, determining first virtual alarm clock time according to the first increment time and the timing time length, creating a virtual timer according to the first virtual alarm clock time and a processing task, and determining a system alarm clock task according to the first virtual alarm clock time; when the system clock triggers the system alarm clock task, acquiring a second increasing time of the monotonically increasing clock; obtaining virtual alarm clock time corresponding to each virtual timer, and determining the virtual timer with the virtual alarm clock time smaller than or equal to the second increment time as a target timer; the execution target timer corresponds to a processing task. All the timing is based on a monotonically increasing clock and not based on system time, when the system time is wrong, the timer cannot be wrong, the precision of the virtual timer is improved, when a plurality of timing functions are needed, a plurality of hardware timers are not needed, and the hardware cost is reduced.
Description
Technical Field
The application belongs to the technical field of computers, and particularly relates to a timing method and equipment of a virtual timer.
Background
In the process of developing embedded system software, a timing function is often required, and the timing function can be generally realized through a software timer and a hardware timer. Since the timer of the pure software is easily affected by the system time, once the system time has a problem, the timer of the pure software has an error. When the precision requirement on timing is high, the timing is generally realized by a hardware timer. However, when multiple timing functions are required, multiple hardware timers are required, which results in excessive hardware costs.
Disclosure of Invention
The embodiment of the application provides a timing method and equipment of a virtual timer, which can solve the problems that a plurality of hardware timers are required to be provided when a plurality of timing functions are required to be used and the hardware cost is too high.
In a first aspect, an embodiment of the present application provides a method for timing a virtual timer, including:
receiving a timing request, wherein the timing request comprises a timing duration and a processing task;
acquiring first increment time of a monotonically increasing clock, and determining first virtual alarm clock time according to the first increment time and the timing duration;
creating a virtual timer according to the first virtual alarm clock time and the processing task, and determining a system alarm clock task according to the first virtual alarm clock time;
when the system clock triggers a system alarm clock task, acquiring second increasing time of the monotonically increasing clock;
obtaining virtual alarm clock time corresponding to each virtual timer, and determining the virtual timer with the virtual alarm clock time smaller than or equal to the second increment time as a target timer;
and executing the processing task corresponding to the target timer.
Further, the determining the system alarm clock task according to the first virtual alarm clock time includes:
if the first virtual alarm clock time is the minimum virtual alarm clock time corresponding to each virtual timer, acquiring first system time corresponding to a system clock;
adding the timing duration to the first system time to obtain a first system alarm clock time;
and setting a system alarm clock task according to the first system alarm clock time.
Further, the creating a virtual timer according to the first virtual alarm clock time and the processing task includes:
creating a virtual timer according to the processing task, and acquiring a first virtual alarm clock corresponding to the first virtual alarm clock time;
the virtual timer is associated with the first virtual alarm clock.
Further, the obtaining a first virtual alarm clock corresponding to the first virtual alarm clock time includes:
if a virtual alarm clock with the same virtual alarm clock time as the first virtual alarm clock time exists, determining the virtual alarm clock as the first virtual alarm clock;
if the virtual alarm clock with the same virtual alarm clock time as the first virtual alarm clock time does not exist, a first virtual alarm clock is created according to the first virtual alarm clock time.
Further, the obtaining the first increment time of the monotonically increasing clock includes:
and calculating the first increment time of the monotonically-increasing clock according to the first system time of the system clock and the mapping relation between the monotonically-increasing clock and the system clock.
Further, after the executing the processing task corresponding to the target timer, the method further includes:
and removing the target timer.
Further, after the executing the processing task corresponding to the target timer, the method further includes:
and updating the alarm clock task of the system according to the virtual alarm clock time of the virtual timer except the target timer.
Further, the updating the system alarm clock task according to the virtual alarm clock time of the virtual timer except the target timer includes:
and if the virtual timer except the target timer does not exist, ending the alarm clock task of the system.
Further, the updating the system alarm clock task according to the virtual alarm clock time of the virtual timer except the target timer includes:
if the virtual timer outside the target timer exists, acquiring the minimum virtual alarm clock time corresponding to the virtual timer outside the target timer;
calculating the second system alarm clock time according to the minimum virtual alarm clock time and the mapping relation between the virtual alarm clock time and the system alarm clock time;
and updating the system alarm clock task according to the second system alarm clock time.
In a second aspect, an embodiment of the present application provides a timing apparatus of a virtual timer, including:
a receiving unit, configured to receive a timing request, where the timing request includes a timing duration and a processing task;
the first processing unit is used for acquiring first increment time of the monotonically-increasing clock and determining first virtual alarm clock time according to the first increment time and the timing duration;
the second processing unit is used for creating a virtual timer according to the first virtual alarm clock time and the processing task and determining a system alarm clock task according to the first virtual alarm clock time;
the third processing unit is used for acquiring the second increasing time of the monotonically increasing clock when the system clock triggers the system alarm clock task;
the fourth processing unit is used for obtaining the virtual alarm clock time corresponding to each virtual timer and determining the virtual timer with the virtual alarm clock time smaller than or equal to the second increment time as a target timer;
and the execution unit is used for executing the processing task corresponding to the target timer.
Further, the second processing unit is specifically configured to:
if the first virtual alarm clock time is the minimum virtual alarm clock time corresponding to each virtual timer, acquiring first system time corresponding to a system clock;
adding the timing duration to the first system time to obtain a first system alarm clock time;
and setting a system alarm clock task according to the first system alarm clock time.
Further, the second processing unit is specifically configured to:
creating a virtual timer according to the processing task, and acquiring a first virtual alarm clock corresponding to the first virtual alarm clock time;
the virtual timer is associated with the first virtual alarm clock.
Further, the second processing unit is specifically configured to:
if a virtual alarm clock with the same virtual alarm clock time as the first virtual alarm clock time exists, determining the virtual alarm clock as the first virtual alarm clock;
if the virtual alarm clock with the same virtual alarm clock time as the first virtual alarm clock time does not exist, a first virtual alarm clock is created according to the first virtual alarm clock time.
Further, the first processing unit is specifically configured to:
and calculating the first increment time of the monotonically-increasing clock according to the first system time of the system clock and the mapping relation between the monotonically-increasing clock and the system clock.
Further, the timing device of the virtual timer further comprises:
and a fifth processing unit for removing the target timer.
Further, the timing device of the virtual timer further comprises:
and the sixth processing unit is used for updating the alarm clock task of the system according to the virtual alarm clock time of the virtual timer except the target timer.
Further, the sixth processing unit is specifically configured to:
and if the virtual timer except the target timer does not exist, ending the alarm clock task of the system.
Further, the sixth processing unit is specifically configured to:
if the virtual timer outside the target timer exists, acquiring the minimum virtual alarm clock time corresponding to the virtual timer outside the target timer;
calculating the second system alarm clock time according to the minimum virtual alarm clock time and the mapping relation between the virtual alarm clock time and the system alarm clock time;
and updating the system alarm clock task according to the second system alarm clock time.
In a third aspect, an embodiment of the present application provides a timing device for a virtual timer, including a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor implements the method for timing a virtual timer according to the first aspect.
In a fourth aspect, an embodiment of the present application provides a computer readable storage medium storing a computer program, where the computer program when executed by a processor implements the method for timing a virtual timer according to the first aspect.
In the embodiment of the application, a timing request is received, a first increment time of a monotonically increment clock is obtained, a first virtual alarm clock time is determined according to the first increment time and the timing duration, a virtual timer is established according to the first virtual alarm clock time and a processing task, and a system alarm clock task is determined according to the first virtual alarm clock time; when the system clock triggers the system alarm clock task, acquiring a second increasing time of the monotonically increasing clock; obtaining virtual alarm clock time corresponding to each virtual timer, and determining the virtual timer with the virtual alarm clock time smaller than or equal to the second increment time as a target timer; the execution target timer corresponds to a processing task. According to the method, a monotonically increasing clock is created, a virtual timer is created and generated based on the monotonically increasing virtual clock, a system alarm clock task is determined according to the first virtual alarm clock time corresponding to the virtual timer, and then whether a processing task corresponding to the target timer is executed or not is determined according to the current second increasing time when the system clock triggers the system alarm clock task. That is, all the timings are based on monotonically increasing clocks and not based on actual system time, so that when the system time is manually adjusted or is in error, the timer is not in error, the precision of the virtual timer is improved, and when a plurality of timing functions are needed to be realized, an unlimited number of virtual timers can be directly set, and a plurality of timing functions can be realized without setting a plurality of hardware timers, thereby reducing the hardware cost.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic flow chart of a method for timing a virtual timer according to a first embodiment of the present application;
FIG. 2 is a schematic diagram of a timing device of a virtual timer according to a second embodiment of the present application;
fig. 3 is a schematic diagram of a timing device of a virtual timer according to a third embodiment of the present application.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth such as the particular system architecture, techniques, etc., in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
It should be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It should also be understood that the term "and/or" as used in the present specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.
As used in the present description and the appended claims, the term "if" may be interpreted as "when..once" or "in response to a determination" or "in response to detection" depending on the context. Similarly, the phrase "if a determination" or "if a [ described condition or event ] is detected" may be interpreted in the context of meaning "upon determination" or "in response to determination" or "upon detection of a [ described condition or event ]" or "in response to detection of a [ described condition or event ]".
Furthermore, the terms "first," "second," "third," and the like in the description of the present specification and in the appended claims, are used for distinguishing between descriptions and not necessarily for indicating or implying a relative importance.
Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise.
Referring to fig. 1, fig. 1 is a schematic flowchart of a method for timing a virtual timer according to a first embodiment of the present application. The execution subject of a timing method of a virtual timer in this embodiment is a device having a timing function of the virtual timer, for example, a desktop computer, a server, a mobile device, and the like. The timing method of the virtual timer as shown in fig. 1 may include:
s101: a timing request is received, the timing request including a timing duration and a processing task.
The device receives a timing request, wherein the timing request includes a timing duration and a processing task. The timing request is a request set by a user and executed after the timing time length passes, the device can receive the timing request sent by other devices through the network, and the device can also generate the timing request according to the operation of the user at the local end. For example, a user may input a timing duration and a processing task on a device, which generates a timing request based on the timing duration and the processing task entered by the user.
S102: and acquiring first increment time of the monotonically-increasing clock, and determining first virtual alarm clock time according to the first increment time and the timing duration.
In this embodiment, a monotonically increasing clock is stored in advance, and the zero point of the monotonically increasing clock is the real-time system time when the monotonically increasing clock is set, and the system clock is used as a base, and a certain time of the system clock is used as a starting point, and the other time is kept the same as the system clock. A monotonically increasing clock is a time system that keeps monotonically increasing all the time after creation, and this monotonically increasing clock will go forward all the way, without jumping due to any change in system time. The device may initialize the timing system and then create a monotonically increasing clock when setting the monotonically increasing clock. If the monotonically increasing clock is marked as TV, the current system time TC is acquired, and TC is taken as the zero point of the TV. All timings in this embodiment are based on monotonically increasing clocks, not on actual system time.
The device obtains a first increment time of the monotonically-increasing clock, wherein the first increment time is the monotonically-increasing duration of the monotonically-increasing clock. The device may obtain the first increment time by a separate hardware implementation or by software setting an unalterable clock when obtaining the first increment time of the monotonically increasing clock, without limitation.
In addition, when the first increment time of the monotonically increasing clock is acquired, the first increment time of the monotonically increasing clock may also be calculated according to the first system time of the system clock and the mapping relationship between the monotonically increasing clock and the system clock. The mapping relation between the monotonically increasing clock and the system clock is stored in the device in advance, so that the device can determine the increasing time of the monotonically increasing clock according to the mapping relation after acquiring the system time.
The mapping relationship between the monotonically increasing clock and the system clock can be a preset calculation rule. For example, the device initializes the timing system when it sets a monotonically increasing clock, then creates a monotonically increasing clock, labeled TV, obtains the current system time TC, and takes TC as the zero point for TV. And sets the deviation tof=0 between TV and system time. When the system time is adjusted each time, the system alarm clock and TOF are respectively required to be adjusted synchronously. For example, when the system time is adjusted from T1 to T2, the TOF is adjusted to: tof=tof+ (T2-T1). The device acquires a first system time, labeled TC1, and monotonically increases the first increasing time tvc1=tc1-TC-TOF of the clock.
After determining the first increment time, the device determines a first virtual alarm clock time according to the first increment time and the timing duration. The first increment time is marked TVC1 and the timing duration is marked TL, then the first virtual alarm clock time tva1=tvc1+tl.
S103: and creating a virtual timer according to the first virtual alarm clock time and the processing task, and determining a system alarm clock task according to the first virtual alarm clock time.
The device creates a virtual timer according to the first virtual alarm clock time and the processing task. The virtual timer created by the device needs to perform a processing task when it is the first virtual alarm clock time TVA1 of the monotonically increasing clock.
When the virtual timer is created, the virtual timer can be created according to the processing task, the first virtual alarm clock corresponding to the first virtual alarm clock time is acquired, then the virtual timer is associated with the first virtual alarm clock, and the processing task is executed when the first virtual alarm clock time of the monotonically increasing clock is set.
Further, when the first virtual alarm clock corresponding to the first virtual alarm clock time is acquired, if a virtual alarm clock with the same virtual alarm clock time as the first virtual alarm clock time exists, determining the virtual alarm clock as the first virtual alarm clock; if the virtual alarm clock with the same virtual alarm clock time as the first virtual alarm clock time does not exist, the first virtual alarm clock is created according to the first virtual alarm clock time.
Further, a virtual alarm clock queue may be preset in the device, for storing all generated virtual alarm clocks. The device may associate the first virtual alarm clock with a virtual timer and then join a preset virtual alarm clock queue.
The device determines a system alarm clock task according to the first virtual alarm clock time, wherein the device maps the first virtual alarm clock time corresponding to the virtual timer to the system time, and sets the system alarm clock task according to the system time.
Specifically, according to the first virtual alarm clock time, determining a system alarm clock task, checking all virtual alarm clocks by the equipment, and if the first virtual alarm clock time is the minimum virtual alarm clock time corresponding to each virtual timer, indicating the alarm clock with the first virtual alarm clock time expired first, acquiring the first system time corresponding to the system clock. Or if the first virtual alarm clock time is the virtual alarm clock time corresponding to the only one virtual timer, the device also acquires the first system time corresponding to the system clock. Then, the device adds the timing time to the first system time to obtain a first system alarm clock time, and sets a system alarm clock task according to the first system alarm clock time.
For example, the device may look at the virtual alarm clock queue mentioned above, if there is only a virtual alarm clock time corresponding to one virtual timer in the virtual alarm clock queue, or when there are virtual alarm clock times corresponding to multiple virtual timers in the virtual alarm clock queue, but A1 is the first expired alarm clock, A1 is the first virtual alarm clock time, the first system time corresponding to the system clock is obtained, denoted by TC1, and the system alarm clock task tsa1=tc1+tl, where TL is the timing duration.
S104: and when the system clock triggers the system alarm clock task, acquiring the second increasing time of the monotonically increasing clock.
The system clock triggers a system alarm clock task, the system alarm clock time of the system alarm clock task expires, the system alarm clock task is triggered, and the equipment acquires the second increasing time of the monotonically increasing clock. The second increment time of the monotonically increasing clock acquired by the device may refer to the specific description of acquiring the first increment time in S102, which is not described herein.
Taking the calculation manner according to the mapping relation between the monotonically increasing clock and the system clock in S102 as an example, the device obtains the second increasing time in a brief manner, reads the current system time TC2, and calculates the second increasing time TVC2, tvc2=tc2-TC-TOF.
S105: and acquiring the virtual alarm clock time corresponding to each virtual timer, and determining the virtual timer with the virtual alarm clock time smaller than or equal to the second increment time as a target timer.
The device acquires the virtual alarm clock time corresponding to each virtual timer, and if a virtual alarm clock queue is preset in the device, the device can traverse the virtual alarm clock time corresponding to all the virtual timers in the virtual alarm clock queue. The device determines a virtual timer having a virtual alarm clock time less than or equal to the second incremental time as the target timer. That is, the device performs the virtual timers whose virtual alarm clock times are less than or equal to the second increment time in a unified manner.
S106: and executing the processing task corresponding to the target timer.
The device executes the processing tasks corresponding to the virtual timers with the virtual alarm clock time smaller than or equal to the second increment time.
Further, after the executing the processing task corresponding to the target timer, the method further includes: and removing the target timer. In this embodiment, after the processing task is performed, the target timer may be removed directly, or the target timer may be removed by removing the virtual alarm clock. In this way, it is ensured that no repeated execution occurs and no timing error occurs.
Further, after the executing the processing task corresponding to the target timer, the method further includes: and updating the alarm clock task of the system according to the virtual alarm clock time of the virtual timer except the target timer. In this embodiment, the device updates the system alarm tasks based on the virtual alarm time of the virtual timer other than the target timer. And after updating the system alarm clock task, re-executing S104-S106, and after triggering the system alarm clock task, starting to determine a new target timer and executing a corresponding processing task.
And in the updating process, if the virtual timer except the target timer does not exist, ending the alarm clock task of the system. If the virtual timer outside the target timer exists, acquiring the minimum virtual alarm clock time corresponding to the virtual timer outside the target timer; calculating the second system alarm clock time according to the minimum virtual alarm clock time and the mapping relation between the virtual alarm clock time and the system alarm clock time; and updating the system alarm clock task according to the second system alarm clock time.
In the embodiment of the application, a timing request is received, a first increment time of a monotonically increment clock is obtained, a first virtual alarm clock time is determined according to the first increment time and the timing duration, a virtual timer is established according to the first virtual alarm clock time and a processing task, and a system alarm clock task is determined according to the first virtual alarm clock time; when the system clock triggers the system alarm clock task, acquiring a second increasing time of the monotonically increasing clock; obtaining virtual alarm clock time corresponding to each virtual timer, and determining the virtual timer with the virtual alarm clock time smaller than or equal to the second increment time as a target timer; the execution target timer corresponds to a processing task. According to the method, a monotonically increasing clock is created, a virtual timer is created and generated based on the monotonically increasing virtual clock, a system alarm clock task is determined according to the first virtual alarm clock time corresponding to the virtual timer, and then whether a processing task corresponding to the target timer is executed or not is determined according to the current second increasing time when the system clock triggers the system alarm clock task. That is, all the timings are based on monotonically increasing clocks and not based on actual system time, so that when the system time is manually adjusted or is in error, the timer is not in error, the precision of the virtual timer is improved, and when a plurality of timing functions are needed to be realized, an unlimited number of virtual timers can be directly set, and a plurality of timing functions can be realized without setting a plurality of hardware timers, thereby reducing the hardware cost.
Referring to fig. 2, fig. 2 is a schematic diagram of a timing device of a virtual timer according to a second embodiment of the present application. The units included are for performing the steps in the corresponding embodiment of fig. 1. Refer specifically to the description of the corresponding embodiment in fig. 1. For convenience of explanation, only the portions related to the present embodiment are shown. Referring to fig. 2, the timing device 2 of the virtual timer includes:
a receiving unit 210, configured to receive a timing request, where the timing request includes a timing duration and a processing task;
a first processing unit 220, configured to obtain a first increment time of a monotonically increasing clock, and determine a first virtual alarm clock time according to the first increment time and the timing duration;
a second processing unit 230, configured to create a virtual timer according to the first virtual alarm clock time and the processing task, and determine a system alarm clock task according to the first virtual alarm clock time;
a third processing unit 220, configured to obtain a second increment time of the monotonically increasing clock when the system clock triggers a system alarm clock task;
a fourth processing unit 250, configured to obtain virtual alarm clock times corresponding to the virtual timers, and determine a virtual timer with the virtual alarm clock time smaller than the second increment time as a target timer;
and the execution unit 260 is configured to execute the processing task corresponding to the target timer.
Further, the second processing unit 230 is specifically configured to:
if the first virtual alarm clock time is the minimum virtual alarm clock time corresponding to each virtual timer, acquiring first system time corresponding to a system clock;
adding the timing duration to the first system time to obtain a first system alarm clock time;
and setting a system alarm clock task according to the first system alarm clock time.
Further, the second processing unit 230 is specifically configured to:
creating a virtual timer according to the processing task, and acquiring a first virtual alarm clock corresponding to the first virtual alarm clock time;
the virtual timer is associated with the first virtual alarm clock.
Further, the second processing unit 230 is specifically configured to:
if a virtual alarm clock with the same virtual alarm clock time as the first virtual alarm clock time exists, determining the virtual alarm clock as the first virtual alarm clock;
if the virtual alarm clock with the same virtual alarm clock time as the first virtual alarm clock time does not exist, a first virtual alarm clock is created according to the first virtual alarm clock time.
Further, the first processing unit 220 is specifically configured to:
and calculating the first increment time of the monotonically-increasing clock according to the first system time of the system clock and the mapping relation between the monotonically-increasing clock and the system clock.
Further, the timing device 2 of the virtual timer further includes:
and a fifth processing unit for removing the target timer.
Further, the timing device 2 of the virtual timer further includes:
and the sixth processing unit is used for updating the alarm clock task of the system according to the virtual alarm clock time of the virtual timer except the target timer.
Further, the sixth processing unit is specifically configured to:
and if the virtual timer except the target timer does not exist, ending the alarm clock task of the system.
Further, the sixth processing unit is specifically configured to:
if the virtual timer outside the target timer exists, acquiring the minimum virtual alarm clock time corresponding to the virtual timer outside the target timer;
calculating the second system alarm clock time according to the minimum virtual alarm clock time and the mapping relation between the virtual alarm clock time and the system alarm clock time;
and updating the system alarm clock task according to the second system alarm clock time.
Fig. 3 is a schematic diagram of a timing device of a virtual timer according to a third embodiment of the present application. As shown in fig. 3, the timing device 3 of the virtual timer of this embodiment includes: a processor 30, a memory 31 and a computer program 32, such as a timing program of a virtual timer, stored in said memory 31 and executable on said processor 30. The processor 30, when executing the computer program 32, implements the steps of the above-described embodiments of the method for timing of the respective virtual timers, such as steps 101 to 106 shown in fig. 1. Alternatively, the processor 30, when executing the computer program 32, performs the functions of the modules/units of the apparatus embodiments described above, such as the functions of the modules 210-260 shown in fig. 2.
Illustratively, the computer program 32 may be partitioned into one or more modules/units that are stored in the memory 31 and executed by the processor 30 to complete the present application. The one or more modules/units may be a series of computer program instruction segments capable of performing a specific function for describing the execution of the computer program 32 in the timing device 3 of the virtual timer. For example, the computer program 32 may be divided into a receiving unit, a first processing unit, a second processing unit, a third processing unit, a fourth processing unit, and an executing unit, where each unit specifically functions as follows:
a receiving unit, configured to receive a timing request, where the timing request includes a timing duration and a processing task;
the first processing unit is used for acquiring first increment time of the monotonically-increasing clock and determining first virtual alarm clock time according to the first increment time and the timing duration;
the second processing unit is used for creating a virtual timer according to the first virtual alarm clock time and the processing task and determining a system alarm clock task according to the first virtual alarm clock time;
the third processing unit is used for acquiring the second increasing time of the monotonically increasing clock when the system clock triggers the system alarm clock task;
the fourth processing unit is used for obtaining the virtual alarm clock time corresponding to each virtual timer and determining the virtual timer with the virtual alarm clock time smaller than the second increment time as a target timer;
and the execution unit is used for executing the processing task corresponding to the target timer.
The timing device of the virtual timer may include, but is not limited to, a processor 30, a memory 31. It will be appreciated by those skilled in the art that fig. 3 is merely an example of a timing device 3 of a virtual timer and does not constitute a limitation of the timing device 3 of a virtual timer, and may include more or less components than illustrated, or may combine certain components, or different components, e.g., the timing device of the virtual timer may also include an input-output device, a network access device, a bus, etc.
The processor 30 may be a central processing unit (Central Processing Unit, CPU), other general purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), off-the-shelf programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The memory 31 may be an internal storage unit of the timing device 3 of the virtual timer, such as a hard disk or a memory of the timing device 3 of the virtual timer. The memory 31 may be an external memory device of the timing device 3 of the virtual timer, for example, a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash Card (Flash Card) or the like provided on the timing device 3 of the virtual timer. Further, the timing device 3 of the virtual timer may also include both an internal memory unit and an external memory device of the timing device 3 of the virtual timer. The memory 31 is used for storing the computer program and other programs and data required for the timing device of the virtual timer. The memory 31 may also be used for temporarily storing data that has been output or is to be output.
It should be noted that, because the content of information interaction and execution process between the above devices/units is based on the same concept as the method embodiment of the present application, specific functions and technical effects thereof may be referred to in the method embodiment section, and will not be described herein.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-described division of the functional units and modules is illustrated, and in practical application, the above-described functional distribution may be performed by different functional units and modules according to needs, i.e. the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-described functions. The functional units and modules in the embodiment may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit, where the integrated units may be implemented in a form of hardware or a form of a software functional unit. In addition, the specific names of the functional units and modules are only for distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working process of the units and modules in the above system may refer to the corresponding process in the foregoing method embodiment, which is not described herein again.
The embodiment of the application also provides a timing device of the virtual timer, which comprises: at least one processor, a memory, and a computer program stored in the memory and executable on the at least one processor, which when executed by the processor performs the steps of any of the various method embodiments described above.
Embodiments of the present application also provide a computer readable storage medium storing a computer program which, when executed by a processor, implements steps for implementing the various method embodiments described above.
Embodiments of the present application provide a computer program product which, when run on a mobile terminal, causes the mobile terminal to perform steps that enable the implementation of the method embodiments described above.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the present application may implement all or part of the flow of the method of the above embodiments, and may be implemented by a computer program to instruct related hardware, where the computer program may be stored in a computer readable storage medium, and when the computer program is executed by a processor, the computer program may implement the steps of each of the method embodiments described above. Wherein the computer program comprises computer program code which may be in source code form, object code form, executable file or some intermediate form etc. The computer readable medium may include at least: any entity or device capable of carrying computer program code to a photographing device/terminal apparatus, recording medium, computer Memory, read-Only Memory (ROM), random access Memory (RAM, random Access Memory), electrical carrier signals, telecommunications signals, and software distribution media. Such as a U-disk, removable hard disk, magnetic or optical disk, etc. In some jurisdictions, computer readable media may not be electrical carrier signals and telecommunications signals in accordance with legislation and patent practice.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and in part, not described or illustrated in any particular embodiment, reference is made to the related descriptions of other embodiments.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus/device and method may be implemented in other manners. For example, the apparatus/device embodiments described above are merely illustrative, e.g., the division of the modules or units is merely a logical functional division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection via interfaces, devices or units, which may be in electrical, mechanical or other forms.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
The above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.
Claims (10)
1. A method for timing a virtual timer, comprising:
receiving a timing request, wherein the timing request comprises a timing duration and a processing task;
acquiring first increment time of a monotonically increasing clock, and determining first virtual alarm clock time according to the first increment time and the timing duration;
creating a virtual timer according to the first virtual alarm clock time and the processing task, and determining a system alarm clock task according to the first virtual alarm clock time;
when the system clock triggers a system alarm clock task, acquiring second increasing time of the monotonically increasing clock;
obtaining virtual alarm clock time corresponding to each virtual timer, and determining the virtual timer with the virtual alarm clock time smaller than or equal to the second increment time as a target timer;
and executing the processing task corresponding to the target timer.
2. The method for timing a virtual timer as set forth in claim 1, wherein said determining a system alarm task based on said first virtual alarm time comprises:
if the first virtual alarm clock time is the minimum virtual alarm clock time corresponding to each virtual timer, acquiring first system time corresponding to a system clock;
adding the timing duration to the first system time to obtain a first system alarm clock time;
and setting a system alarm clock task according to the first system alarm clock time.
3. The method for timing a virtual timer as set forth in claim 1, wherein said creating a virtual timer from said first virtual alarm clock time and said processing task comprises:
creating a virtual timer according to the processing task, and acquiring a first virtual alarm clock corresponding to the first virtual alarm clock time;
the virtual timer is associated with the first virtual alarm clock.
4. A method of timing a virtual timer as claimed in claim 3, wherein said obtaining a first virtual alarm clock corresponding to a first virtual alarm clock time comprises:
if a virtual alarm clock with the same virtual alarm clock time as the first virtual alarm clock time exists, determining the virtual alarm clock as the first virtual alarm clock;
if the virtual alarm clock with the same virtual alarm clock time as the first virtual alarm clock time does not exist, a first virtual alarm clock is created according to the first virtual alarm clock time.
5. The method for timing a virtual timer as claimed in claim 1, wherein said obtaining a first increment time of a monotonically increasing clock comprises:
and calculating the first increment time of the monotonically-increasing clock according to the first system time of the system clock and the mapping relation between the monotonically-increasing clock and the system clock.
6. The method for timing a virtual timer as set forth in claim 1, further comprising, after said executing said processing task corresponding to said target timer:
and removing the target timer.
7. The method for timing a virtual timer as set forth in claim 1, further comprising, after said executing said processing task corresponding to said target timer:
and updating the alarm clock task of the system according to the virtual alarm clock time of the virtual timer except the target timer.
8. The method for timing a virtual timer as set forth in claim 7, wherein said updating the system alarm tasks based on the virtual alarm time of the virtual timer other than the target timer comprises:
and if the virtual timer except the target timer does not exist, ending the alarm clock task of the system.
9. The method for timing a virtual timer as set forth in claim 7, wherein said updating the system alarm tasks based on the virtual alarm time of the virtual timer other than the target timer comprises:
if the virtual timer outside the target timer exists, acquiring the minimum virtual alarm clock time corresponding to the virtual timer outside the target timer;
calculating the second system alarm clock time according to the minimum virtual alarm clock time and the mapping relation between the virtual alarm clock time and the system alarm clock time;
and updating the system alarm clock task according to the second system alarm clock time.
10. A computer readable storage medium storing a computer program, characterized in that the computer program when executed by a processor implements the method according to any one of claims 1 to 9.
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