CN109949758B - 基于栅极驱动电路的扫描信号补偿方法及装置 - Google Patents

基于栅极驱动电路的扫描信号补偿方法及装置 Download PDF

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CN109949758B
CN109949758B CN201711392016.1A CN201711392016A CN109949758B CN 109949758 B CN109949758 B CN 109949758B CN 201711392016 A CN201711392016 A CN 201711392016A CN 109949758 B CN109949758 B CN 109949758B
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CN109949758A (zh
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吴永良
陈宥烨
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Xianyang Caihong Optoelectronics Technology Co Ltd
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    • GPHYSICS
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    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3648Control of matrices with row and column drivers using an active matrix
    • G09G3/3655Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3674Details of drivers for scan electrodes
    • G09G3/3677Details of drivers for scan electrodes suitable for active matrices only
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • G02F1/13454Drivers integrated on the active matrix substrate
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • HELECTRICITY
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    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264Details of driving circuits
    • G09G2310/0289Details of voltage level shifters arranged for use in a driving circuit
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0257Reduction of after-image effects

Abstract

本发明涉及一种基于栅极驱动电路的扫描信号补偿方法及装置。该方法包括:在侦测阶段,获取扫描信号补偿电压值;在调整阶段,根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的时钟信号和直流电压源。本发明实施例,在获取到扫描信号补偿电压值后,对输入至栅极驱动电路的时钟信号和直流电压源的幅值进行调整,以弥补由于显示区的TFT长期压差导致IV曲线漂移进而使显示区像素电容漏电而产生显示器残影和闪烁的问题。

Description

基于栅极驱动电路的扫描信号补偿方法及装置
技术领域
本发明属于液晶显示技术领域,具体涉及一种基于栅极驱动电路的扫描信号补偿方法及装置。
背景技术
随着薄膜晶体管液晶显示器(Thin Film Transistor Liquid Crystal Display,简称TFT-LCD)的发展,液晶产品的竞争越来越激烈,各个厂家开始开发新技术来占领市场。GOA(Gate driver on Array)技术是将栅极驱动器集成在玻璃基板上,形成对面板的扫描。由于其低成本、低功耗、窄边框等优点,逐步成为各个厂家研究的新方向。在GOA技术的发展过程中,大多主要集中在驱动电路方面的研究,来解决大尺寸与高分辨率应用方面的问题。
请参见图1和图2,图1为现有技术提供的一种显示区域TFT的结构示意图;图2为现有技术提供的一种显示区域某一选定的TFT的I-V特性曲线示意图。对于非晶硅TFT本身属性而言,只要长时间处于栅极与源/漏极存在压差下就会导致TFT的I-V特性变化,即相同的栅源电压VGS下,漏电流ID会发生漂移。对于液晶面板的像素,使用该非晶硅TFT,在实际应用中会长时间使栅极处于低电压,源极和漏极处于高电压,这样会导致像素的充电能力发生改变从而影响液晶面板的显示效果,例如会出现残影和闪烁等现象。
发明内容
为了解决现有技术中存在的上述问题,本发明提供了一种基于栅极驱动电路的扫描信号补偿方法及装置。
本发明的一个实施例提供了一种基于栅极驱动电路的扫描信号补偿方法,包括:
在侦测阶段,获取扫描信号补偿电压值;
在调整阶段,根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的时钟信号和直流电压源。
在本发明的一个实施例中,获取扫描信号补偿电压值,包括:
获取显示器的累计工作时长;
根据所述累计工作时长从第一对照表中查找所述扫描信号补偿电压值。
在本发明的一个实施例中,获取扫描信号补偿电压值,包括:
设置参考TFT;
获取所述参考TFT的驱动电流;
根据所述驱动电流获取驱动电流漂移值;
根据所述驱动电流漂移值从第二对照表中查找所述扫描信号补偿电压值。
在本发明的一个实施例中,所述栅极驱动电路为GOA电路;相应地,所述GOA电路包括上拉控制单元(41)、上拉单元(42)、下拉单元(43)和下拉维持单元(44);其中,
所述上拉控制单元(41)用于控制所述GOA电路的启动;
所述上拉单元(42)用于控制所述GOA电路输出开启电压;
所述下拉单元(43)用于控制所述GOA电路输出关断电压;
所述下拉维持单元(44)用于维持所述GOA电路输出关断电压。
在本发明的一个实施例中,根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的时钟信号和直流电压源,包括:
根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的时钟信号(CK&XCK)的高电平;
根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的第一直流电压值(G_vss1)和第二直流电压值(G_vss2)。
在本发明的一个实施例中,所述时钟信号(CK&XCK)的高电平对应的第一调整值(ΔVGH)与所述第二直流电压值(G_vss2)对应的第二调整值(ΔVGL)的大小相等。
在本发明的一个实施例中,根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的时钟信号(CK&XCK)的高电平,包括:
在下一次开机或切换画面时,控制电源管理集成电路(PMIC)调整输出至电平转换(level shift)电路的时钟信号(CK&XCK)的高电平幅值。
在本发明的一个实施例中,根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的第一直流电压值(G_vss1)和第二直流电压值(G_vss2),包括:
在下一次开机或切换画面时,控制电源管理集成电路(PMIC)调整输出至所述栅极驱动电路的所述第一直流电压值(G_vss1)和所述第二直流电压值(G_vss2)的大小,其中,所述第一直流电压值(G_vss1)的幅值大于所述第二直流电压值(G_vss2)。
本发明的另一个实施例提供了一种基于栅极驱动电路的扫描信号补偿装置,包括:
获取模块,用于在侦测阶段获取扫描信号补偿电压值;
调整模块,用于在调整阶段根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的时钟信号和直流电压源。
在本发明的一个实施例中,所述调整模块包括:
第一调整单元,用于根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的时钟信号(CK&XCK)的高电平;
第二调整单元,用于根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的第一直流电压值(G_vss1)和第二直流电压值(G_vss2)。
本发明实施例,在获取到扫描信号补偿电压值后,对输入至栅极驱动电路的时钟信号和直流电压源的幅值进行调整,以弥补由于显示区的TFT长期压差导致IV曲线漂移进而使显示区像素电容漏电而产生显示器残影和闪烁的问题。
附图说明
图1为现有技术提供的一种GOA区TFT的结构示意图;
图2为现有技术提供的一种GOA区某一选定的TFT的I-V特性曲线示意图;
图3为本发明实施例提供的一种基于栅极驱动电路的扫描信号补偿方法的流程示意图;
图4为本发明实施例提供的另一种扫描信号补偿电路的模块示意图;
图5为本发明实施例提供的又一种扫描信号补偿电路的模块示意图;
图6为本发明实施例提供的一种显示器的电路结构示意图;
图7为本发明实施例提供的一种GOA驱动电路的结构示意图;
图8为本发明实施例提供的一种GOA驱动电路的时序控制示意图;
图9为本发明实施例提供的一种基于栅极驱动电路的扫描信号补偿装置的逻辑示意图。
具体实施方式
下面结合具体实施例对本发明做进一步详细的描述,但本发明的实施方式不限于此。
实施例一
请参见图3,图3为本发明实施例提供的一种基于栅极驱动电路的扫描信号补偿方法的流程示意图。该扫描信号补偿方法适用于TFT-LCD显示器,其工作原理也同样适用于LED显示器、OLED显示器等其他显示器。该方法可以有效解决由于AA区的TFT在工作过程中受到长期偏压导致I-V特性飘移从而导致像素充电不足的问题。具体地,该扫描信号补偿方法可以包括如下步骤:
步骤1、在侦测阶段,获取扫描信号补偿电压值;
步骤2、在调整阶段,根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的时钟信号和直流电压源。
对于步骤1,获取扫描信号补偿电压值可以通过如下两种方式实现:
方式一时间侦测
步骤11a、获取显示器的累计工作时长;
步骤12a、根据所述累计工作时长从第一对照表中查找所述扫描信号补偿电压值。
具体地,通过统计显示器一时间段内的显示区(AA区)TFT的栅极电压、源极电压,根据该时间段的时长和栅极、源极、漏极电压的统计值来查找预先存储好的映射表(即第一对照表)以确定该扫描信号补偿电压值,根据该电压值调整扫描驱动信号的电压值,从而消除由于长期处于偏压状态的AA区TFT的漏电流的偏移。具体实现方式可以参见中国专利文献CN201710949232.5。
方式二电流侦测
步骤11b、设置参考TFT;
步骤12b、获取所述参考TFT的驱动电流;
步骤13b、根据所述驱动电流获取驱动电流漂移值;
步骤14b、根据所述驱动电流漂移值从第二对照表中查找所述扫描信号补偿电压值。
通过在异于AA区的某一位置(例如dummy区)设置一个参考TFT,模拟AA区TFT的工作情况,对其进行侦测而获取AA区TFT的驱动电流,并通过该驱动电流得到驱动电路的漂移值,根据该漂移值从预先存储好的补偿对照表(即第二对照表)中确定该扫描信号补偿电压值,根据该电压值调整扫描驱动信号的电压值,从而解决了因为长期压差导致TFT的IV曲线漂移进而导致显示器影像残影的问题。
具体地,请参见图4与图5,图4为本发明实施例提供的另一种扫描信号补偿电路的模块示意图,图5为本发明实施例提供的又一种扫描信号补偿电路的模块示意图。图4对应于显示模式,图5对应于侦测补偿模式。
扫描信号补偿电压值获取的工作原理为:
显示模式下,控制模块102控制电平转换单元103输出参考TFT 101的源极S、漏极D、栅极G的电压,并使参考TFT101和AA区对应TFT的驱动方式近似相同,即参考TFT101的源极S、漏极D、栅极G的电压分别与AA区被模拟的TFT的源极、漏极、栅极的电压近似相同,因此参考TFT101与AA区域TFT的IV曲线漂移行为有一定的规律相似度。
其中,也可以将参考TFT 101的源极S、漏极D、栅极G的电压分别设置为AA区所有的TFT的源极电压平均值、漏极电压平均值、栅极电压平均值,或者仅为AA区某一条扫描线上的TFT的源极电压、漏极电压、栅极电压。
显示模式下,控制模块102控制驱动电流检测单元104为非工作状态,此时,驱动电流检测单元104没有输入和输出,因此ADC105、比较单元201、存储单元202、查表单元203、驱动电压计算单元301以及第一DAC302和第二DAC303均处于不工作状态。
侦测补偿模式下,控制模块102控制驱动电路检测单元104给予参考TFT 101的源极S电压、漏极D和栅极G电压分别为建立查找表时的源极电压、漏极电压和栅极电压,同时驱动电流检测单元104检测到参考TFT101的驱动电流为Idref,ADC105、比较单元201、存储单元202、查表单元203、驱动电压计算单元301以及第一DAC302和第二DAC303均处于工作状态,ADC105将该模拟驱动电流转换为数字信号;比较单元201获取该数字信号,与存储在存储单元202中的目标驱动电流IdA进行比较,获得驱动电流漂移值△I,查表单元203根据驱动电流漂移值△I查询存储在存储单元202中的补偿对照表获得扫描信号补偿电压值△V。
更为详细地对方式二的描述,可以参见中国专利文献CN201710948642.8。
对于步骤2,在确定了扫描信号补偿电压值后,需要对输出扫描驱动信号的栅极驱动电路进行调整。对于栅极驱动电路,包括COF电路、COG电路和GOA电路等,其均会接收时钟信号CK&XCK、直流电压源LCC_vss、Q_vss、G_vss等的输入以保证扫描驱动信号的输出。为了实现该扫描驱动信号的电压幅值的调整,需要调整扫描线上的开启电压VGH和关断电压VGL。而开启电压VGH通常是通过时钟信号CK&XCK的高电平实现,关断电压VGL通常是通过直流电压源的电压值G_vss实现的。因此,通过调整输入至栅极驱动电路的时钟信号CK&XCK和直流电压源G_vss来实现对开启电压VGH和关断电压VGL的调整。
具体地,通过时钟信号(CK&XCK)的高电平来实现扫描信号的开启电压的调整,通过第一直流电压值G_vss1和第二直流电压值G_vss2的大小来实现扫描信号的关断电压的调整。
另外,侦测阶段和调整阶段可以设置在开机时、画面切换时或者切换讯源时,且先进行侦测,根据侦测结果在调整阶段对栅极驱动电路进行调整。
本发明实施例,在获取到扫描信号补偿电压值后,对输入至栅极驱动电路的时钟信号和直流电压源的幅值进行调整,以解决由于AA区TFT长期压差导致IV曲线漂移产生显示器残影和闪烁的问题。
实施例二
请参见图6、图7及图8,图6为本发明实施例提供的一种显示器的电路结构示意图,图7为本发明实施例提供的一种GOA驱动电路的结构示意图,图8为本发明实施例提供的一种GOA驱动电路的时序控制示意图。本实施例在上述实施例的基础上,以栅极驱动电路为GOA电路为例,重点对扫描信号补偿方法的工作原理进行详细描述如下。
具体地,该显示器10可以包括:时序控制电路(Tcon)11、电平转换(level shift)电路12、电源管理集成电路(PMIC)13、扫描驱动(Scan driver)电路14和像素矩阵(PixelMatrix)15。
其中,对于以时间侦测方式来补偿扫描信号来说,由时序控制电路11从计时器中获取累计工作时长、从保存在本地的第一对照表中查找对应的扫描信号补偿电压值,将该扫描信号补偿电压值传输给PMIC 13,由PMIC13调整其输出的时钟信号的高电平CK_high、XCK_high,同时控制其输出的第一直流电压值G_vss1和第二直流电压值G_vss2。其调整幅度最优为:高电平CK_high、XCK_high的调整幅度和方向与第二直流电压值G_vss2的调整幅度和方向相同,这样做的好处在于可以避免改变AA区TFT的正负极的对称性。
可选地,以电流侦测方式来补偿扫描信号来说,由时序控制电路11(执行图5所示比较单元201、存储单元202、查表单元203的功能)从dummy区的参考TFT中获取该参考TFT的驱动电流Id,对该驱动电流Id和目标驱动电流进行对比获得驱动电流差值△I,根据该差值△I从预先存储好的第二对照表中确定该扫描信号补偿电压值△V,之后将该扫描信号补偿电压值△V发送给PMIC 13(执行图5所示驱动电压计算单元301、第一DAC302、第二DAC303的功能),由PMIC13调整其输出的时钟信号的高电平CK_high、XCK_high(即图5所示的VGHnew),同时控制其输出的第一直流电压值G_vss1和第二直流电压值G_vss2(即图5所示的VGLnew)。其调整幅度最优为:高电平CK_high、XCK_high的调整幅度与第二直流电压值G_vss2的调整幅度相同,这样做的好处在于可以避免改变AA区TFT的正负极的对称性。
请再次一并参见图7和图8,以下重点对GOA电路如何实现调整后的扫描驱动信号的输出进行示例性描述。
该示例性的GOA电路14例如包括上拉控制单元141、上拉单元142、下拉单元143和下拉维持单元144。其中,上拉控制单元141主要包括第四TFT T4,主要用于接收上一级GOA驱动电路的扫描信号G(i-1),生成控制上拉单元142工作的扫描控制信号Q(i)。上拉单元142主要包括第三TFT T3,主要用于在扫描控制信号Q(i)的控制下将由时钟信号CK&XCK的高电平CK_high形成的开启电压VGH传输至扫描线G(i)上。下拉单元143主要包括第七TFTT7和第八TFT T8,主要用于在下一级扫描驱动信号G(i+1)的控制下将由第一直流电压值G_vss1形成的关断电压VGL传输至扫描线G(i)上。下拉维持单元144主要包括第一TFT T1、第二TFT T2、第五TFT T5与第六TFT T6,主要用于在扫描控制信号Q(i)的控制下将第一TFTT1、第二TFT T2进行关断或者保持开启状态,即在扫描控制信号Q(i)为高电平时,第六TFTT6导通,低电平VT1/2_vgl输入至第一TFT T1和第二TFT T2的控制端以关闭第一TFT T1和第二TFT T2;在下一级扫描驱动信号G(i+1)的控制下将由第三直流电压值Q_vss1形成的低电压作为扫描控制信号Q(i),使第六TFT T6关闭,此时由低频信号LC控制的第五TFT T5导通并将高电平引入至第一TFT T1和第二TFT T2的控制端以导通第一TFT T1和第二TFT T2,将第二直流电压值G_vss2作为关断电压VGL传输至第i行扫描线G(i)上。
具体地,在一次显示器开机后立即进入侦测阶段,对AA区的TFT的漂移状态进行侦测,确定扫描信号补偿电压值为ΔV(具体确定方式请参见中国专利文献CN201710949232.5和CN201710948642.8),例如,需要对扫描信号的开启电压VGH和关断电压VGL同时增加一个ΔV,即调整后的开启电压VGH`=VGH+ΔV、关断电压VGL`=VGL+ΔV。
由于输入至GOA电路的时钟信号CK_high会充当扫描线信号G(i)的开启电压,因此通过PMIC调整该时钟信号,调整后的时钟信号CK_high`=CK_high+ΔV。由于输入至GOA电路的第二直流电压值G_vss2会充当扫描线信号G(i)的关断电压,因此通过PMIC调整该直流电压值,调整后的第二直流电压值G_vss2`=G_vss2+ΔV。另外,由于输入至GOA电路的第一直流电压值G_vss1将先于第二直流电压值G_vss2充当扫描信号G(i)的关断电压,但由于其充电时间较短,可以选择不做调整,当然优选为对第一直流电压值G_vss1做类似于第二直流电压值G_vss2同等的调整。
之后显示器进入调整阶段,在T1时刻时,第i行扫描线上的STV信号形成高电平,此时时钟信号CK为低电平、XCK为高电平,由于STV信号为高电平,第i行扫描线上的扫描控制信号Q(i)被拉高,此时第六TFT T6导通,低电压信号VT1/2_vgl被传输至第i个GOA电路的C节点,使得C节点在T1时刻呈现出低电平。
在T2时刻,第i行扫描线上的STV信号形成低电平,此时时钟信号CK为高电平、XCK为低电平,由于C节点呈现出低电平,导致第一TFT T1和第二TFT T2被关断,第四直流电压值Q_vss2(低电平)被中断加载在GOA电路的B节点,从而使第i行扫描线的扫描控制信号Q(i)被再次拉高,第三TFT T3被打开,此时调整后的时钟信号CK_high`被加载至第i行扫描线上,形成扫描信号G(i)调整后的开启电压VGH`,同时第i+1行扫描线的STV信号为高电平,开始重复第i行扫描线上的信号动作。
在T3时刻,第i+1行扫描线上的扫描信号G(i+1)为高电平,此时,第七TFT T7和第八TFT T8被打开,第一直流电压值G_vss1(如果该值被调整,则变为G_vss1`)输入至第i行扫描线成为第i行扫描信号G(i),与此同时第三直流电压值Q_vss1成为第i行扫描控制信号Q(i),由于扫描控制信号Q(i)跳变为低电平,导致第六TFT T6关断,低频信号LC控制的第五TFT T5导通并将高电平引入至第一TFT T1和第二TFT T2的控制端以导通第一TFT T1和第二TFT T2,此时第i行扫描控制信号Q(i)的幅值和第i行扫描信号G(i)的幅值分别变为第四直流电压值Q_vss2和调整后的第二直流电压值G_vss2`,即此时调整后的第二直流电压值G_vss2`被加载至第i行扫描线上,形成扫描信号G(i)调整后的关断电压VGL`。
第i+1行扫描线重复第i行扫描线的动作,此处不再重复描述。
本实施例,在确定扫描信号补偿电压值后,通过调整PMIC中输出的时钟信号的电压幅值和直流电压源的电压值,实现对AA区TFT I-V特性漂移导致的显示器影像残影和闪烁等问题的调整,极大地提高了显示器的稳定性。
实施例三
请参见图9,图9为本发明实施例提供的一种基于栅极驱动电路的扫描信号补偿装置的逻辑示意图。本实施例还提供了一种基于栅极驱动电路的扫描信号补偿装置。该虚拟装置可以为一段软件代码,存储于时序控制电路的存储器中,用于实现上述实施例提供的扫描信号补偿方法。
该装置70包括获取模块71和调整模块72。其中,获取模块71用于在侦测阶段获取扫描信号补偿电压值。调整模块72用于在调整阶段根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的时钟信号和直流电压源。
进一步地,该调整模块72还包括第一调整单元721和第二调整单元722。该第一调整单元721用于根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的时钟信号(CK&XCK)的高电平。该第二调整单元722用于根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的第一直流电压值(G_vss1)和第二直流电压值(G_vss2)。
本实施例,其实施方式与前述方式一致,此处不再赘述。
以上内容是结合具体的优选实施方式对本发明提供的一种液晶显示装置及其控制方法所作的进一步详细说明,不能认定本发明的具体实施只局限于这些说明。对于本发明所属技术领域的普通技术人员来说,在不脱离本发明构思的前提下,还可以做出若干简单推演或替换,都应当视为属于本发明的保护范围。

Claims (7)

1.一种基于栅极驱动电路的扫描信号补偿方法,其特征在于,包括:
在侦测阶段,获取显示器的累计工作时长;根据所述累计工作时长从第一对照表中查找所述扫描信号补偿电压值;
在调整阶段,根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的时钟信号和直流电压源;
根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的时钟信号和直流电压源,包括:
根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的时钟信号(CK&XCK)的高电平;
根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的第一直流电压值(G_vss1)和第二直流电压值(G_vss2)。
2.根据权利要求1所述的方法,其特征在于,获取扫描信号补偿电压值,包括:
设置参考TFT;
获取所述参考TFT的驱动电流;
根据所述驱动电流获取驱动电流漂移值;
根据所述驱动电流漂移值从第二对照表中查找所述扫描信号补偿电压值。
3.根据权利要求1所述的方法,其特征在于,所述栅极驱动电路为GOA电路;相应地,所述GOA电路包括上拉控制单元(41)、上拉单元(42)、下拉单元(43)和下拉维持单元(44);其中,
所述上拉控制单元(41)用于控制所述GOA电路的启动;
所述上拉单元(42)用于控制所述GOA电路输出开启电压;
所述下拉单元(43)用于控制所述GOA电路输出关断电压;
所述下拉维持单元(44)用于维持所述GOA电路输出关断电压。
4.根据权利要求1所述的方法,其特征在于,所述时钟信号(CK&XCK)的高电平对应的第一调整值(ΔVGH)与所述第二直流电压值(G_vss2)对应的第二调整值(ΔVGL)的大小相等。
5.根据权利要求1所述的方法,其特征在于,根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的时钟信号(CK&XCK)的高电平,包括:
在下一次开机或切换画面时,控制电源管理集成电路(PMIC)调整输出至电平转换(level shift)电路的时钟信号(CK&XCK)的高电平幅值。
6.根据权利要求1所述的方法,其特征在于,根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的第一直流电压值(G_vss1)和第二直流电压值(G_vss2),包括:
在下一次开机或切换画面时,控制电源管理集成电路(PMIC)调整输出至所述栅极驱动电路的所述第一直流电压值(G_vss1)和所述第二直流电压值(G_vss2)的大小,其中,所述第一直流电压值(G_vss1)的幅值大于所述第二直流电压值(G_vss2)。
7.一种基于栅极驱动电路的扫描信号补偿装置,其特征在于,包括:
获取模块,用于在侦测阶段获取显示器的累计工作时长;根据所述累计工作时长从第一对照表中查找所述扫描信号补偿电压值;
调整模块,用于在调整阶段根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的时钟信号和直流电压源;
所述调整模块包括:
第一调整单元,用于根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的时钟信号(CK&XCK)的高电平;
第二调整单元,用于根据所述扫描信号补偿电压值调整输入至所述栅极驱动电路的第一直流电压值(G_vss1)和第二直流电压值(G_vss2)。
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