CN109901653A - A kind of NMOS adjustment pipe low dropout linear regulator structure and its application - Google Patents
A kind of NMOS adjustment pipe low dropout linear regulator structure and its application Download PDFInfo
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- CN109901653A CN109901653A CN201910266428.3A CN201910266428A CN109901653A CN 109901653 A CN109901653 A CN 109901653A CN 201910266428 A CN201910266428 A CN 201910266428A CN 109901653 A CN109901653 A CN 109901653A
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- nmos
- adjustment pipe
- pipe
- ldo
- error amplifier
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Abstract
The invention discloses a kind of NMOS adjustment pipe low dropout linear regulator structure and its applications, including charge pump and adjustment pipe with voltage multiplication performance, adjustment pipe is NMOS low pressure difference linear voltage regulator LDO, charge pump is connect with low pressure difference linear voltage regulator LDO, and capacitor C between the grade for promoting medium-high frequency PSR is connected on low pressure difference linear voltage regulator LDOB.The present invention does not need complicated circuit structure, it is only necessary to access direct-to-ground capacitance C in the connecting node of error amplifier and adjustment pipe grid endB, so that it may it realizes higher power supply rejection characteristic in Whole frequency band, and can realize fully integrated and stronger stability.
Description
Technical field
The invention belongs to power management chip technical fields, and in particular to a kind of to promote medium-high frequency power supply rejection performance
NMOS adjusts pipe low dropout linear regulator structure and its application.
Background technique
With being constantly progressive for integrated circuit technology, the continuous reduction of minimum feature, while requiring minimum operating voltage
Also it is constantly reducing.For the noise-sensitive circuit at low voltage that works, the small noise on power supply is easy to influence
The performance of circuit is so that the performance of whole system declines.For example, the radio circuit in portable device includes that low noise is put
The modules such as big device (LNA), frequency mixer, phaselocked loop and voltage controlled oscillator.Power supply noise will affect useful signal or its phase,
Useful signal is interfered in reception and emission process.High-performance LDO has ripple-free, fast-response and good power supply
Rejection, thus it is essential in system on chip.It is necessary to have the inhibition of full range charged for wide-band communication system
LDO improve the signal-to-noise ratio of entire communication system to guarantee that the performance of system will not be influenced by power supply noise.
Referring to Fig. 1, contemporary integrated circuits field linear voltage regulator promotes power supply rejection performance, there are mainly three types of thinkings:
1) power supply pre-processes: level-one or multistage RC filtering or LC filtering is added in the input terminal of LDO, but it is biggish
Passive device can not integrate and be unable to improve the power supply rejection performance of low-frequency range.
2) feedforward cancellation noise: LDO extract output node power supply noise and feed back to input point by summing circuit with
Power supply noise is offset, and the noise of output point is reduced.Joined feedforward and summing circuit causes system more complex, and can not be
High power supply rejection ratio is realized in Whole frequency band.
3) polycyclic road inhibits noise: designing multiple loops in circuit, one of loop is low gain high bandwidth, this ring
Road can inhibit power supply noise in entire frequency range, and thus LDO can obtain a preferable power supply suppression in medium-high frequency
Characteristic processed, but since the gain of high bandwidth loop is smaller, inhibiting effect is poor.
Summary of the invention
In view of the above-mentioned deficiencies in the prior art, the technical problem to be solved by the present invention is that providing a kind of NMOS adjustment
Pipe low dropout linear regulator structure does not need complicated circuit structure, it is only necessary in error amplifier and adjust pipe grid end
Connecting node accesses direct-to-ground capacitance CB, so that it may it realizes higher power supply rejection characteristic in Whole frequency band, and can realize fully integrated
And stronger stability.
The invention adopts the following technical scheme:
A kind of NMOS adjustment pipe low dropout linear regulator structure, including charge pump and adjustment with voltage multiplication performance
Pipe, adjustment pipe is NMOS low pressure difference linear voltage regulator LDO, and charge pump is connect with low pressure difference linear voltage regulator LDO, low pressure difference linearity
Capacitor C between the grade for promoting medium-high frequency PSR is connected on voltage-stablizer LDOB。
Specifically, LDO includes error amplifier, it is connected with pair in error amplifier and NMOS adjustment pipe grid end connecting node
Ground capacitor CB。
Further, input power VINDivide two-way, connects all the way through charge pump with the power end of error amplifier, it is another
Road and adjustment pipe MNDrain terminal connection, the output end V of error amplifierEADivide two-way, all the way through capacitor CBGround connection, another way and tune
Homogeneous tube MNGrid end connection；Adjust pipe MNSource point four tunnels, all the way with the negative input V of error amplifierFBConnection, second
Road is through capacitor CLGround connection, third road is through resistance RLGround connection, the 4th tunnel and VOUTConnection.
Further, as increase capacitor CBWhen, error amplifier and adjustment pipe grid end connecting node are high-impedance node；
Adjustment pipe is NMOS, and output end connects with the source of adjustment pipe, and the impedance of output node is smaller, error amplifier and adjustment pipe grid
End connecting node is dominant pole, increases error amplifier and adjustment pipe grid end connecting node direct-to-ground capacitance CB, make the frequency of dominant pole
Rate reduces.
Further, NMOS adjusts the power supply rejection characteristic within the scope of Whole frequency band of pipe low dropout linear regulator structure
No more than -29dB.
Another technical solution of the invention is, a kind of NMOS adjustment pipe low dropout linear regulator structure is applied to radio frequency
Transceiver front ends.
Compared with prior art, the present invention at least has the advantages that
The invention proposes a kind of NMOS for promoting medium-high frequency PSR performance to adjust pipe LDO structure, adjusts in traditional NMOS
On the basis of pipe LDO, only by increasing error amplifier and adjustment pipe connecting node direct-to-ground capacitance CB, improve LDO medium-high frequency
PSR performance, realize the excellent power supply rejection performance of Whole frequency band, be applicable to polytechnic NMOS adjustment pipe LDO circuit
Design.
Further, by adjusting the zero-pole analysis of the PSR transfer function of pipe LDO to NMOS, zero point is by being free of CB
Item determine that and pole is by containing CBItem determines, as increase CBWhen, zero frequency will not be substantially reduced, but pole frequency is with CBIncrease
It reduces greatly.I.e. as increase capacitor CBWhen, dead-center position is basically unchanged, and pole is mobile to low frequency, so that medium-high frequency PSR characteristic increases
By force.As increase capacitor CBWhen, due to error amplifier and the node that pipe grid end tie point is a high impedance is adjusted, and this is saved
Point parasitic capacitance is larger, so the dominant pole of error amplifier and adjustment pipe grid end connecting node as entire LDO, increases error
The capacitor C of amplifier and adjustment pipe grid end connecting node over the groundBThe stability that will not influence entire circuit, in error amplifier
Direct-to-ground capacitance C is connected with NMOS adjustment pipe grid end connecting nodeB, that is, the stability of LDO is enhanced, and enhance medium-high frequency electricity
Source rejection.
Further, the power supply of LDO inhibits to refer to the small signal and the small signal of input terminal for being transmitted to output end from input terminal
Ratio, the LDO that high power supply inhibits in Whole frequency band can be stronger to Power supply rejection in entire frequency band, avoids power supply and makes an uproar
Sound impacts useful signal or its phase, enhances the sensitivity of late-class circuit.
Structure proposed by the present invention is applied to radio frequency transceiver front end to the power management chip of noise signal sensitive circuit
In design, the circuit influenced by power supply noise is easy for other, the design is also suitable
In conclusion the present invention does not need complicated circuit structure, it is only necessary in error amplifier and adjust pipe grid end
Connecting node accesses direct-to-ground capacitance CB, so that it may it realizes higher power supply rejection characteristic in Whole frequency band, and can realize fully integrated
And stronger stability.
Below by drawings and examples, technical scheme of the present invention will be described in further detail.
Detailed description of the invention
Fig. 1 is the schematic circuit of traditional low pressure difference linear voltage regulator (LDO)；
Fig. 2 is that the NMOS proposed by the present invention for promoting medium-high frequency power supply rejection performance adjusts pipe LDO structural circuit figure；
Fig. 3 is to propose that the PSR of the NMOS adjustment pipe LDO and tradition NMOS adjustment pipe LDO of Technology design is imitative using the present invention
True comparative result figure.
Specific embodiment
In the description of the present invention, it should be noted that unless otherwise clearly defined and limited, term " installation ", " phase
Even ", " connection " shall be understood in a broad sense, for example, it may be being fixedly connected, may be a detachable connection, or be integrally connected；It can
To be mechanical connection, it is also possible to be electrically connected；It can be directly connected, can also can be indirectly connected through an intermediary
Connection inside two elements.For the ordinary skill in the art, above-mentioned term can be understood at this with concrete condition
Concrete meaning in invention.
The power supply of LDO inhibits the ratio for referring to small signal Yu the small signal of input terminal that output end is transmitted to from input terminal.LDO
In power supply noise can pass through two paths and reach output end: one is to adjust the drain terminal of pipe to output end；One is to pass through
Error amplifier is to output end.
Influence by two loops of analysis to PSR, and obtained by way of being added the respective PSR of two paths
The PSR of entire circuit.By analyzing PSR transfer function, zero point is by being free of CBItem determine that and pole is by containing CBXiang Jue
It is fixed, as increase CBWhen, zero frequency will not be substantially reduced, but pole frequency is with CBIncrease and reduces.I.e. as increase capacitor CBWhen,
Dead-center position is basically unchanged, and pole is mobile to low frequency, so that medium-high frequency PSR characteristic enhances, the frequency range of medium-high frequency is 1MHz
To 10GHz；As increase capacitor CBWhen, due to error amplifier and the node that pipe grid end tie point is a high impedance is adjusted, and
And this node parasitic capacitance is larger, so the dominant pole of error amplifier and adjustment pipe grid end connecting node as entire LDO, increases
The capacitor C of big error amplifier and adjustment pipe grid end connecting node over the groundBIt will not influence the stability of entire circuit.
The present invention provides a kind of NMOS to adjust pipe low dropout linear regulator structure, and error amplifier is added and adjustment is managed
The capacitor C of coupling part over the groundB, circuit stability can be promoted, and reached the electricity for being no more than -29dB within the scope of Whole frequency band
Source rejection characteristic, structure proposed by the present invention are applied to radio frequency transceiver front end to the power management core of noise signal sensitive circuit
In piece, other circuits for being easy to be influenced by power supply noise are also suitable.
Referring to Fig. 2, a kind of NMOS of the present invention adjusts pipe low dropout linear regulator structure, including following two parts:
1) with the charge pump of voltage multiplication performance；2) using NMOS and capacitor C between grade is added in adjustment pipeBLDO；Electricity
Lotus pump is connect with LDO.
LDO includes capacitor C between error amplifier, gradeBAnd NMOS adjustment pipe, the input of LDO is supply voltage, with electricity
The input terminal of lotus pump and the drain terminal of NMOS adjustment pipe connect, and the output end of charge pump connects with the power end of error amplifier,
Charge pump is error amplifier power supply, the output V of error amplifierEAWith adjustment pipe MNGrid end and grade between capacitor CBOne end
Connect, capacitor CBThe other end ground connection, adjust pipe MNSource connect output voltage VOUT, and feed back the negative sense for arriving error amplifier
Input terminal VFB, the negative input V of error amplifierFBRespectively with capacitor CLOne end, resistance RLThe other end and VOUTConnection,
Capacitor CLWith resistance RLThe other end ground connection.
Direct-to-ground capacitance C is added in error amplifier and NMOS adjustment pipe grid end connecting nodeBIt is promotion proposed by the present invention
The structure of NMOS adjustment pipe LDO medium-high frequency power supply rejection performance.It is found according to the zero pole point for analyzing resulting PSR transfer function,
Its zero point is by non-CBItem determines, and pole is by CBItem determines, as increase CBWhen, zero frequency can't be substantially reduced, but pole
Dot frequency is with CBIncrease reduces in proportion, so that medium-high frequency PSR performance enhancement.
As increase capacitor CBWhen, since error amplifier and adjustment pipe grid end connecting node are a high-impedance nodes, and
And the size for adjusting pipe is larger, parasitic capacitance is larger；Since adjustment pipe is NMOS, output end is connected with the source of adjustment pipe,
Therefore the impedance of output node is smaller, so error amplifier and adjustment pipe grid end connecting node are dominant pole, increase error and puts
Big device and adjustment pipe grid end connecting node direct-to-ground capacitance CB, reduce the frequency of dominant pole, LDO is more stable.Occur in load
When variation, circuit concussion not will cause.
Pipe LDO is adjusted for NMOS, the drain terminal of NMOS adjustment pipe is connected on power supply, and the noise on power supply adjusts NMOS
The V of pipegsIt does not impact, so the Power supply rejection performance of NMOS adjustment pipe LDO adjusts pipe LDO better than PMOS.According to
Structure proposed by the present invention increases direct-to-ground capacitance C in error amplifier and NMOS adjustment pipe grid end connecting nodeB, further
Promote the Power supply rejection performance of medium-high frequency.
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is
A part of the embodiment of the present invention, instead of all the embodiments.The present invention being described and shown in usually here in attached drawing is real
The component for applying example can be arranged and be designed by a variety of different configurations.Therefore, below to the present invention provided in the accompanying drawings
The detailed description of embodiment be not intended to limit the range of claimed invention, but be merely representative of of the invention selected
Embodiment.Based on the embodiments of the present invention, those of ordinary skill in the art are obtained without creative efforts
The every other embodiment obtained, shall fall within the protection scope of the present invention.
Referring to Fig. 3, small signal is added in input supply voltage when emulation, small signal at output node is measured, obtains LDO's
PSR is the small signal of output and the ratio for inputting small signal, and the NMOS adjustment pipe LDO and biography of structure design are proposed using the present invention
The NMOS that unites adjusts the PSR simulation result of pipe LDO.Structure proposed by the present invention can be promoted effectively in NMOS adjustment pipe LDO
High frequency electric source rejection.It is preferably electric to propose that Whole frequency band may be implemented in the NMOS adjustment pipe LDO of structure design according to the present invention
Source rejection reaches worst in 100MHz~1GHz frequency range and inhibits for -29dB power supply, increases the spirit of late-class circuit
Sensitivity.
The above content is merely illustrative of the invention's technical idea, and this does not limit the scope of protection of the present invention, all to press
According to technical idea proposed by the present invention, any changes made on the basis of the technical scheme each falls within claims of the present invention
Protection scope within.
Claims (6)
1. a kind of NMOS adjusts pipe low dropout linear regulator structure, which is characterized in that including the electricity with voltage multiplication performance
Lotus pump and adjustment pipe, adjustment pipe is NMOS low pressure difference linear voltage regulator LDO, and charge pump is connect with low pressure difference linear voltage regulator LDO,
Capacitor C between the grade for promoting medium-high frequency PSR is connected on low pressure difference linear voltage regulator LDOB。
2. NMOS according to claim 1 adjusts pipe low dropout linear regulator structure, which is characterized in that LDO includes missing
Poor amplifier is connected with direct-to-ground capacitance C in error amplifier and NMOS adjustment pipe grid end connecting nodeB。
3. NMOS according to claim 2 adjusts pipe low dropout linear regulator structure, which is characterized in that input power VIN
Divide two-way, connects all the way through charge pump with the power end of error amplifier, another way and adjustment pipe MNDrain terminal connection, error
The output end V of amplifierEADivide two-way, all the way through capacitor CBGround connection, another way and adjustment pipe MNGrid end connection；Adjust pipe MN's
Source point four tunnels, all the way with the negative input V of error amplifierFBConnection, the second tunnel is through capacitor CLGround connection, third road is through resistance
RLGround connection, the 4th tunnel and VOUTConnection.
4. NMOS according to claim 3 adjusts pipe low dropout linear regulator structure, which is characterized in that when increase capacitor
CBWhen, error amplifier and adjustment pipe grid end connecting node are high-impedance node；Adjustment pipe is NMOS, output end and adjustment pipe
Source connects, and the impedance of output node is smaller, and error amplifier and adjustment pipe grid end connecting node are dominant pole, increases error and puts
Big device and adjustment pipe grid end connecting node direct-to-ground capacitance CB, reduce the frequency of dominant pole.
5. NMOS according to any one of claim 1 to 4 adjusts pipe low dropout linear regulator structure, feature exists
In the power supply rejection characteristic within the scope of Whole frequency band that NMOS adjusts pipe low dropout linear regulator structure is no more than -29dB.
6. NMOS described in any one of claims 1 to 5 adjusts pipe low dropout linear regulator structure before radio frequency transceiver
The application at end.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910266428.3A CN109901653A (en) | 2019-04-03 | 2019-04-03 | A kind of NMOS adjustment pipe low dropout linear regulator structure and its application |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910266428.3A CN109901653A (en) | 2019-04-03 | 2019-04-03 | A kind of NMOS adjustment pipe low dropout linear regulator structure and its application |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113064461A (en) * | 2021-03-31 | 2021-07-02 | 苏州喻芯半导体有限公司 | LDO circuit with ultralow off-chip capacitance |
| CN116301163A (en) * | 2023-03-31 | 2023-06-23 | 电子科技大学 | High-power supply rejection ratio low-dropout linear voltage regulator circuit |
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| JP2000105611A (en) * | 1998-09-28 | 2000-04-11 | Sanyo Electric Co Ltd | Charge pump circuit |
| US8159797B2 (en) * | 2007-10-23 | 2012-04-17 | Rohm Co., Ltd. | Overvoltage protection circuit |
| CN103941798A (en) * | 2014-04-30 | 2014-07-23 | 杭州士兰微电子股份有限公司 | Low dropout regulator |
| CN104699153A (en) * | 2013-12-10 | 2015-06-10 | 展讯通信（上海）有限公司 | Low-dropout linear regulator |
| CN105308530A (en) * | 2013-05-17 | 2016-02-03 | 英特尔公司 | On-chip supply generator using dynamic circuit reference |
| CN106774599A (en) * | 2016-12-20 | 2017-05-31 | 北京中电华大电子设计有限责任公司 | A kind of voltage modulator circuit of high PSRR |
-
2019
- 2019-04-03 CN CN201910266428.3A patent/CN109901653A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000105611A (en) * | 1998-09-28 | 2000-04-11 | Sanyo Electric Co Ltd | Charge pump circuit |
| US8159797B2 (en) * | 2007-10-23 | 2012-04-17 | Rohm Co., Ltd. | Overvoltage protection circuit |
| CN105308530A (en) * | 2013-05-17 | 2016-02-03 | 英特尔公司 | On-chip supply generator using dynamic circuit reference |
| CN104699153A (en) * | 2013-12-10 | 2015-06-10 | 展讯通信（上海）有限公司 | Low-dropout linear regulator |
| CN103941798A (en) * | 2014-04-30 | 2014-07-23 | 杭州士兰微电子股份有限公司 | Low dropout regulator |
| CN106774599A (en) * | 2016-12-20 | 2017-05-31 | 北京中电华大电子设计有限责任公司 | A kind of voltage modulator circuit of high PSRR |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113064461A (en) * | 2021-03-31 | 2021-07-02 | 苏州喻芯半导体有限公司 | LDO circuit with ultralow off-chip capacitance |
| CN116301163A (en) * | 2023-03-31 | 2023-06-23 | 电子科技大学 | High-power supply rejection ratio low-dropout linear voltage regulator circuit |
| CN116301163B (en) * | 2023-03-31 | 2023-12-05 | 电子科技大学 | High-power supply rejection ratio low-dropout linear voltage regulator circuit |
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Application publication date: 20190618 |