CN109861503A - Driving circuit for power device - Google Patents
Driving circuit for power device Download PDFInfo
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- CN109861503A CN109861503A CN201910153133.5A CN201910153133A CN109861503A CN 109861503 A CN109861503 A CN 109861503A CN 201910153133 A CN201910153133 A CN 201910153133A CN 109861503 A CN109861503 A CN 109861503A
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Abstract
The invention discloses a kind of driving circuits for power device, including the first NMOS tube MNPWR, second NMOS tube MNPRE, third NMOS tube MN1, first PMOS tube MP1, inductance L, first diode Dpwr, first capacitor Cboost, resistance R1, the drain electrode of above-mentioned first NMOS tube MNPWR is connect with VIN input signal, the source electrode of above-mentioned first NMOS tube MNPWR passes through inductance L connection VOUT output signal, and the source electrode of above-mentioned first NMOS tube MNPWR is also connected with the cathode of first diode Dpwr, the plus earth of above-mentioned first diode Dpwr, the drain electrode of the grid connection third NMOS tube MN1 of above-mentioned first NMOS tube MNPWR and the 2nd NOMS pipe MNP The source electrode of RE, and pass through the drain electrode of the first PMOS tube of resistance R1 connection MP1.The present invention opens the moment in power device MNPWR, and the second NMOS tube MNPRE provides main charging current and gives MNPWR gate charges, can reduce the peak point current for flowing through driving stage, also can reduce the peak discharge current and discharge charge of Cboost.Correspondingly, MP1 area and Cboost capacitance also can reduce.
Description
Technical field
The present invention relates to technical field of integrated circuits, and in particular to a kind of driving circuit for power device.
Background technique
Switching Power Supply is widely used at present.N-type MOSFET is more than p-type MOSFET conducting resistance under equal conditions
It is small, therefore Switching Power Supply commonly uses enhanced N-type MOSFET power device.
In high channel N-type MOSFET power device applications, boostrap circuit is generallyd use to drive circuitry.Fig. 1 is one
A asynchronous step-down switching power supply circuit (asynchronous BUCK circuit)；Fig. 2 is synchronous buck switching power circuit (synchronous BUCK
Circuit)；Fig. 3 is simplified Bootstrapping drive circuit.As shown in Figure 1, bootstrap diode D1 and bootstrap capacitor Cboost composition is certainly
Power supply circuit is lifted, high channel power supply is generated, high channel power supply hot end is HB, and high channel power supply cold end is HS.High pass
Road power supply is to level shift module LEVEL SHFIT, buffer stage BUFFER, driving output stage (MP1 and MN1) power supply.
High channel controls signal by generating predrive letter after level shift module LEVEL SHFIT, buffer stage BUFFER
Number HPRE, pre-drive signal HPRE generate driving signal HO driving power device by driving output stage (MP1 and MN1)
MNPWR.Fig. 3 is the simplified driving circuit of Fig. 1.
Power MOS pipe is voltage control device, and grid has biggish input capacitance, by giving power MOS pipe gate charges,
Gate source voltage is increased, power MOS pipe is opened.Figure 12 shows the relationship of gate source voltage and gate charge.
In order to which that accelerates power MOS pipe opens speed to reduce the turn-on consumption of power MOS pipe, a high peak value is needed
Driving current is to reduce service time of power MOS pipe.It opens the moment, high driving current can flow through MP1 and Cboost, give function
The gate charges of rate metal-oxide-semiconductor；The moment is turned off, the grid of power MOS pipe is discharged by MN1.
Therefore, it drives the conducting resistance of output stage MP1 and MN1 to need sufficiently small, can just obtain sufficiently large driving in this way
Electric current.Bootstrap capacitor Cboost needs are sufficiently large, and voltage fluctuation is also little between such high channel power supply HB and HS, does not influence height
Module such as level shift module LEVEL SHFIT, buffer stage BUFFER, driving output stage (MP1 and the MN1 of channel power source power supply
Deng) normal work.
In addition, because high peak drive current has other adverse effects there are parasitic inductance and parasitic capacitance.
Summary of the invention
The purpose of the present invention is to provide a kind of driving circuits for power device, and it is excessively high to solve driving current peak value
Problem.
In order to solve the above technical problems, the invention adopts the following technical scheme:
A kind of driving circuit for power device, including the first NMOS tube MNPWR, the second NMOS tube MNPRE, third NMOS tube
MN1, the first PMOS tube MP1, inductance L, first diode Dpwr, first capacitor Cboost, resistance R1, above-mentioned first NMOS tube
The drain electrode of MNPWR is connect with VIN input signal, and the source electrode of above-mentioned first NMOS tube MNPWR passes through inductance L connection VOUT output letter
Number, and the source electrode of above-mentioned first NMOS tube MNPWR is also connected with the cathode of first diode Dpwr, above-mentioned first diode Dpwr
Plus earth, above-mentioned first NMOS tube MNPWR grid connection third NMOS tube MN1 drain electrode and the 2nd NOMS pipe MNPRE
Source electrode, and pass through the drain electrode of the first PMOS tube of resistance R1 connection MP1；The drain electrode connection VIN of above-mentioned second NMOS tube MNPRE is defeated
Enter signal, the grid of above-mentioned second NMOS tube MNPRE connects the drain electrode of the first PMOS tube MP1, the source of above-mentioned first PMOS tube MP1
Pole connects the cold end of the source electrode connection high channel power supply of the hot end HB, above-mentioned third NMOS tube MN1 of high channel power supply
HS, the grid of above-mentioned first PMOS tube MP1 and the grid of third NMOS tube MN1 are all connected with pre-drive signal HPRE；Above-mentioned first
Capacitor Cboost is connected between the hot end HB of high channel power supply and cold end HS.
Preferably, the drain electrode MNPRE of above-mentioned second NMOS tube passes through the second diode D2 connection VIN input signal, and
And the anode connection VIN input signal of above-mentioned second diode D2, cathode connect the drain electrode of the second NMOS tube MNPRE.
Preferably, the drain electrode of above-mentioned second NMOS tube MNPRE is by triode QD connection VIN input signal, and on
The base stage and collector for stating triode QD are all connected with VIN signal, and the emitter of above-mentioned triode QD connects the second NMOS tube MNPRE
Drain electrode.
Preferably, the drain electrode of above-mentioned second NMOS tube MNPRE passes through the 5th NMOS tube MND connection VIN input signal, and
And the grid and source electrode of above-mentioned 5th NMOS tube MND is all connected with VIN signal, the drain electrode connection second of above-mentioned 5th NMOS tube MND
The drain electrode of NMOS tube MNPRE.
A kind of driving circuit for power device, including the first NMOS tube MNPWR, the second NMOS tube MNPRE, first couple
Polarity triode QN1, the second bipolarity triode QP1, inductance L, first diode Dpwr, the second diode D2, first capacitor
Cboost, resistance R1, the drain electrode of above-mentioned first NMOS tube MNPWR are connect with VIN input signal, above-mentioned first NMOS tube MNPWR
Source electrode by inductance L connection VOUT output signal, and the source electrode of above-mentioned first NMOS tube MNPWR is also connected with first diode
The grid connection first of the cathode of Dpwr, the plus earth of above-mentioned first diode Dpwr, above-mentioned first NMOS tube MNPWR is bipolar
Property the collector of the triode QN1 and source electrode of the 2nd NOMS pipe MNPRE, and pass through resistance R1 connection the second bipolarity triode
The collector of QP1；The drain electrode MNPRE of above-mentioned second NMOS tube by the second diode D2 connection VIN input signal, above-mentioned the
The grid of two NMOS tube MNPRE connects the collector of the second bipolarity triode QP1, above-mentioned second bipolarity triode QP1's
Emitter connects the emitter connection high channel electricity of the hot end HB, above-mentioned first bipolarity triode QN1 of high channel power supply
The base stage of the cold end HS in source, the base stage of above-mentioned second bipolarity triode QP1 and the first bipolarity triode QN1 are all connected with
Pre-drive signal HPRE；Above-mentioned first capacitor Cboost be connected to high channel power supply hot end HB and cold end HS it
Between.
A kind of driving circuit for power device, including the first NMOS tube MNPWR, the second NMOS tube MNPRE, third
NMOS tube MN1, the 4th NMOS tube MN2, the first PMOS tube MP1, the second PMOS tube MP2, inductance L, first diode Dpwr, first
Capacitor Cboost, the drain electrode of above-mentioned first NMOS tube MNPWR are connect with VIN input signal, the source of above-mentioned first NMOS tube MNPWR
Pole is by inductance L connection VOUT output signal, and the source electrode of above-mentioned first NMOS tube MNPWR is also connected with first diode Dpwr
Cathode, the plus earth of above-mentioned first diode Dpwr, the grid of above-mentioned first NMOS tube MNPWR connects the 4th NMOS tube
The drain electrode of MN2, the 2nd NOMS pipe MNPRE source electrode, the second PMOS tube MP2 drain electrode, the drain electrode of above-mentioned second NMOS tube MNPRE
VIN input signal is connected, the grid of above-mentioned second NMOS tube MNPRE connects the drain electrode and third NMOS tube of the first PMOS tube MP1
The drain electrode of MN1, the source electrode of above-mentioned first PMOS tube MP1 and the source electrode of the second PMOS tube MP2 are all connected with the height electricity of high channel power supply
Position end HB, the source electrode of above-mentioned third NMOS tube MN1 and the source electrode of the 4th NMOS tube MN2 are all connected with the cold end of high channel power supply
HS, the grid of above-mentioned first PMOS tube MP1, the grid of the second PMOS tube MP2, third NMOS tube MN1 and the 4th NMOS tube MN2
Grid is all connected with pre-drive signal HPRE；Above-mentioned first capacitor Cboost is connected to the hot end HB and low electricity of high channel power supply
Between the end HS of position.
Preferably, above-mentioned second PMOS tube MP2 passes through second resistance R connection pre-drive signal HPRE.
Preferably, above-mentioned second PMOS tube MP2 passes through delay unit delay connection pre-drive signal HPRE.
Compared with prior art, the beneficial effects of the present invention are:
The present invention opens the moment in power device MNPWR, and the second NMOS tube MNPRE provides main charging current to MNPWR
Gate charges, can reduce the peak point current for flowing through driving stage, also can reduce the peak discharge current and electric discharge electricity of Cboost
Lotus.Correspondingly, MP1 area and Cboost capacitance also can reduce.
Detailed description of the invention
Fig. 1 is traditional asynchronous buck Bootstrapping drive circuit.
Fig. 2 is traditional synchronization buck Bootstrapping drive circuit.
Fig. 3 is traditional simplified Bootstrapping drive circuit.
Fig. 4 is basic circuit structure schematic diagram of the invention.
Fig. 5 is the electrical block diagram of one embodiment of the present of invention.
Fig. 6 is the electrical block diagram of the other embodiment of the present invention.
Fig. 7 is the electrical block diagram of the other embodiment of the present invention.
Fig. 8 is the electrical block diagram of the other embodiment of the present invention.
Fig. 9 is the electrical block diagram of the other embodiment of the present invention.
Figure 10 is the electrical block diagram of the other embodiment of the present invention.
Figure 11 is the electrical block diagram of the other embodiment of the present invention.
Figure 12 is the schematic diagram of other one way conducting devices of the other embodiment of the present invention.
Figure 13 is the relation schematic diagram of gate source voltage and gate charge.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, with reference to the accompanying drawings and embodiments, right
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.
Fig. 4 shows one embodiment of the present of invention, a kind of driving circuit for power device, including the first NMOS tube
MNPWR, the second NMOS tube MNPRE, third NMOS tube MN1, the first PMOS tube MP1, inductance L, first diode Dpwr, the first electricity
Hold Cboost, resistance R1, the drain electrode of above-mentioned first NMOS tube MNPWR is connect with VIN input signal, above-mentioned first NMOS tube
The source electrode of MNPWR is by inductance L connection VOUT output signal, and the source electrode of above-mentioned first NMOS tube MNPWR is also connected with first
The cathode of diode Dpwr, the plus earth of above-mentioned first diode Dpwr, the grid connection the of above-mentioned first NMOS tube MNPWR
The drain electrode of three NMOS tube MN1 and the source electrode of the 2nd NOMS pipe MNPRE, and pass through the drain electrode of the first PMOS tube of resistance R1 connection MP1；
The drain electrode of above-mentioned second NMOS tube MNPRE connects VIN input signal, the grid connection first of above-mentioned second NMOS tube MNPRE
The drain electrode of PMOS tube MP1, the hot end HB of the source electrode connection high channel power supply of above-mentioned first PMOS tube MP1, above-mentioned third
The cold end HS of the source electrode connection high channel power supply of NMOS tube MN1, the grid and third NMOS tube of above-mentioned first PMOS tube MP1
The grid of MN1 is all connected with pre-drive signal HPRE；Above-mentioned first capacitor Cboost is connected to the hot end HB of high channel power supply
Between cold end HS.
The drain electrode MNPRE of above-mentioned second NMOS tube passes through the second diode D2 connection VIN input signal, and above-mentioned second
The anode connection VIN input signal of diode D2, cathode connect the drain electrode of the second NMOS tube MNPRE.One is increased herein
One way conducting device, effect are: as HO > VIN, D2 blocks charging current i1 and flows to VIN, flows into charging current i1 all
MNPWR grid avoids the loss of charging current i1.
Working principle in the present embodiment is: when HPRE is low, MP1 is open-minded, and MN1 shutdown, HO1 is height.HO1 is height,
MNPWR gate charges are given by R1, and charging current i1 is limited and smaller by R1, is provided by Cboost.HO1 is height, and MNPRE is opened
It is logical, MNPWR gate charges are given, charging current i2 is very big, is provided by vin.As HO >=VIN, the path of charging current i1 is
Cboost, MP1, R1 make HO continue to rise, until equal with HB current potential.As HO > VIN, D2 blocks charging current i1 flow direction
VIN makes charging current i1 all flow into MNPWR grid, avoids the loss of charging current i1.
When HPRE is high, MP1 shutdown, MN1 is open-minded, and HO1 is low.MNPWR gate charge is bled off rapidly by MN1,
Therefore, MNPWR can be rapidly switched off.Because MNPRE is small more than MNPWR, the MNPRE gate charge of very little is also by R1 and MN1 quilt
It bleeds off rapidly, therefore, MNPRE can also be rapidly switched off.
It is to sum up above-mentioned, it is opened the moment in power device MNPWR, the second NMOS tube MNPRE provides main charging current
MNPWR gate charges are given, the peak point current that part flows through driving stage is can reduce, also can reduce the peak discharge current of Cboost
And discharge charge.Correspondingly, MP1 area and Cboost capacitance also can reduce.Meanwhile not influencing power device MNPWR shutdown
Speed.
D2 is also possible to the other devices or circuit with unilateal conduction characteristic (similar diode), including but not limited to schemes
Device and its application method shown in 12.Figure 10 and Figure 11 is two using the other devices of unilateal conduction characteristic or the implementation of circuit
Example.
Figure 10 shows another embodiment of the invention, and the second diode D2 is changed to triode in the embodiment
The drain electrode of QD, i.e., above-mentioned second NMOS tube MNPRE are by triode QD connection VIN input signal, and above-mentioned triode QD
Base stage and collector are all connected with VIN signal, and the emitter of above-mentioned triode QD connects the drain electrode of the second NMOS tube MNPRE.
Figure 11 shows another embodiment of the invention, and the second diode D2 is changed to the 5th NMOS in the embodiment
The drain electrode of pipe MND, i.e., above-mentioned second NMOS tube MNPRE are by the 5th NMOS tube MND connection VIN input signal, and above-mentioned the
The grid and source electrode of five NMOS tube MND is all connected with VIN signal, and the drain electrode of above-mentioned 5th NMOS tube MND connects the second NMOS tube
The drain electrode of MNPRE.
Fig. 6 shows using bipolarity triode the embodiment for realizing driving circuit, a kind of drive for power device
Dynamic circuit, including the first NMOS tube MNPWR, the second NMOS tube MNPRE, the first bipolarity triode QN1, three pole of the second bipolarity
Pipe QP1, inductance L, first diode Dpwr, the second diode D2, first capacitor Cboost, resistance R1, above-mentioned first NMOS tube
The drain electrode of MNPWR is connect with VIN input signal, and the source electrode of above-mentioned first NMOS tube MNPWR passes through inductance L connection VOUT output letter
Number, and the source electrode of above-mentioned first NMOS tube MNPWR is also connected with the cathode of first diode Dpwr, above-mentioned first diode Dpwr
Plus earth, the grid of above-mentioned first NMOS tube MNPWR connects the collector and the 2nd NOMS of the first bipolarity triode QN1
The source electrode of pipe MNPRE, and pass through the collector of resistance R1 connection the second bipolarity triode QP1；The leakage of above-mentioned second NMOS tube
Pole MNPRE by the second diode D2 connection VIN input signal, above-mentioned second NMOS tube MNPRE grid connection second pair
The collector of polarity triode QP1, the hot end of the emitter connection high channel power supply of above-mentioned second bipolarity triode QP1
The cold end HS of the emitter connection high channel power supply of HB, above-mentioned first bipolarity triode QN1, above-mentioned second bipolarity three
The base stage of pole pipe QP1 and the base stage of the first bipolarity triode QN1 are all connected with pre-drive signal HPRE；Above-mentioned first capacitor
Cboost is connected between the hot end HB of high channel power supply and cold end HS.
Opened the moment in power device MNPWR, R1 is to limit high channel power supply HB(Cboost) to power device MNPWR
Gate charging current i1.It can also otherwise realize, Fig. 7 is exactly that gate charging current i1 is adjusted by MP2, is passed through
MN2 adjusts gate discharge current.
As shown in fig. 7, a kind of driving circuit for power device, including the first NMOS tube MNPWR, the second NMOS tube
MNPRE, third NMOS tube MN1, the 4th NMOS tube MN2, the first PMOS tube MP1, the second PMOS tube MP2, inductance L, the one or two pole
Pipe Dpwr, first capacitor Cboost, the drain electrode of above-mentioned first NMOS tube MNPWR are connect with VIN input signal, above-mentioned first NMOS
The source electrode of pipe MNPWR is by inductance L connection VOUT output signal, and the source electrode of above-mentioned first NMOS tube MNPWR is also connected with the
The cathode of one diode Dpwr, the plus earth of above-mentioned first diode Dpwr, the grid connection of above-mentioned first NMOS tube MNPWR
The drain electrode of 4th NMOS tube MN2, the 2nd NOMS pipe MNPRE source electrode, the second PMOS tube MP2 drain electrode, above-mentioned second NMOS tube
The drain electrode of MNPRE connects VIN input signal, the grid of above-mentioned second NMOS tube MNPRE connect the first PMOS tube MP1 drain electrode and
The drain electrode of third NMOS tube MN1, the source electrode of above-mentioned first PMOS tube MP1 and the source electrode of the second PMOS tube MP2 are all connected with high channel
The hot end HB of power supply, the source electrode of above-mentioned third NMOS tube MN1 and the source electrode of the 4th NMOS tube MN2 are all connected with high channel power supply
The grid of cold end HS, above-mentioned first PMOS tube MP1, the second PMOS tube MP2 grid, third NMOS tube MN1 and the 4th
The grid of NMOS tube MN2 is all connected with pre-drive signal HPRE；Above-mentioned first capacitor Cboost is connected to the height electricity of high channel power supply
Between the end HB and cold end HS of position.
Fig. 8 increases a resistance on the basis of Fig. 7, i.e., above-mentioned second PMOS tube MP2 is pre- by second resistance R connection
Driving signal HPRE.It is going here and there a resistance on MP2 grid in the present embodiment, is realizing that the delay of MP2 is open-minded.
Fig. 9 increases delay unit on the basis of Fig. 8, i.e., above-mentioned second PMOS tube MP2 is connected by delay unit delay
Meet pre-drive signal HPRE.HPRE drives MP2 by delay unit, realizes that the delay of MP2 is open-minded.
" one embodiment ", " another embodiment ", " embodiment ", " preferred implementation spoken of in the present specification
Example " etc., referring to combining specific features, structure or the feature of embodiment description includes describing extremely in the application generality
In few one embodiment.It is not centainly to refer to the same embodiment that statement of the same race, which occur, in multiple places in the description.Into one
For step, when describing a specific features, structure or feature in conjunction with any embodiment, what is advocated is to combine other implementations
Example realizes that this feature, structure or feature are also fallen within the scope of the present invention.
Although reference be made herein to invention has been described for multiple explanatory embodiments of the invention, however, it is to be understood that
Those skilled in the art can be designed that a lot of other modification and implementations, these modifications and implementations will fall in this Shen
It please be within disclosed scope and spirit.More specifically, disclose in the application, drawings and claims in the range of, can
With the building block and/or a variety of variations and modifications of layout progress to theme combination layout.In addition to building block and/or layout
Outside the modification and improvement of progress, to those skilled in the art, other purposes also be will be apparent.
Claims (8)
1. a kind of driving circuit for power device, it is characterised in that: including the first NMOS tube MNPWR, the second NMOS tube
MNPRE, third NMOS tube MN1, the first PMOS tube MP1, inductance L, first diode Dpwr, first capacitor Cboost, resistance R1,
The drain electrode of the first NMOS tube MNPWR is connect with VIN input signal, and the source electrode of the first NMOS tube MNPWR passes through
Inductance L connection VOUT output signal, and the source electrode of the first NMOS tube MNPWR is also connected with the negative of first diode Dpwr
Pole, the plus earth of the first diode Dpwr, the grid connection third NMOS tube MN1's of the first NMOS tube MNPWR
The source electrode of drain electrode and the 2nd NOMS pipe MNPRE, and pass through the drain electrode of the first PMOS tube of resistance R1 connection MP1；
The drain electrode of the second NMOS tube MNPRE connects VIN input signal, the grid connection of the second NMOS tube MNPRE the
The drain electrode of one PMOS tube MP1,
The hot end HB of the source electrode connection high channel power supply of the first PMOS tube MP1, the source electrode of the third NMOS tube MN1
The cold end HS of high channel power supply is connected, the grid of the first PMOS tube MP1 and the grid of third NMOS tube MN1 are all connected with
Pre-drive signal HPRE；
The first capacitor Cboost is connected between the hot end HB of high channel power supply and cold end HS.
2. the driving circuit according to claim 1 for power device, it is characterised in that: the leakage of second NMOS tube
Pole MNPRE is by the second diode D2 connection VIN input signal, and the anode connection VIN of the second diode D2 is inputted
Signal, cathode connect the drain electrode of the second NMOS tube MNPRE.
3. the driving circuit according to claim 1 for power device, it is characterised in that: second NMOS tube
The drain electrode of MNPRE is by triode QD connection VIN input signal, and the base stage of the triode QD and collector are all connected with
VIN signal, the emitter of the triode QD connect the drain electrode of the second NMOS tube MNPRE.
4. the driving circuit according to claim 1 for power device, it is characterised in that: second NMOS tube
The drain electrode of MNPRE passes through the 5th NMOS tube MND connection VIN input signal, and the grid and source electrode of the 5th NMOS tube MND
It is all connected with VIN signal, the drain electrode of the second NMOS tube MNPRE of drain electrode connection of the 5th NMOS tube MND.
5. a kind of driving circuit for power device, it is characterised in that: including the first NMOS tube MNPWR, the second NMOS tube
MNPRE, the first bipolarity triode QN1, the second bipolarity triode QP1, inductance L, first diode Dpwr, the second diode
D2, first capacitor Cboost, resistance R1,
The drain electrode of the first NMOS tube MNPWR is connect with VIN input signal, and the source electrode of the first NMOS tube MNPWR passes through
Inductance L connection VOUT output signal, and the source electrode of the first NMOS tube MNPWR is also connected with the negative of first diode Dpwr
The grid of pole, the plus earth of the first diode Dpwr, the first NMOS tube MNPWR connects the first bipolarity triode
The source electrode of the collector of QN1 and the 2nd NOMS pipe MNPRE, and pass through the current collection of resistance R1 connection the second bipolarity triode QP1
Pole；
The drain electrode MNPRE of second NMOS tube passes through the second diode D2 connection VIN input signal, second NMOS tube
The grid of MNPRE connects the collector of the second bipolarity triode QP1,
The hot end HB of the emitter connection high channel power supply of the second bipolarity triode QP1, first bipolarity
The cold end HS of the emitter connection high channel power supply of triode QN1, the base stage of the second bipolarity triode QP1 and the
The base stage of bipolar triode QN1 is all connected with pre-drive signal HPRE；
The first capacitor Cboost is connected between the hot end HB of high channel power supply and cold end HS.
6. a kind of driving circuit for power device, it is characterised in that: including the first NMOS tube MNPWR, the second NMOS tube
MNPRE, third NMOS tube MN1, the 4th NMOS tube MN2, the first PMOS tube MP1, the second PMOS tube MP2, inductance L, the one or two pole
Pipe Dpwr, first capacitor Cboost, resistance R1,
The drain electrode of the first NMOS tube MNPWR is connect with VIN input signal, and the source electrode of the first NMOS tube MNPWR passes through
Inductance L connection VOUT output signal, and the source electrode of the first NMOS tube MNPWR is also connected with the negative of first diode Dpwr
The grid of pole, the plus earth of the first diode Dpwr, the first NMOS tube MNPWR connects the 4th NMOS tube MN2's
It drains, the drain electrode of the source electrode, the second PMOS tube MP2 of the 2nd NOMS pipe MNPRE,
The drain electrode of the second NMOS tube MNPRE connects VIN input signal, the grid connection of the second NMOS tube MNPRE the
The drain electrode of one PMOS tube MP1 and the drain electrode of third NMOS tube MN1,
The source electrode of the first PMOS tube MP1 and the source electrode of the second PMOS tube MP2 are all connected with the hot end HB of high channel power supply,
The source electrode of the third NMOS tube MN1 and the source electrode of the 4th NMOS tube MN2 are all connected with the cold end HS of high channel power supply,
Grid, third NMOS tube MN1 and the 4th NMOS tube MN2 of the grid of the first PMOS tube MP1, the second PMOS tube MP2
Grid be all connected with pre-drive signal HPRE；
The first capacitor Cboost is connected between the hot end HB of high channel power supply and cold end HS.
7. the driving circuit according to claim 6 for power device, it is characterised in that: the second PMOS tube MP2
Pass through second resistance R connection pre-drive signal HPRE.
8. the driving circuit according to claim 6 for power device, it is characterised in that: the second PMOS tube MP2
Pass through delay unit delay connection pre-drive signal HPRE.
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| CN201910153133.5A CN109861503B (en) | 2019-02-28 | 2019-02-28 | Driving circuit for power device |
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| CN201910153133.5A CN109861503B (en) | 2019-02-28 | 2019-02-28 | Driving circuit for power device |
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| CN108092651A (en) * | 2018-01-09 | 2018-05-29 | 电子科技大学 | A kind of variable slope driving circuit |
| CN109039029A (en) * | 2018-08-15 | 2018-12-18 | 电子科技大学 | A kind of bootstrap charge circuit circuit suitable for GaN power device gate drive circuit |
| CN209435101U (en) * | 2019-02-28 | 2019-09-24 | 深圳市泰德半导体有限公司 | Driving circuit for power device |
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| JP2005208589A (en) * | 2003-12-08 | 2005-08-04 | Toshiba Matsushita Display Technology Co Ltd | El display device |
| JP2013223265A (en) * | 2012-04-13 | 2013-10-28 | Hitachi Ltd | Driving device for semi-conductor device |
| CN103701308A (en) * | 2014-01-09 | 2014-04-02 | 帝奥微电子有限公司 | Synchronizing power tube driving and bootstrap capacitor charging circuit |
| CN103915990A (en) * | 2014-04-18 | 2014-07-09 | 电子科技大学 | Drive circuit for GaN power devices |
| CN108092651A (en) * | 2018-01-09 | 2018-05-29 | 电子科技大学 | A kind of variable slope driving circuit |
| CN109039029A (en) * | 2018-08-15 | 2018-12-18 | 电子科技大学 | A kind of bootstrap charge circuit circuit suitable for GaN power device gate drive circuit |
| CN209435101U (en) * | 2019-02-28 | 2019-09-24 | 深圳市泰德半导体有限公司 | Driving circuit for power device |
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