CN109787612A - A kind of novel wide scope sub-threshold level shifter circuit - Google Patents
A kind of novel wide scope sub-threshold level shifter circuit Download PDFInfo
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- CN109787612A CN109787612A CN201910046589.1A CN201910046589A CN109787612A CN 109787612 A CN109787612 A CN 109787612A CN 201910046589 A CN201910046589 A CN 201910046589A CN 109787612 A CN109787612 A CN 109787612A
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Abstract
The invention discloses a kind of novel wide scope sub-threshold level shifter circuit, including inverter circuit and level shifting circuit, the inverter circuit includes an a PMOS device MP3 and NMOS device MN4；The level shifting circuit includes two MP1 ~ MP2 and three MN1 ~ MN3；The source electrode of MP3 connects low suppling voltage, and the drain electrode of MP3 connects the drain electrode of MN4, the source electrode ground connection of MN4；The source electrode of MP1, MP2 connect high supply voltage；The drain electrode of MP1 connects the drain electrode of MN1, and the source electrode of MN1 connects the drain electrode of MN2, the source electrode ground connection of MN2；The drain electrode of MP2 connects the drain electrode of MN3, the source electrode ground connection of MN3；Connect the grid of MN2 after the grid of MP1, MP2 are connected after the drain electrode of connection MN1 again；The drain electrode of MP3, MN4 connect the grid of MN3.Circuit of the invention has apparent performance improvement in terms of energy consumption.
Description
Technical field
The present invention relates to level shifting circuit fields, and in particular to a kind of novel wide scope sub-threshold level shift unit electricity
Road.
Background technique
It is attractive that the multifunctionality and adaptability of system on chip (SoCs) design it to more power supplys, thus maximum limit
Degree ground reduces dynamic power consumption.Therefore, it is necessary to the level shifters with super low-power consumption and high speed to realize between different capacity
Signal interconnection.
Traditional Cross coupled level converter initial design is to provide for complete rail-to-rail output voltage swing.However,
Due to the contention between strong pull-up network (PUN) and weak pull-down network (PDN), there can be biggish power consumption.When supply voltage connects
When nearly threshold region, this phenomenon is more serious.
Shown in FIG. 1 is current mirror level shifter circuit structure, it is eliminated in conventional cross coupled level shift unit
Contention problem.When input signal " in " is high level, NMOS device MN1 conducting, NMOS device MN3 cut-off.Node A is drawn
Down to low level, the conducting of PMOS device MP1, MP2, output node " out " charges to high level.At this point, MN1 is still within conducting
It state and is closed without time enough, generates and flow through the quiescent current of MN1, MP1, lead to unnecessary quiescent dissipation.
Shown in Fig. 2 is Wilson current mirror level shifter circuit structure.This topological structure circuit shown in Fig. 1
On the basis of increase PMOS device MP3, MP3 a device and keep apart MP1 and MN1, prevent short circuit current and cause
Quiescent dissipation.However, (previous moment output node " out " is connected in MN1 conducting, MP3 when input signal " in " is high level
For low level), MN3 cut-off, node A is pulled low to low level, and MP1, MP2 conducting, output node " out ", which is electrically charged, causes MP3
Shutdown, therefore the electric current for being mirrored to MP2 will greatly reduce, and pull-up remitted its fury is caused to be electrically charged output node " out " cannot
To VDDH, there are voltage drops.
Summary of the invention
To solve deficiency in the prior art, the present invention provides a kind of novel wide scope sub-threshold level shift unit electricity
Road solves the upper serious contention of pull-up network and pulldown network near threshold region in conventional cross coupled level shift unit,
The loss of voltage problem of serious quiescent current and Wilson current mirror level shifter in current mirror level shifter.
In order to achieve the above objectives, the present invention adopts the following technical scheme:.
A kind of novel wide scope sub-threshold level shifter circuit, it is characterised in that: including inverter circuit and level
Conversion circuit, the inverter circuit include an a PMOS device MP3 and NMOS device MN4；The level shifting circuit
Including two PMOS device MP1~MP2 and three NMOS device MN1~MN3；
The source electrode of MP3 meets supply voltage VDDL, and the drain electrode of MP3 connects the drain electrode of MN4, the source electrode ground connection of MN4；MP1, MP2's
Source electrode meets supply voltage VDDH；The drain electrode of MP1 connects the drain electrode of MN1, and the source electrode of MN1 connects the drain electrode of MN2, the source electrode ground connection of MN2；
The drain electrode of MP2 connects the drain electrode of MN3, the source electrode ground connection of MN3；MN2 is met again after the drain electrode of connection MN1 after the grid of MP1, MP2 are connected
Grid；The drain electrode of MP3, MN4 connect the grid of MN3.
The novel wide scope sub-threshold level shifter circuit of one kind above-mentioned, it is characterized in that: described MP3, MN1, MN4
Input terminal of the grid as the circuit, output end of the drain electrode of MP2, MN3 as the circuit.
The novel wide scope sub-threshold level shifter circuit of one kind above-mentioned, it is characterized in that: when input signal is low electricity
Usually, MN1 ends, MN3 conducting；Since MN1 ends, the grid tie point A of MP1 and MP2, which charge to high level by MP1, to be caused
MP1, MP2 shutdown, while MN2 is connected, output node is pulled low to low level.
The novel wide scope sub-threshold level shifter circuit of one kind above-mentioned, it is characterized in that: when input signal is high electricity
Usually, MN1 is connected, MN3 cut-off；Since MN2 is connected, the grid tie point A of MP1 and MP2 are pulled to low level, make MP1, MP2
It is connected, on the right side of the current mirror in circuit left-hand branch to circuit, output node " out " is made to charge to high level；Node A simultaneously
Low level feedback turn off MN2 to the grid of MN2.
The novel wide scope sub-threshold level shifter circuit of one kind above-mentioned, it is characterized in that: when input signal is high electricity
Usually, MN2 device is used to turn off the DC current of level shifter circuit power supply to ground.
The novel wide scope sub-threshold level shifter circuit of one kind above-mentioned, it is characterized in that: MN1 in the circuit,
MN3, MN4, MP3 are the Low threshold transistor device lower than standard threshold voltage；Described MN2, MP1, MP2 are level threshold value crystal
Tube device.
Advantageous effects of the invention: the present invention is by increasing single NMOS device MN2 and using multi-Vt
Technology modifies traditional current mirror level shifter.When input signal is high level, MN2 is straight by power vd DH to GND's
Logical circulation road shutdown solves the quiescent current problem in traditional current mirror level shifter, while utilizing the inside of current mirror
The signal of node A to MN2 is fed back, and improves switching speed.Compared with the performance of other level shifters, circuit of the invention exists
It is optimized in terms of delay, power consumption, energy consumption, there is apparent performance improvement especially in terms of energy consumption.
Detailed description of the invention
Fig. 1 is current mirror level shifter circuit structural schematic diagram；
Fig. 2 is Wilson current mirror level shifter circuit structural schematic diagram；
Fig. 3 is the improved current mirror level shifter circuit structural schematic diagram of the present invention；
Fig. 4 is circuit structure simulation waveform of the present invention.
Specific embodiment
The invention will be further described below in conjunction with the accompanying drawings.Following embodiment is only used for clearly illustrating the present invention
Technical solution, and not intended to limit the protection scope of the present invention.
As shown in figure 3, a kind of novel wide scope sub-threshold level shifter circuit, including inverter circuit and level turn
Circuit is changed, the inverter circuit includes an a PMOS device MP3 and NMOS device MN4；The level shifting circuit packet
Include two PMOS device MP1~MP2 and three NMOS device MN1~MN3；The source electrode of MP3 connects supply voltage VDDL, the leakage of MP3
Pole connects the drain electrode of MN4, the source electrode ground connection of MN4；The source electrode of MP1, MP2 meet supply voltage VDDH；The drain electrode of MP1 connects the drain electrode of MN1,
The source electrode of MN1 connects the drain electrode of MN2, the source electrode ground connection of MN2；The drain electrode of MP2 connects the drain electrode of MN3, the source electrode ground connection of MN3；MP1,MP2
Grid be connected after connect the drain electrode of MN1 after connect the grid of MN2 again；The drain electrode of MP3, MN4 connect the grid of MN3；MP3,MN1,MN4
Input terminal " in " of the grid as the circuit, output end " out " of the drain electrode of MP2, MN3 as the circuit.
Sub-threshold level shift unit refers to that the size of the input signal of circuit of the present invention is lower than the threshold voltage of NMOS.
Supply voltage VDDL in the circuit is the supply voltage lower than threshold voltage, and supply voltage VDDH is higher than threshold
The supply voltage of threshold voltage.
MN1, MN3, MN4, MP3 are the Low threshold transistor device lower than standard threshold voltage in the circuit.
Described MN2, MP1, MP2 are level threshold value transistor device.
Standard threshold voltage value NMOS is 0.7V, and PMOS is -0.8V.
In order to more preferably illustrate circuit operation principle, it is assumed that the grid of MP1, MP2 are A node.
The working principle of the novel wide scope sub-threshold level shifter circuit of one kind of the invention is as follows: working as input signal
When " in " is low level, MN1 cut-off, MN3 conducting；Due to MN1 end, node A by MP1 charge to high level cause MP1,
MP2 shutdown, while MN2 is connected, output node " out " is pulled low to low level.When input signal " in " is high level, MN1
Conducting, MN3 cut-off；Since MN2 is connected, node A is pulled to low level, and MP1, MP2 is connected, the electric current in circuit left-hand branch
It is mirrored on the right side of circuit, output node " out " is made to charge to high level；The grid of low level feedback to the MN2 of node A make simultaneously
MN2 shutdown；MN2 device turns off the DC current of power supply in the level shifter circuit left-hand branch to ground, prevents
It flows through the quiescent current of MP1, MN1, MN2 and causes quiescent dissipation.
To further illustrate beneficial effects of the present invention, level shifter circuit proposed by the present invention is in 65nm CMOS work
It is emulated under skill technology.The size (breadth length ratio: W/L) of all transistors has been subjected to optimization, as shown in table 1.
1 transistor size of table
For further illustrate beneficial effects of the present invention, circuit simulation of the present invention frequency be 1MHz, input signal it is upper
It rises and fall time is 10ps, load capacitance is to carry out under 0.5fF.Simulation results waveform diagram of the present invention shown in Fig. 4.It is imitative
Very the result shows that, the deep subthreshold voltage of 0.2V can be converted to 1.2V by level shifter proposed by the present invention, be had wider
Voltage conversion range, while output voltage can directly be climbed to VDDH, eliminate Wilson current mirror level shift
Voltage drop problem in device.
When input signal " in " is switched to high level from low level, MN3 cut-off.The electric current of circuit left-hand branch can be fast
Speed is mirrored to circuit right-hand branch, makes output node " out " quick charge to high level；When input signal " in " is cut from high level
When changing to low level, MN1 cut-off, MN3 is connected and output node " out " is pulled low to GND.Node A is charged by MP1, weak
Electric current is mirrored and is amplified to circuit right-hand branch, the smaller contention problem of pull-up network and pulldown network in appearance.As a result, output
The fall time of node " out " is slightly larger than the rise time.
For further explanation beneficial effects of the present invention, the performance parameter of the level shifter proposed is measured,
And be compared with the circuit structure performance in bibliography [1]-[4], as shown in table 2.Wherein: Technology is institute's recruitment
Skill technology, VDDH are high supply voltages, and VDDL, min are minimum low suppling voltages, and Delay is delay time, and Energy is one
Energy consumption in switch periods, Static power are quiescent dissipations.
The result shows that the switching delay of circuit proposed by the invention is 19.89ns, total quiescent dissipation is 0.86nW,
Dynamic energy consumption in one switch periods is 29.47fJ.With other advanced level shifter (performance in document [1]-[4]) phases
Than all having and significantly improving in terms of delay, energy consumption and quiescent dissipation.
Circuit structure performance in 2 bibliography of table [1]-[4] compares
[1]L.Wen,X.Cheng,S.Tian,H.Wen,and X.Zeng,“Subthreshold level
shifterwithself-controlledcurrentlimiterbydetectingoutputerror,”IEEE
Transactions on Circuits and Systems II:Express Briefs,vol.63,no.4,pp.346–
350,Apr.2016.
[2]R.Lotfi,M.Saberi,S.R.Hosseini,A.R.Ahmadi-Mehr,and R.B.Staszewski,
“Energy-efficient wide-range voltage level shifters reaching 4.2fj/
transition,”IEEE Solid-State Circuits Letters,vol.1,no.2,pp.34–37,Feb.2018.
[3]S.R.Hosseini,M.Saberi,and R.Lotfi,“An energy-efficient level
shifter for low-power applications,”in Proc.2015IEEE International Symposium
on Circuits and Systems(ISCAS),May.2015,pp.2241–2244.
[4]V.L.Le and T.T.Kim,“An area and energy efficient ultra-low voltage
level shifter with pass transistor and reduced-swing output buffer in 65nm
CMOS,”IEEE Transactions on Circuits and Systems II:Express Briefs,vol.65,
no.5,pp.607–611,May.2018.
In conclusion the present invention is by increasing single NMOS device MN2 and modifying tradition using multi-Vt technology
Current mirror level shifter；When input signal is high level, MN2 turns off the DC channel of power vd DH to GND, solves
Quiescent current problem in traditional current mirror level shifter, while the signal of internal node A to the MN2 using current mirror
Feedback, improves switching speed.Compared with the performance of other level shifters, circuit of the invention is in delay, power consumption, energy consumption side
Face is optimized, and has apparent performance improvement especially in terms of energy consumption.
The above is only a preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art
For member, without departing from the technical principles of the invention, several improvement and deformations can also be made, these improvement and deformations
Also it should be regarded as protection scope of the present invention.
Claims (6)
1. a kind of novel wide scope sub-threshold level shifter circuit, it is characterised in that: turn including inverter circuit and level
Circuit is changed, the inverter circuit includes an a PMOS device MP3 and NMOS device MN4；The level shifting circuit packet
Include two PMOS device MP1~MP2 and three NMOS device MN1~MN3；
The source electrode of MP3 meets supply voltage VDDL, and the drain electrode of MP3 connects the drain electrode of MN4, the source electrode ground connection of MN4；The source electrode of MP1, MP2
Meet supply voltage VDDH；The drain electrode of MP1 connects the drain electrode of MN1, and the source electrode of MN1 connects the drain electrode of MN2, the source electrode ground connection of MN2；MP2's
Drain electrode connects the drain electrode of MN3, the source electrode ground connection of MN3；Connect the grid of MN2 after the grid of MP1, MP2 are connected after the drain electrode of connection MN1 again
Pole；The drain electrode of MP3, MN4 connect the grid of MN3.
2. the novel wide scope sub-threshold level shifter circuit of one kind according to claim 1, it is characterized in that: described
Input terminal of the grid of MP3, MN1, MN4 as the circuit, output end of the drain electrode of MP2, MN3 as the circuit.
3. the novel wide scope sub-threshold level shifter circuit of one kind according to claim 1, it is characterized in that: when input
When signal is low level, MN1 cut-off, MN3 conducting；Since MN1 ends, the grid tie point A of MP1 and MP2 are charged to by MP1
High level causes MP1, MP2 to turn off, while MN2 is connected, and output node is pulled low to low level.
4. the novel wide scope sub-threshold level shifter circuit of one kind according to claim 1, it is characterized in that: when input
When signal is high level, MN1 conducting, MN3 cut-off；Since MN2 is connected, the grid tie point A of MP1 and MP2 are pulled to low level,
MP1, MP2 is connected, on the right side of the current mirror in circuit left-hand branch to circuit, output node out is made to charge to high level；Together
The grid of low level feedback to the MN2 of Shi Jiedian A turn off MN2.
5. the novel wide scope sub-threshold level shifter circuit of one kind according to claim 1, it is characterized in that: when input
When signal is high level, MN2 device is used to turn off the DC current of level shifter circuit power supply to ground.
6. the novel wide scope sub-threshold level shifter circuit of one kind according to claim 1, it is characterized in that: the electricity
MN1, MN3, MN4, MP3 are the Low threshold transistor device lower than standard threshold voltage in road；Described MN2, MP1, MP2 are standard
Threshold transistor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910046589.1A CN109787612A (en) | 2019-01-18 | 2019-01-18 | A kind of novel wide scope sub-threshold level shifter circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910046589.1A CN109787612A (en) | 2019-01-18 | 2019-01-18 | A kind of novel wide scope sub-threshold level shifter circuit |
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| CN109787612A true CN109787612A (en) | 2019-05-21 |
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| CN201910046589.1A Withdrawn CN109787612A (en) | 2019-01-18 | 2019-01-18 | A kind of novel wide scope sub-threshold level shifter circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111478693A (en) * | 2020-05-07 | 2020-07-31 | 北京中科芯蕊科技有限公司 | Near-threshold level converter |
| CN112332833A (en) * | 2020-11-16 | 2021-02-05 | 海光信息技术股份有限公司 | Level conversion circuit and CPU chip with same |
-
2019
- 2019-01-18 CN CN201910046589.1A patent/CN109787612A/en not_active Withdrawn
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111478693A (en) * | 2020-05-07 | 2020-07-31 | 北京中科芯蕊科技有限公司 | Near-threshold level converter |
| CN112332833A (en) * | 2020-11-16 | 2021-02-05 | 海光信息技术股份有限公司 | Level conversion circuit and CPU chip with same |
| CN112332833B (en) * | 2020-11-16 | 2022-08-26 | 海光信息技术股份有限公司 | Level conversion circuit and CPU chip with same |
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Application publication date: 20190521 |