CN109859686A - Pixel-driving circuit and its driving method and display panel - Google Patents
Pixel-driving circuit and its driving method and display panel Download PDFInfo
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- CN109859686A CN109859686A CN201910247440.XA CN201910247440A CN109859686A CN 109859686 A CN109859686 A CN 109859686A CN 201910247440 A CN201910247440 A CN 201910247440A CN 109859686 A CN109859686 A CN 109859686A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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Abstract
Present disclose provides a kind of pixel-driving circuit and its driving methods and display panel.The pixel-driving circuit includes: light-emitting component；Drive sub-circuits are electrically connected to first node, second node and third node；First light emitting control sub-circuit and the second light emitting control sub-circuit, the first light emitting control sub-circuit is electrically connected to LED control signal line, first voltage signal wire and the first node, and the second light emitting control sub-circuit is electrically connected to the first end of the LED control signal line, the third node and light-emitting component；Drive control sub-circuit is electrically connected to gate drive signal line, data signal line and the first node；Reset subcircuit is electrically connected to the first end of reseting signal line, the second node and the light-emitting component.
Description
Technical field
This disclosure relates to field of display technology, more particularly to a kind of pixel-driving circuit and its driving method and display
Panel.
Background technique
In display field, low temperature polycrystalline silicon (Low temperature Polycrystalline Sillicon, LTPS)
Technique and oxide (Oxide) technique (for example, IGZO technique) are be commonly used to manufacture thin film transistor (TFT) (TFT) array substrate two
Kind technique.Low-temperature polysilicon oxide (Low temperature Polycrystalline Oxide, LTPO) technique by LTPS and
Two kinds of technique fusions of Oxide, to realize more outstanding display performance.
Summary of the invention
The present disclosure proposes a kind of pixel-driving circuit and its driving methods and display panel.
According to one aspect of the disclosure, a kind of pixel-driving circuit is proposed.The pixel-driving circuit includes: luminous
Element；Drive sub-circuits are electrically connected to first node, second node and third node, are configured as the voltage in second node
Control under by between first node and third node path be connected, and make in the path generate for sending out light-emitting component
The electric current of light；First light emitting control sub-circuit and the second light emitting control sub-circuit, the first light emitting control sub-circuit electrical connection
To LED control signal line, first voltage signal wire and the first node, the second light emitting control sub-circuit is electrically connected to
The first end of the LED control signal line, the third node and light-emitting component, the first light emitting control sub-circuit and institute
The second light emitting control sub-circuit is stated to be configured as under the control of the LED control signal from the LED control signal line, it will
The electric current for keeping light-emitting component luminous is transmitted to the first end of the light-emitting component；Drive control sub-circuit, electrical connection
To gate drive signal line, data signal line and the first node, it is configured as from the gate drive signal line
Under the control of gate drive signal, the data-signal from the data signal line is provided to the first node；Reset son
Circuit is electrically connected to the first end of reseting signal line, the second node and the light-emitting component, is configured as from described
Under the control of the reset signal of reseting signal line, using the reset signal to the of the second node and the light-emitting component
One end is resetted.
In some embodiments, the drive sub-circuits include driving transistor, the first transistor and storage capacitance.It is described
The control electrode of driving transistor is electrically connected to the second node, and the first pole is electrically connected to the first node, and the second pole is electrically connected
It is connected to the third node；The control electrode of the first transistor is electrically connected to the gate drive signal line, and the first pole is electrically connected
It is connected to the third node, the second pole is electrically connected to the second node；And the first end of the storage capacitance is electrically connected to
The first voltage signal wire, second end are electrically connected to the second node.The first transistor and the driving transistor
It is different types of transistor.
In some embodiments, the first light emitting control sub-circuit includes second transistor, second light emitting control
Sub-circuit includes third transistor.The control electrode of the second transistor is electrically connected to the LED control signal line, the first pole
It is electrically connected to the first voltage signal wire, the second pole is electrically connected to the first node；The control electrode of the third transistor
It is electrically connected to the LED control signal line, the first pole is electrically connected to the third node, and the second pole is electrically connected to described shine
The first end of element.The second transistor and the third transistor and the driving transistor are the crystal of same type
Pipe.
In some embodiments, the drive control sub-circuit includes the 4th transistor.The control of 4th transistor
Pole is electrically connected to the gate drive signal line, and the first pole is electrically connected to the data signal line, and the second pole is electrically connected to described
Second node.4th transistor and the driving transistor are different types of transistors.
In some embodiments, the reset subcircuit includes the 5th transistor and the 6th transistor.5th crystal
The control electrode of pipe and first is extremely electrically connected to the reseting signal line jointly, and the second pole is electrically connected to the second node.It is described
The control electrode of 6th transistor and first is extremely electrically connected to the reseting signal line jointly, and the second pole is electrically connected to the luminous member
The first end of part.5th transistor and the 6th transistor and the driving transistor are the transistors of same type.
According to another aspect of the present disclosure, a kind of display panel is provided.The display panel includes: multi-strip scanning line；
Multiple data lines, it is arranged in a crossed manner with the multi-strip scanning line；And multiple pixel units, every number is set with a matrix type
It is electrically connected according to line and each scan line infall, and with corresponding data line and scan line, each pixel unit includes according to upper
State the pixel-driving circuit of any embodiment.The data signal line that the pixel-driving circuit is electrically connected is by the pixel unit
Respective data lines serve as, the gate drive signal line that the pixel-driving circuit is electrically connected by the pixel unit correspondence
Scan line is served as.
In some embodiments, display panel further includes a plurality of light emitting control line.The a plurality of light emitting control line with it is described
Multi-strip scanning line or the parallel arrangement of the multiple data lines, and with the multi-strip scanning line or the multiple data lines electricity respectively
It is connected to identical pixel unit.The LED control signal line that the pixel-driving circuit is electrically connected is by the pixel unit
Corresponding light emitting control line charge is worked as.
In some embodiments, the display panel further includes multiple phase inverters, respectively one by one with the multiple scan line
Accordingly it is electrically connected.The input terminal of the phase inverter is electrically connected with corresponding scan line, the output end of the phase inverter with it is corresponding
The pixel unit that is driven of scan line reset line electrical connection, wherein the pixel-driving circuit institute electricity in the pixel unit
The reseting signal line of connection is served as by the reset line.The phase inverter is also connected electrically to reset level end and reference level end,
The phase inverter is configured as that under the control of the gate drive signal from the scan line, the reset level end will be come from
Reset level or reference level from the reference level end provide to the reset line.
In some embodiments, the phase inverter includes the first inverted transistors and the second inverted transistors.Described first
The control electrode of inverted transistors is electrically connected to the scan line, and the first pole is electrically connected to the reset level end, and the second pole is electrically connected
It is connected to the reset line, the control electrode of second inverted transistors is electrically connected to the scan line, and the second pole is electrically connected to institute
Reference level end is stated, the second pole is electrically connected to the reset line.First inverted transistors and second inverted transistors
It is different types of transistor.
In some embodiments, the reset level is level corresponding with the driving significant level of transistor, described
Reference level is equal to the inactive level of the driving transistor and the sum of the threshold voltage of the driving transistor.
According to the another aspect of the disclosure, provide a kind of to according to the progress of the pixel-driving circuit of any of the above-described embodiment
The method of driving.The described method includes: providing the LED control signal with the first level in the first period, provide with
The gate drive signal and reset signal of two level, and the data-signal with second electrical level is provided；In the second period, provide
LED control signal and gate drive signal with the first level provide the reset signal with reference level, and provide
Data-signal with the first level；In the third period, the reset signal with reference level is provided, is provided with second electrical level
LED control signal, gate drive signal, and provide have second electrical level data-signal.First level is and drive
The corresponding level of inactive level of dynamic transistor, the second electrical level are electricity corresponding with the driving significant level of transistor
It is flat.
In some embodiments, the reference level is equal to the threshold voltage of first level and the driving transistor
The sum of.
Detailed description of the invention
In order to illustrate more clearly of the embodiment of the present disclosure or technical solution in the prior art, embodiment will be described below
Needed in attached drawing be briefly described.It should be evident that the accompanying drawings in the following description is only some of the disclosure
Embodiment for those of ordinary skill in the art without creative efforts, can also be attached according to these
Figure obtains other attached drawings, in figure:
Fig. 1 shows the schematic block diagram of the pixel-driving circuit according to the embodiment of the present disclosure.
Fig. 2 shows the more detailed structures of one embodiment according to the disclosure of the pixel-driving circuit of Fig. 1.
Fig. 3 A shows the signal timing diagram of the pixel-driving circuit of Fig. 2.
Fig. 3 B- Fig. 3 D shows each phase principle schematic diagram of the pixel-driving circuit of Fig. 2.
Fig. 4 shows the schematic block diagram of the display panel according to the embodiment of the present disclosure.
Fig. 5 shows the schematic configuration diagram of the phase inverter of the display panel according to the embodiment of the present disclosure.
Fig. 6 shows the more detailed circuit diagram of the phase inverter of Fig. 5.
Fig. 7 shows the flow chart of the driving method of the pixel-driving circuit according to the embodiment of the present disclosure.
Specific embodiment
To keep the purposes, technical schemes and advantages of the embodiment of the present disclosure clearer, below in conjunction with the embodiment of the present disclosure
In attached drawing, clear, complete description is carried out to the technical solution in the embodiment of the present disclosure.Obviously, described embodiment is
A part of this disclosure embodiment, rather than all.Based on the described embodiment of the present disclosure, those of ordinary skill in the art exist
The every other embodiment obtained under the premise of without creative work belongs to the range of disclosure protection.It should be noted that running through
Attached drawing, identical element are indicated by same or similar appended drawing reference.In the following description, some specific embodiments are only used for
Purpose is described, and should not be construed to the disclosure has an any restrictions, and the only example of the embodiment of the present disclosure.It may cause
When understanding of this disclosure causes to obscure, conventional structure or construction will be omitted.It should be noted that the shape and size of each component in figure not
Reflect actual size and ratio, and only illustrates the content of the embodiment of the present disclosure.
Unless otherwise defined, the technical term or scientific term that the embodiment of the present disclosure uses should be those skilled in the art
The ordinary meaning understood." first ", " second " used in the embodiment of the present disclosure and similar word are not offered as any suitable
Sequence, quantity or importance, and be only intended to distinguish different component parts.
In addition, term " electrical connection " can refer to that two components are directly electrically connected in the description of the embodiment of the present disclosure,
It can refer to and be electrically connected between two components via one or more other assemblies.In addition, the two components can be by wired
Or wireless mode is electrically connected or coupling.
The transistor used in the embodiment of the present disclosure all can be thin film transistor (TFT) or field-effect tube or other characteristics it is identical
Device.According to effect in circuit, the transistor that the embodiment of the present disclosure uses is mainly switching transistor.Due to adopting here
The source electrode of thin film transistor (TFT), drain electrode are symmetrical, so its source electrode, drain electrode can be interchanged.In the embodiments of the present disclosure, will
The grid of transistor is known as control electrode, one in source electrode and drain electrode is known as the first pole, by another in source electrode and drain electrode
Referred to as the second pole.
In the following example, the pixel-driving circuit realized using LTPO technology is described, wherein portion of transistor passes through
LTPS technique is realized, is realized with transistor by oxide (such as IGZO) technique.Hereinafter, the crystalline substances such as transistor will be driven
Body pipe is illustrated as the P-type TFT realized by LTPS technique, and some other transistor is illustrated as through IGZO work
The N-type transistor that skill is realized.It should be understood that this is intended only as example, and in other embodiments, each transistor of the disclosure
It can be realized by other techniques, and may belong to different transistor types.
In addition, term " the first level " and " second electrical level " are only used for difference two in the description of the embodiment of the present disclosure
The amplitude of level is different.In some embodiments, " the first level " can be the inactive level for ending related transistor, " the
Two level " can be the significant level that related transistor is connected.Hereinafter, since driving transistor is illustrated as p-type film
Transistor, therefore " the first level " is illustrated as high level VH, and " second electrical level " is illustrated as low level VL.
The disclosure is specifically described below with reference to attached drawing.
Fig. 1 shows the schematic block diagram of the pixel-driving circuit 100 according to the embodiment of the present disclosure.
As shown in Figure 1, pixel-driving circuit 100 may include light-emitting component 110, the luminous control of drive sub-circuits 120, first
System circuit 130, the second light emitting control sub-circuit 140, drive control sub-circuit 150 and reset subcircuit 160.
Light-emitting component 110 can be any light-emitting component driven with electric current, such as OLED light emitting unit.Light-emitting component 110
It has a first end and a second end, first end connects the second light emitting control sub-circuit 140, and second end is connected and fixed voltage end ELVSS.
In some embodiments, first end is the anode of light-emitting component 110, and second end is the cathode of light-emitting component 110.
Drive sub-circuits 120 are electrically connected to first node N1, second node N2 and third node N3, are configured as second
The path between first node N1 and third node N3 is connected under the control of the voltage of node N2, and makes to generate in the path
Electric current for keeping light-emitting component 110 luminous.
First light emitting control sub-circuit 130 is electrically connected to LED control signal line EM, first voltage signal wire V1 and first
Node N1.Second light emitting control sub-circuit 140 is electrically connected to LED control signal line EM, third node N3 and light-emitting component 110
First end.First light emitting control sub-circuit 130 and the second light emitting control sub-circuit 140 are configured as believing from light emitting control
Under the control of the LED control signal of number line EM, the electric current for being used to keep light-emitting component 110 luminous is transmitted to light-emitting component 110
First end.
Specifically, the first light emitting control sub-circuit 130 is under the control of LED control signal from first voltage signal wire V1
First voltage is received, and first voltage is transmitted to drive sub-circuits 120.In some embodiments, first voltage can be electricity
Source voltage ELVDD.In some embodiments, ELVDD is higher than the first level (i.e. high level VH).Second light emitting control sub-circuit
140 electric currents for being used to make light-emitting component 110 luminous for generating drive sub-circuits 120 under the control of LED control signal provide
To the first end of light-emitting component 110.
Drive control sub-circuit 150 is electrically connected to gate drive signal line GATE, data signal line DATA and first node
N1.Drive control sub-circuit 150 is configured as under the control of the gate drive signal from gate drive signal line GATE, will
Data-signal from data signal line DATA is provided to first node N1.
Reset subcircuit 160 is electrically connected to the first end of reseting signal line RESET, second node N2 and light-emitting component 110.
Reset subcircuit 160 is configured as under the control of the reset signal from reseting signal line RESET, using reset signal to
The first end of two node N2 and light-emitting component 110 is resetted.
Fig. 2 shows the more detailed structures according to the embodiment of the present disclosure of the pixel-driving circuit 100 of Fig. 1.
As shown in Fig. 2, drive sub-circuits 120 include driving transistor Md, the first transistor M1 and storage capacitance Cst.
The control electrode of transistor Md is driven to be electrically connected second node N2,130 electricity of the first pole and the first light emitting control sub-circuit
It is connected to first node N1, the second pole and the second light emitting control sub-circuit 140 are electrically connected to third node N3.
The control electrode of the first transistor M1 receives gate drive signal GATE, and the first pole is electrically connected third node N3, and second
Pole is electrically connected second node N2.
For the first end electrical connection first voltage signal wire V1 of storage capacitance Cst to receive first voltage signal, second is extremely electric
Connect second node N2.
The first transistor M1 and driving transistor Md is different types of transistor.Specifically, in the present exemplary embodiment
In, to drive transistor Md to be described as P-type transistor, therefore, the first transistor M1 is illustratively N-type transistor.
First light emitting control sub-circuit 130 includes second transistor M2, and the second light emitting control sub-circuit 140 includes the
Three transistor M3.
Specifically, the control electrode of second transistor M2 is electrically connected LED control signal line EM, the first electricity of the first pole electrical connection
For pressure signal wire V1 to receive first voltage signal, the second pole is electrically connected first node N1.
The control electrode of third transistor M3 is electrically connected LED control signal line EM, and the first pole is electrically connected third node N3, the
Two poles are electrically connected the first end of light-emitting component 110,
Second transistor M2 and third transistor M3 and driving transistor Md is the transistor of same type.It is exemplary at this
In embodiment, second transistor M2 and third transistor M3 are P-type transistors.
Drive control sub-circuit 150 includes the 4th transistor M4.
The control electrode of 4th transistor M4 is electrically connected grid drive signal line GATE, and the first pole is electrically connected data signal line
For DATA to receive data-signal, the second pole is electrically connected second node N2.
4th transistor M4 and driving transistor Md is different types of transistor.In the present example embodiment, the 4th
Transistor M4 is N-type transistor.
Reset subcircuit 160 includes the 5th transistor M5 and the 6th transistor M6.
The control electrode of 5th transistor M5 and first is extremely electrically connected to reseting signal line RESET, the electrical connection of the second pole jointly
To second node N2.
The control electrode of 6th transistor M6 and first is extremely electrically connected to reseting signal line RESET, the electrical connection of the second pole jointly
To the first end of light-emitting component 110.
5th transistor M5 and the 6th transistor M6 and driving transistor Md is the transistor of same type.It is exemplary at this
In embodiment, the 5th transistor M5 and the 6th transistor M6 are P-type transistors.
Fig. 3 A shows the signal timing diagram of the pixel-driving circuit 100 of Fig. 2.
Specifically, referring to Fig. 3 A, in the first stage during T1, the luminous control with the first level (i.e. high level VH) is provided
Signal (referring to EM) processed, and the reset signal (referring to RESET) and gate driving with second electrical level (i.e. low level VL) are provided
Signal (referring to GATE).
As a result, in the first stage during T1, under the control of LED control signal, second transistor M2 and third transistor
M3 cut-off；Under the control of gate drive signal, the first transistor M1 and the 4th transistor M4 cut-off；In the control of reset signal
Under, the 5th transistor M5 and the 6th transistor M6 conducting.The schematic illustration of pixel-driving circuit 100 is as shown in Figure 3B at this time,
It should be noted that the transistor that this stage ends is marked by Saint Andrew's cross "×" in Fig. 3 B.
In the case where the 5th transistor M5 conducting, low level reset signal is transferred to second node N2, in the 6th crystalline substance
In the case that body pipe M6 is connected, low level reset signal is transferred to the first end of light-emitting component 110.To low level multiple
Position signal makes the control electrode for driving transistor Md become low level, this will be so that driving transistor Md conducting.Also, shine member
The anode of part 110 also becomes low level.To drive the anode of transistor Md and light-emitting component 110 to be resetted by low level.Cause
This, first stage T1 is also referred to as " reseting stage ".
During second stage T2, LED control signal and gate driving with the first level (i.e. high level VH) are provided
Signal provides the reset signal with reference level, and provides the data-signal (referring to DATA) with the first level.It is described
Reference level is similarly high level REF in the embodiment that driving transistor is P-type transistor.In some embodiments, high electricity
Flat REF is equal to high level VH and drives the threshold voltage of transistor (here, it is believed that the threshold voltage vt h of N-type transistor is positive
The sum of value, the threshold voltage of P-type transistor are negative value).
As a result, during second stage T2, under the control of LED control signal, second transistor M2 and third transistor
M3 cut-off；Under the control of gate drive signal, the first transistor M1 and the 4th transistor M4 conducting；In the control of reset signal
Under, the 5th transistor M5 and the 6th transistor M6 cut-off.The schematic illustration of pixel-driving circuit 100 is as shown in Figure 3 C at this time,
It should be noted that the transistor that this stage ends is marked by Saint Andrew's cross "×" in Fig. 3 C.
In the case where the 4th transistor M4 conducting, the data signal transmission of high level to first node N1.Due to upper
It drives transistor Md in the conductive state in one stage, drives transistor Md still on state at this time, thus high level
Data-signal continues to be transferred to third node N3.In the case where the first transistor M1 conducting, the data-signal (voltage of high level
Vdata) continue to be transferred to second node N2 to charge in low level second node N2.With the electricity of second node N2
Pressure constantly rises, and the gate source voltage Vgs of driving transistor Md is gradually increased from VL-Vdata, until Vgs=Vth, wherein
Vth is the threshold voltage for driving transistor Md.At this point, driving transistor Md be no longer turned on, be simultaneously stopped to second node N2 into
Row charging.At this point, the voltage of (i.e. the control electrode of Md) is Vg=Vgs+Vs=Vdata+Vth at second node N2.Data voltage
Vdata has been written into second node N2.Therefore, this second stage T2 is referred to as " data voltage write phase ".Some
In embodiment, Vdata can have the first level (i.e. high level VH).
During phase III T3, the reset signal with reference level (i.e. high level REF) is provided, and offer has
The LED control signal and gate drive signal of second electrical level (i.e. low level VL).
As a result, during phase III T3, under the control of LED control signal, second transistor M2 and third transistor
M3 conducting；Under the control of gate drive signal, the first transistor M1 and the 4th transistor M4 cut-off；In the control of reset signal
Under, the 5th transistor M5 and the 6th transistor M6 cut-off.The schematic illustration of pixel-driving circuit 100 is as shown in Figure 3D at this time,
It should be noted that the transistor that this stage ends is marked by Saint Andrew's cross "×" in Fig. 3 D.
In the case where second transistor M2 conducting, first voltage V1 (i.e. ELVDD) is transferred to first node N1, that is, drives
The source voltage Vs=ELVDD of transistor Md.At this point, since the first transistor M1 and the 5th transistor M5 end, the second section
Point N2 is at floating state, and voltage remains Vdata+Vth, that is, drives the control pole tension Vg=Vdata+ of transistor Md
Vth, thus, Vgs=Vdata+Vth-ELVDD is less than Vth, so that driving transistor Md conducting.It is led in third transistor M3
In the case where logical, the driving current Id that driving transistor Md is generated is applied to the anode of luminescence unit 110, and drives luminescence unit
It shines.Therefore, phase III T3 is also referred to as " light emitting phase ".
Specifically, the expression formula of driving current Id are as follows:
Id=K (Vgs-Vth)2
=K (Vdata+Vth-ELVDD-Vth)2
=K (ELVDD-Vdata)2
Wherein, K is the current constant for being associated with driving transistor Md, the technological parameter and dimensioning with driving transistor Md
It is very little related.By above formula it is found that for driving light-emitting component 110 to carry out luminous driving current Id and driving transistor Md
Threshold voltage vt h is unrelated.
In above-described embodiment of the disclosure, pixel-driving circuit is mended in the threshold voltage to driving transistor Md
The driving to light-emitting component is realized on the basis of repaying.It will be noted that being connected solely to grid in the pixel-driving circuit of the disclosure
Pole drive signal line GATE, LED control signal line EM, reseting signal line RESET and data signal line DATA, do not need picture
Equally each pixel-driving circuit is electrically connected with initial signal line Vint in the pixel-driving circuit of the relevant technologies.Therefore, root
Wiring space can be saved according to the pixel-driving circuit of the embodiment of the present disclosure, more compact circuit layout is realized, is more advantageous to
The realization of high PPI.
In addition, from the foregoing, it can be understood that during data voltage write phase T2 and light emitting phase T3, the of the 5th transistor M5
One pole receives the reference level with high level REF.In some embodiments, high level REF is equal to high level VH and driving is brilliant
The sum of the threshold voltage vt h, i.e. REF=VH+Vth of body pipe Md.In some embodiments, in data voltage write phase T2 and hair
During photophase T3, the voltage of the second pole (i.e. second node N2) of the 5th transistor M5 is Vdata+Vth=VH+Vth.From
And in this embodiment, when the 5th transistor M5 leaks electricity, can't discharge second node N2, so as to
Enough electric leakage of the grid for inhibiting driving transistor Md.Had compared with the relevant technologies according to the pixel-driving circuit of the embodiment of the present disclosure
Apparent advantage.
Fig. 4 shows the schematic block diagram of the display panel 400 according to the embodiment of the present disclosure.As shown in figure 4, display panel
400 may include multi-strip scanning line SL；Multiple data lines DL, it is arranged in a crossed manner in length and breadth with the multi-strip scanning signal wire SL；And
The infall of each scan signal line and each data signal line is arranged in multiple pixel units 410 with a matrix type, and
It is electrically connected with corresponding data line DL and scan line SL.It is provided in each of the multiple pixel unit 410 according to this
The pixel-driving circuit of open embodiment, such as according to pixel-driving circuit 100 shown in fig. 1 or fig. 2.
Specifically, the data signal line that pixel-driving circuit 100 is electrically connected by pixel unit 410 respective data lines DL
It serves as, the gate drive signal line that pixel-driving circuit 100 is electrically connected is served as by the correspondence scan line SL of pixel unit 410.
In some embodiments, the display panel 400 may also include a plurality of light emitting control line EL, a plurality of luminous control
Arrangement line EL processed parallel with the multi-strip scanning line SL or the multiple data lines DL, and with the multi-strip scanning line SL or institute
It states multiple data lines DL and is electrically connected respectively to identical pixel unit 410,
Specifically, the LED control signal line that pixel-driving circuit 100 is electrically connected is shone by the correspondence of pixel unit 410
Control line EL is served as.
In some embodiments, pixel-driving circuit 100 received reset signal scanned by the corresponding of pixel unit 410
The preceding scan line SL according to scanning sequency of line SL is provided.
In some embodiments, display panel 400 further includes multiple phase inverters.The multiple phase inverter respectively with it is described more
A scan line SL is electrically connected correspondingly.
Fig. 5 shows the schematic configuration diagram of phase inverter 500.
As shown in figure 5, the input terminal of phase inverter 500 is electrically connected with (corresponding) scan line SL, the output end of phase inverter 500
It is electrically connected with the reset line RST of the scan line SL pixel unit 410 driven.Pixel-driving circuit 100 in pixel unit 410
The reseting signal line RESET being electrically connected is served as by the reset line RST.
Phase inverter 500 is also connected electrically to reset level end VINIT and reference level end VREF.Phase inverter 500 is configured as
Under the control of the gate drive signal from scan line SL future Self-resetting level terminal VINIT reset level or carry out self-reference
The reference level of level terminal VREF is provided to reset line RST.
In some embodiments, reset level be with the corresponding level of the driving significant level of transistor Md (for example,
Low level VL in above-described embodiment), reference level REF is equal to the inactive level of driving transistor Md and drives transistor Md's
The sum of threshold voltage vt h (for example, REF=VH+Vth in the above-described embodiments).
Fig. 6 shows the more detailed circuit diagram of phase inverter 500.
Phase inverter 500 includes the first inverted transistors Mi1 and the second inverted transistors Mi2.First inverted transistors Mi1's
Control electrode is electrically connected to scan line SL, and the first pole is electrically connected to reset level end VINIT, and the second pole is electrically connected to reset line RST.
The control electrode of second inverted transistors Mi2 is electrically connected to scan line SL, and the second pole is electrically connected to reference level end VREF, the second pole
It is electrically connected to reset line RST.First inverted transistors Mi1 and the second inverted transistors Mi2 is different types of transistor.Example
Such as, as shown in fig. 6, the first inverted transistors Mi1 is N-type transistor, the second inverted transistors Mi2 is P-type transistor.
It, can be on the basis of the gate drive signal from scan line by the exemplary circuit of phase inverter shown in fig. 6
Obtain required reset signal in pixel-driving circuit, the phase of gate drive signal and reset signal can refer to shown in Fig. 3 A
Timing diagram.
Fig. 7 shows the flow chart of the driving method 700 according to the pixel-driving circuit of the embodiment of the present disclosure.The driving
Method 700 can be used for driving according to pixel-driving circuit 100 shown in fig. 1 or fig. 2.
As shown in fig. 7, in the first period, providing the LED control signal with the first level in step S710, providing
Gate drive signal and reset signal with second electrical level, and the data-signal with second electrical level is provided.
In step S720, in the second period, LED control signal and gate drive signal with the first level are provided,
The reset signal for having reference level is provided, and the data-signal with the first level is provided.
In step S730, in the third period, the reset signal with reference level is provided, is provided with second electrical level
LED control signal, gate drive signal, and the data-signal with second electrical level is provided.
Wherein, the first level is level corresponding with the driving inactive level of transistor, and second electrical level is brilliant with driving
The corresponding level of the significant level of body pipe.
A in some embodiments, reference level is equal to the first level and drives the sum of the threshold voltage of transistor.
The driving process of the method 700 in different embodiments is described above in conjunction with Fig. 2, herein no longer
It repeats.
Above detailed description has elaborated numerous embodiments by using schematic diagram, flow chart and/or example.?
In the case that this schematic diagram, flow chart and/or example include one or more functions and/or operation, those skilled in the art
It should be understood that each function and/or operation in this schematic diagram, flow chart or example can be by various structures, hardware, soft
Part, firmware or substantially their any combination is come individually and/or common realized.
Although exemplary embodiment describes the disclosure with reference to several, it is to be understood that, term used is explanation and shows
Example property, term and not restrictive.Since the disclosure can be embodied in a variety of forms without departing from disclosed spiritual or real
Matter, it should therefore be appreciated that above-described embodiment is not limited to any of the foregoing details, and the spirit defined by appended claims
It all should be accompanying power with the whole change and modification widely explained, therefore fallen into claim or its equivalent scope in range
Benefit requires to be covered.
Claims (12)
1. a kind of pixel-driving circuit, comprising:
Light-emitting component；
Drive sub-circuits are electrically connected to first node, second node and third node, are configured as the voltage in second node
The path between first node and third node is connected under control, and makes to generate in the path for making light-emitting component shine
Electric current；
First light emitting control sub-circuit and the second light emitting control sub-circuit, the first light emitting control sub-circuit are electrically connected to luminous
Control signal wire, first voltage signal wire and the first node, the second light emitting control sub-circuit are electrically connected to the hair
The first end of optical control signal line, the third node and light-emitting component, the first light emitting control sub-circuit and described second
Light emitting control sub-circuit is configured as under the control of the LED control signal from the LED control signal line, by the use
The first end of the light-emitting component is transmitted in the electric current for keeping light-emitting component luminous；
Drive control sub-circuit is electrically connected to gate drive signal line, data signal line and the first node, is configured as
Under the control of gate drive signal from the gate drive signal line, the data-signal from the data signal line is mentioned
It is supplied to the first node；
Reset subcircuit is electrically connected to the first end of reseting signal line, the second node and the light-emitting component, is configured as
Under the control of the reset signal from the reseting signal line, using the reset signal to the second node and the hair
The first end of optical element is resetted.
2. pixel-driving circuit according to claim 1, wherein the drive sub-circuits include driving transistor, first
Transistor and storage capacitance, wherein
The control electrode of the driving transistor is electrically connected to the second node, and the first pole is electrically connected to the first node, the
Two poles are electrically connected to the third node；
The control electrode of the first transistor is electrically connected to the gate drive signal line, and the first pole is electrically connected to the third section
Point, the second pole are electrically connected to the second node；And
The first end of the storage capacitance is electrically connected to the first voltage signal wire, and second end is electrically connected to second section
Point,
Wherein, the first transistor and the driving transistor are different types of transistors.
3. pixel-driving circuit according to claim 2, wherein the first light emitting control sub-circuit includes the second crystal
Pipe, the second light emitting control sub-circuit includes third transistor, wherein
The control electrode of the second transistor is electrically connected to the LED control signal line, and the first pole is electrically connected to first electricity
Signal wire is pressed, the second pole is electrically connected to the first node；
The control electrode of the third transistor is electrically connected to the LED control signal line, and the first pole is electrically connected to the third section
Point, the second pole are electrically connected to the first end of the light-emitting component,
Wherein, the second transistor and the third transistor and the driving transistor are the transistors of same type.
4. pixel-driving circuit according to claim 3, wherein the drive control sub-circuit includes the 4th transistor,
Wherein
The control electrode of 4th transistor is electrically connected to the gate drive signal line, and the first pole is electrically connected to the data letter
Number line, the second pole are electrically connected to the second node,
Wherein, the 4th transistor and the driving transistor are different types of transistors.
5. pixel-driving circuit according to claim 4, wherein the reset subcircuit includes the 5th transistor and the 6th
Transistor, wherein
The control electrode of 5th transistor and first is extremely electrically connected to the reseting signal line jointly, and the second pole is electrically connected to institute
Second node is stated,
The control electrode of 6th transistor and first is extremely electrically connected to the reseting signal line jointly, and the second pole is electrically connected to institute
The first end of light-emitting component is stated,
Wherein, the 5th transistor and the 6th transistor and the driving transistor are the transistors of same type.
6. a kind of display panel, comprising:
Multi-strip scanning line；
Multiple data lines, it is arranged in a crossed manner with the multi-strip scanning line；And
Multiple pixel units, are arranged in each data line and each scan line infall with a matrix type, and with corresponding number
It being electrically connected according to line and scan line, each pixel unit includes pixel-driving circuit according to any one of claims 1-5,
Wherein, the data signal line that the pixel-driving circuit is electrically connected is served as by the respective data lines of the pixel unit,
The gate drive signal line that the pixel-driving circuit is electrically connected is served as by the correspondence scan line of the pixel unit.
7. display panel according to claim 6 further includes a plurality of light emitting control line, a plurality of light emitting control line and institute
Multi-strip scanning line or the parallel arrangement of the multiple data lines are stated, and is distinguished with the multi-strip scanning line or the multiple data lines
It is electrically connected to identical pixel unit,
Wherein, the LED control signal line that the pixel-driving circuit is electrically connected by the pixel unit correspondence light emitting control
Line charge is worked as.
8. display panel according to claim 6, wherein the display panel further includes multiple phase inverters, respectively with institute
Multiple scan lines are stated to be electrically connected correspondingly, wherein
The input terminal of the phase inverter is electrically connected with corresponding scan line, the output end of the phase inverter and corresponding scan line institute
The reset line of the pixel unit of driving is electrically connected, wherein the reset that the pixel-driving circuit in the pixel unit is electrically connected
Signal wire is served as by the reset line,
The phase inverter is also connected electrically to reset level end and reference level end, and the phase inverter is configured as sweeping from described
It retouches under the control of the gate drive signal of line by the reset level from the reset level end or from the reference level end
Reference level provide to the reset line.
9. display panel according to claim 8, wherein the phase inverter includes the first inverted transistors and the second reverse phase
Transistor, wherein
The control electrode of first inverted transistors is electrically connected to the scan line, and the first pole is electrically connected to the reset level
End, the second pole are electrically connected to the reset line,
The control electrode of second inverted transistors is electrically connected to the scan line, and the second pole is electrically connected to the reference level
End, the second pole are electrically connected to the reset line,
Wherein, first inverted transistors and second inverted transistors are different types of transistors.
10. display panel according to claim 8, wherein the reset level is the significant level with driving transistor
Corresponding level, the reference level are equal to the inactive level of the driving transistor and the threshold value electricity of the driving transistor
The sum of pressure.
11. a kind of method driven to pixel-driving circuit described according to claim 1 any one of -5, comprising:
In the first period, the LED control signal with the first level is provided, the gate drive signal with second electrical level is provided
And reset signal, and the data-signal with second electrical level is provided；
In the second period, LED control signal and gate drive signal with the first level are provided, provided with reference level
Reset signal, and provide have the first level data-signal；
In the third period, the reset signal with reference level is provided, LED control signal, grid with second electrical level are provided
Driving signal, and the data-signal with second electrical level is provided,
Wherein, first level is level corresponding with the driving inactive level of transistor, and the second electrical level is and drive
The corresponding level of significant level of dynamic transistor.
12. according to the method for claim 11, wherein the reference level is equal to first level and the driving is brilliant
The sum of the threshold voltage of body pipe.
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| CN201910247440.XA CN109859686B (en) | 2019-03-29 | 2019-03-29 | Pixel driving circuit, driving method thereof and display panel |
| PCT/CN2020/075797 WO2020199774A1 (en) | 2019-03-29 | 2020-02-19 | Pixel driving circuit and driving method therefor, and display panel |
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| CN201910247440.XA CN109859686B (en) | 2019-03-29 | 2019-03-29 | Pixel driving circuit, driving method thereof and display panel |
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| WO2020199774A1 (en) * | 2019-03-29 | 2020-10-08 | 京东方科技集团股份有限公司 | Pixel driving circuit and driving method therefor, and display panel |
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