CN109830530A - IGBT structure - Google Patents
IGBT structure Download PDFInfo
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- CN109830530A CN109830530A CN201910014517.9A CN201910014517A CN109830530A CN 109830530 A CN109830530 A CN 109830530A CN 201910014517 A CN201910014517 A CN 201910014517A CN 109830530 A CN109830530 A CN 109830530A
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- groove
- igbt structure
- igbt
- drift region
- buffer layer
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Abstract
The invention discloses a kind of IGBT structures, including being formed with buffer layer on collector, drift region is formed on buffer layer, body area is formed on drift region, the first groove and second groove being intervally arranged side by side are arranged in drift region and body area, emitter is formed in body area on the left of first groove and on the right side of second groove, inter-level dielectric is arranged in the metal electrode in first groove and second groove, first groove and second groove inner wall are formed with gate oxide, polysilicon gate is formed on the gate oxide of first groove inner left wall, rest part is formed with grid collector capacitance medium in first groove, polysilicon gate is formed on the gate oxide of inner wall on the right side of second groove, rest part is formed with grid collector capacitance medium in second groove.The low miller capacitance of IGBT structure can drop in the present invention compared with prior art.
Description
Technical field
The present invention relates to semiconductor field, especially a kind of IGBT structure.
Background technique
Insulated gate bipolar transistor (Insulate-Gate Bipolar Transistor-IGBT) combines electric power crystalline substance
Body pipe (Giant Transistor-GTR) and the advantages of electric power field effect transistor (Power MOSFET), has good
Characteristic, application field are very extensive；IGBT is also three terminal device: grid, collector and emitter.
IGBT (InsulatedGateBipolarTransistor) is MOS structure bipolar device, is belonged to power
The power device of the high speed performance of MOSFET and bipolar low resistive energy.The application range of IGBT generally all pressure-resistant 600V with
Upper, electric current 10A or more, frequency are the region of 1kHz or more.It uses in industrial motor, civilian small-capacity motor, converter more
The fields such as (inverter), the stroboscope of camera, induction heating (InductionHeating) electric cooker.IGBT is forceful electric power
The natural evolution of stream, high-voltage applications and fast terminal equipment vertical power MOSFET.MOSFET is higher due to realization one
Breakdown voltage BVDSS needs a source-drain path, and this channel has very high resistivity, thus causes power MOSFET
With the high feature of RDS (on) numerical value, IGBT eliminates these major defects of existing power MOSFET.Although latest generation function
RDS (on) characteristic has been greatly improved in rate MOSFET element, but in high level, conducting power is lost still than IGBT high
It is many out.
IGBT after decades of development, is being widely used in various switch application occasions.Trench gate (trench
Gate) and the compromise that (Field Stop) significantly improves break-over of device pressure drop (Von) and turn-off power loss (Eoff) is ended in field
Characteristic, IGBT be further improved optimization method first is that reduce miller capacitance, and then increase device dV/dt.
Summary of the invention
The technical problem to be solved in the present invention is to provide the IGBT knots that one kind can reduce miller capacitance compared with prior art
Structure.
In order to solve the above technical problems, being formed with buffer layer 8 in IGBT structure provided by the invention, including collector 9, delay
It rushes on layer 8 and is formed with drift region 7, body area 6 is formed on drift region 7, the first groove and second groove being intervally arranged side by side are set
It sets in drift region 7 and body area 6, is formed with emitter 5, interlayer in the area PXing Ti 6 on the left of first groove and on the right side of second groove
Medium 3 is arranged in the metal electrode 4 in first groove and second groove；Wherein, first groove and second groove inner wall are formed
There is gate oxide 2, polysilicon gate 1 is formed on the gate oxide 2 of first groove inner left wall, rest part shape in first groove
At there is grid collector capacitance medium 10, polysilicon gate 1, the second ditch are formed on the gate oxide 2 of inner wall on the right side of second groove
Rest part is formed with grid collector capacitance medium 10 in slot.
It is further improved the IGBT structure, the inter-level dielectric 3 is integral structure, is covered on first groove, the
In body area 6 between two grooves and first groove and second groove.
It is further improved the IGBT structure, the inter-level dielectric 3 is a separate structure, is respectively overlay in first groove
In second groove.
It is further improved the IGBT structure, the grid collector capacitance medium 10 is in first groove and second groove
Interior formation hollow structure.
It is further improved the IGBT structure, the grid collector capacitance medium 10 is the material of dielectric constant 1-4.
It is further improved the IGBT structure, the grid collector capacitance medium 10 is air.
It is further improved the IGBT structure, the emitter 5 is N-type heavily doped region.
It is further improved the IGBT structure, the body area 6 is the area PXing Ti.
It is further improved the IGBT structure, the drift region 7 is N-type lightly doped district.
It is further improved the IGBT structure, the buffer layer 8 is N-type buffer layer.
The present invention is by the introducing grid collector capacitance medium in trench gate, for example uses the air-gap of filling air,
Realize the purpose for reducing miller capacitance (Cgd).Since the relative dielectric constant of air is approximately 1, traditional structure uses titanium dioxide
The capacitor of silicon or other low K media all compares using the big of air-gap, therefore the present invention can utmostly reduce miller capacitance
(Cgd), switching loss is reduced.
Detailed description of the invention
Present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments:
Fig. 1 is the existing IGBT structure schematic diagram one to reduce miller capacitance design.
Fig. 2 is the existing IGBT structure schematic diagram two to reduce miller capacitance design.
Fig. 3 is the existing IGBT structure schematic diagram three to reduce miller capacitance design.
Fig. 4 is the existing IGBT structure schematic diagram four to reduce miller capacitance design.
Fig. 5 is the existing IGBT structure schematic diagram five to reduce miller capacitance design.
Fig. 6 is the existing IGBT structure schematic diagram six to reduce miller capacitance design.
Fig. 7 is first embodiment of the invention structural schematic diagram.
Fig. 8 is second embodiment of the invention structural schematic diagram.
Description of symbols
1 is polysilicon gate
1 ' is polysilicon emitter
2 be gate oxide
3 be inter-level dielectric
4 be metal electrode
5 be N+ emitter
6 be P body area
7 be the drift region N-
8 be N buffer layer
9 be P collector
10 be air-gap.
Specific embodiment
As shown in fig. 7, the present invention provides IGBT first embodiment, comprising:
It is formed with buffer layer 8 on collector 9, is formed on 7 drift region 7 of N-type lightly doped drift zone and is formed on buffer layer 8
Body area 6, the first groove being intervally arranged side by side and second groove are arranged in drift region 7 and body area 6, on the left of first groove and the
Emitter 5 is formed in body area 6 on the right side of two grooves, the electricity of the metal in first groove and second groove is arranged in inter-level dielectric 3
In pole 4, first groove and second groove inner wall are formed with gate oxide 2, are formed on the gate oxide 2 of first groove inner left wall
There is polysilicon gate 1, rest part is formed with grid collector capacitance medium 10 in first groove, the grid of inner wall on the right side of second groove
Polysilicon gate 1 is formed in oxide layer 2, rest part is formed with grid collector capacitance medium 10 in second groove.
Dielectric constant can be used for material of 1-4, such as air, nitrogen etc. in grid collector capacitance medium.
Wherein, the inter-level dielectric 3 is integral structure, be covered on first groove, second groove and first groove and
In body area 6 between second groove.
The emitter 5 is N-type heavily doped region.
The body area 6 is the area PXing Ti.
The drift region 7 is N-type lightly doped district.
The buffer layer 8 is N-type buffer layer.
Above-mentioned first embodiment uses air as grid collection by introducing grid collector capacitance medium in trench gate
Electrode capacitance medium forms air-gap and realizes the purpose for reducing miller capacitance (Cgd).Since the relative dielectric constant of air is approximate
It is 1, traditional structure is all compared using the capacitor of silica or other low K media using the big of air-gap, therefore the present invention
First embodiment can utmostly reduce miller capacitance (Cgd), reduce switching loss.
As shown in figure 8, the present invention provides IGBT second embodiment, comprising:
It is formed with buffer layer 8 on collector 9, drift region 7 is formed on buffer layer 8, body area 6 is formed on drift region 7, and
It arranges the first groove being intervally arranged and second groove is arranged in drift region 7 and body area 6, on the left of first groove and second groove is right
Emitter 5 is formed in the area Ce Ti 6, inter-level dielectric 3 is arranged in the metal electrode 4 in first groove and second groove, the
One groove and second groove inner wall are formed with gate oxide 2, are formed with polysilicon on the gate oxide 2 of first groove inner left wall
Grid 1, rest part is formed with grid collector capacitance medium 10 in first groove, the gate oxide 2 of inner wall on the right side of second groove
On be formed with polysilicon gate 1, rest part is formed with grid collector capacitance medium 10 in second groove.
Dielectric constant can be used for material of 1-4, such as air, nitrogen etc. in grid collector capacitance medium.
Wherein, the inter-level dielectric 3 is a separate structure, is respectively overlay in first groove and second groove.
The emitter 5 is N-type heavily doped region.
The body area 6 is the area PXing Ti.
The drift region 7 is N-type lightly doped district.
The buffer layer 8 is N-type buffer layer.
Above-mentioned second embodiment is employed nitrogen as by introducing grid collector capacitance medium in trench gate as grid collection
Electrode capacitance medium forms nitrogen gap and realizes the purpose for reducing miller capacitance (Cgd).Since the relative dielectric constant of nitrogen is approximate
It is 1, traditional structure is all compared using the capacitor of silica or other low K media using the big of air-gap, therefore the present invention
Second embodiment can utmostly reduce miller capacitance (Cgd), reduce switching loss.
The present invention provides IGBT 3rd embodiment, comprising:
It is formed with buffer layer 8 on collector 9, is formed on 7 drift region 7 of N-type lightly doped drift zone and is formed on buffer layer 8
Body area 6, the first groove being intervally arranged side by side and second groove are arranged in drift region 7 and body area 6, on the left of first groove and the
Emitter 5 is formed in body area 6 on the right side of two grooves, the electricity of the metal in first groove and second groove is arranged in inter-level dielectric 3
In pole 4, first groove and second groove inner wall are formed with gate oxide 2, are formed on the gate oxide 2 of first groove inner left wall
There is polysilicon gate 1, rest part is formed with grid collector capacitance medium 10 in first groove, the grid of inner wall on the right side of second groove
Polysilicon gate 1 is formed in oxide layer 2, rest part is formed with grid collector capacitance medium 10 in second groove.
The emitter 5 is N-type heavily doped region.
The body area 6 is the area PXing Ti.
The drift region 7 is N-type lightly doped district.
The buffer layer 8 is N-type buffer layer.
Wherein, the inter-level dielectric 3 is integral structure, be covered on first groove, second groove and first groove and
In body area 6 between second groove.
Or, the inter-level dielectric 3 is a separate structure, it is respectively overlay in first groove and second groove.
Above-mentioned 3rd embodiment in trench gate by introducing grid collector capacitance medium, using vacuum as grid collection
The purpose for reducing miller capacitance (Cgd) is realized in electrode capacitance medium, the space for forming a vacuum.Due to the opposite dielectric of vacuum
Constant is approximately 1, and traditional structure is all compared using the capacitor of silica or other low K media using the big of air-gap, because
This third embodiment of the invention can utmostly reduce miller capacitance (Cgd), reduce switching loss.
Above by specific embodiment and embodiment, invention is explained in detail, but these are not composition pair
Limitation of the invention.Without departing from the principles of the present invention, those skilled in the art can also make many deformations and change
Into these also should be regarded as protection scope of the present invention.
Claims (10)
1. being formed with buffer layer (8) in a kind of IGBT structure, including collector (9), drift region (7) are formed on buffer layer (8),
It is formed on drift region (7) body area (6), the first groove being intervally arranged side by side and second groove are arranged in drift region (7) and body
It in area (6), is formed with emitter (5) in the body area (6) on the left of first groove and on the right side of second groove, inter-level dielectric (3) setting
In metal electrode (4) in first groove and second groove, it is characterised in that: first groove and second groove inner wall are formed with
Gate oxide (2) is formed with polysilicon gate (1) on the gate oxide (2) of first groove inner left wall, its remaining part in first groove
Divide and be formed with grid collector capacitance medium (10), is formed with polysilicon gate on the gate oxide (2) of inner wall on the right side of second groove
(1), rest part is formed with grid collector capacitance medium (10) in second groove.
2. IGBT structure as described in claim 1, it is characterised in that: the inter-level dielectric (3) is integral structure, is covered on
In body area (6) between first groove, second groove and first groove and second groove.
3. IGBT structure as described in claim 1, it is characterised in that: the inter-level dielectric (3) is a separate structure, is covered respectively
It covers in first groove and second groove.
4. IGBT structure as described in claim 1, it is characterised in that: the grid collector capacitance medium (10) is in the first ditch
Hollow structure is formed in slot and second groove.
5. IGBT structure as described in claim 1, it is characterised in that: the grid collector capacitance medium (10) is that dielectric is normal
Number is the material of 1-4.
6. IGBT structure as described in claim 1, it is characterised in that: the grid collector capacitance medium (10) is air.
7. IGBT structure as described in claim 1, it is characterised in that: the emitter (5) is N-type heavily doped region.
8. IGBT structure as described in claim 1, it is characterised in that: the body area (6) is the area PXing Ti.
9. IGBT structure as described in claim 1, it is characterised in that: the drift region (7) is N-type lightly doped district.
10. IGBT structure as described in claim 1, it is characterised in that: the buffer layer (8) is N-type buffer layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910014517.9A CN109830530B (en) | 2019-01-08 | 2019-01-08 | IGBT structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910014517.9A CN109830530B (en) | 2019-01-08 | 2019-01-08 | IGBT structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109830530A true CN109830530A (en) | 2019-05-31 |
| CN109830530B CN109830530B (en) | 2022-06-21 |
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| CN201910014517.9A Active CN109830530B (en) | 2019-01-08 | 2019-01-08 | IGBT structure |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115207108A (en) * | 2022-09-14 | 2022-10-18 | 淄博美林电子有限公司 | Low miller capacitance IGBT and manufacturing method thereof |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1585096A (en) * | 2003-08-18 | 2005-02-23 | 因芬尼昂技术股份公司 | Groove capacitor and its manufacture |
| US20060091453A1 (en) * | 2004-08-26 | 2006-05-04 | Kabushiki Kaisha Toshiba | Trench MIS device and method for manufacturing trench MIS device |
| US20130043490A1 (en) * | 2011-06-28 | 2013-02-21 | Panasonic Corporation | Semiconductor device and method for fabricating the device |
-
2019
- 2019-01-08 CN CN201910014517.9A patent/CN109830530B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1585096A (en) * | 2003-08-18 | 2005-02-23 | 因芬尼昂技术股份公司 | Groove capacitor and its manufacture |
| US20050079679A1 (en) * | 2003-08-18 | 2005-04-14 | Infineon Technologies Ag | Trench capacitor and method for fabricating a trench capacitor |
| US20060091453A1 (en) * | 2004-08-26 | 2006-05-04 | Kabushiki Kaisha Toshiba | Trench MIS device and method for manufacturing trench MIS device |
| US20130043490A1 (en) * | 2011-06-28 | 2013-02-21 | Panasonic Corporation | Semiconductor device and method for fabricating the device |
| CN102959711A (en) * | 2011-06-28 | 2013-03-06 | 松下电器产业株式会社 | Semiconductor device and method for manufacturing same |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115207108A (en) * | 2022-09-14 | 2022-10-18 | 淄博美林电子有限公司 | Low miller capacitance IGBT and manufacturing method thereof |
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| CN109830530B (en) | 2022-06-21 |
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