CN109801589A - 微led的脉宽调制控制 - Google Patents

微led的脉宽调制控制 Download PDF

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CN109801589A
CN109801589A CN201811354005.9A CN201811354005A CN109801589A CN 109801589 A CN109801589 A CN 109801589A CN 201811354005 A CN201811354005 A CN 201811354005A CN 109801589 A CN109801589 A CN 109801589A
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mled
memory
signal
output
pulse signal
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杰雷斯·约翰·瓦伦丁
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Meta Platforms Technologies LLC
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Facebook Technologies LLC
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Abstract

本发明公开了微LED的脉宽调制控制。实施方式涉及包括mLED和控制器的微发光二极管(mLED)单元。控制器接收亮度数据信号并且生成与亮度数据信号对应的驱动信号。控制器耦接至mLED用于提供驱动信号，该驱动信号在循环的持续时间内第一次导通mLED和第二次关闭mLED。驱动信号导致在mLED导通时mLED中的电流密度高于阈值。

Description

微LED的脉宽调制控制
技术领域
本公开内容涉及控制微发光二极管(mLED)的亮度，且更具体地涉及使用数字脉宽调制(PWM)控制方案用于控制mLED的亮度。
背景技术
微发光二极管(mLED)显示器是包括用于显示图像的微观发光二极管(LED)的新兴的平板显示技术。相比较于液晶显示器(LCD)技术，mLED显示设备提供改善的对比度、更快的响应时间及较低的能耗。
mLED是响应于提供至二极管的正向偏置电流产生光的自发光元件。mLED发出的光的量随着供应至mLED的电流的量增加而增加。在一些实现过程中，使用压控电流源驱动mLED，该压控电流源生成随着电压信号的电压电平的增加而增加的驱动电流。电压信号进而可基于指定mLED的期望亮度的数据信号生成。
发明内容
实施方式涉及包括mLED和控制器的微发光二极管(mLED)单元。控制器接收亮度数据信号并且生成与亮度数据信号对应的驱动信号。控制器耦接至mLED用于提供驱动信号，该驱动信号在循环的持续时间内导通mLED达第一时间和关闭mLED达第二时间。驱动信号导致在mLED导通时mLED中的电流密度高于阈值。
其他实施方式涉及包括控制器、电流源、及mLED的微发光二极管(mLED)单元。控制器生成具有与亮度数据信号成比例的占空比和设定振幅的驱动信号。电流源耦接至控制器的输出端并且基于控制器生成的驱动信号生成驱动电流。驱动电流的平均振幅与亮度数据信号成比例。mLED耦接至电流源并且发出具有与驱动电流成比例的平均亮度的光。
其他实施方式涉及包括存储器、多个与门、电流源、及mLED的mLED单元。存储器包括多个存储单元和多个存储器输出端，每个存储器输出端对应于存储单元的输出端。存储器存储亮度数据值。每个与门耦接至存储器输出端和周期脉冲信号。电流源耦接至与门中的每一个的输出端并且基于与门中的每一个的输出生成驱动电流。mLED耦接至电流源并且发出具有与驱动电流成比例的平均亮度的光。
在一个或多个实施方式中，mLED单元的存储器包括用于亮度数据值的每个比特的一个存储单元。此外，mLED单元包括电路以实现用于亮度数据值的每个比特的一个与门逻辑函数。在这个实施方式中，一个存储单元的输出端耦接至与门的输入端和下一个存储单元的输入端。mLED单元进一步接收多个周期脉冲信号。每个周期脉冲信号耦接至与门的输入端。
附图说明
结合附图，通过考虑下面的详细描述，可以容易地理解实施方式的教导。
图1A示出了图表，该图表示出了针对传统LED和微LED(mLED)的电流密度的内量子效率。
图1B示出以恒定电流驱动LED时的时序图。
图1C示出根据一种实施方式的用于驱动mLED的时序图。
图2A示出根据一种实施方式的mLED显示面板的框图。
图2B示出根据一种实施方式的mLED单元的框图。
图3A示出根据一种实施方式的mLED单元的电路图。
图3B示出根据一种实施方式的图3A的mLED单元的存储器的详图。
图4A示出根据一种实施方式的脉冲信号P1至P4的一个循环的波形的时序图。
图4B示出根据一种实施方式的针对不同数据输入的若干PWM信号的时序图。
图5示出根据一种实施方式的包括多个存储器的mLED单元的电路图。
图6示出根据一种实施方式的用于操作mLED单元的方法的流程图。
具体实施方式
附图及以下描述仅通过示图的方式涉及优选实施方式。应注意，本文中公开的结构和方法的替换实施方式将容易识别为在不偏离实施方式的原理的情况下可以采用的可行替代品。
现在将详细地参考若干实施方式，其实例在附图中示出。应注意，在可行的情况下，类似或相同的参考标号可以在附图中使用并且可以表示类似或相同的功能。附图描述的各种实施方式仅为示例。
实施方式涉及一种通过使用数字脉宽调制(PWM)控制方案在提高mLED效率的同时，控制微发光二极管(mLED或者μLED)的亮度的控制方案。在PWM方案的导通期间，mLED中的电流密度超过阈值电平，该阈值电平与高于阈值效率的内量子效率(IQE)对应。mLED在PWM导通期间的电流密度高于传统宏LED的电流密度。将PWM方案的关断控制为使得mLED的平均亮度达到所希望的水平。
发光二极管(LED)的内量子效率(IQE)作为LED中的电流密度的函数而变化。图1A示出了示出IQE关于传统的宏LED和微LED(mLED)的电流密度的图表。如图1A中所示，与mLED的峰值IQEJ*’相比，传统LED在较低电流密度J*处达到峰值IQE。因而，即使对于低电流密度值，传统LED仍迅速达到高效光产生值。与此相反，mLED在以低电流密度值运行时可能具有低IQE。即，因为mLED的亮度与用于驱动mLED的电流密度成比例，所以与传统的LED相比较，如果以恒定电流驱动，mLED在低亮度值下效率低。
图1B示出以恒定电流驱动LED时的时序图。使用图1B的驱动方案，以与mLED的期望亮度相关的电流J1驱动mLED。然后，以一个循环的持续时间(例如，一秒的六十分之一)将电流J1供应给mLED。因而，用于驱动mLED的电流将基于所希望的亮度而变化。因而，mLED的IQE也将基于mLED的期望亮度而变化。随着mLED亮度下降，mLED中的电流密度进一步从J*’下降，导致mLED的IQE降低。此外，因为mLED被恒定驱动并且因此发射光，所以mLED可能没有时间进行冷却。
图1C示出根据一种实施方式的用于驱动mLED的时序图。使用图1C的驱动方案，以预设电流J2驱动mLED。然后，通过mLED被驱动的时间量控制mLED的感知亮度。即，如果期望较低的亮度，则在一个循环内的较短时间量期间驱动mLED，如果期望较高的亮度，则在一个循环内的较长时间量期间驱动mLED。在图1C的实例中，因为以电流J2驱动mLED长达一半的循环持续时间，所以mLED的感知亮度将是以电流J2驱动mLED时的mLED亮度的一半。因为在驱动mLED的时间段期间，mLED供给有mLED中的电流密度在更接近J*’(参见图1A)的阈值JTH之上的相同的预设电流，所以可以更好地控制mLED的IQE。即，电流J2可以选择为使mLED以更接近J*’的电流密度运行，并且实现更高的IQE。
图2A示出根据一种实施方式的mLED显示面板的框图。mLED显示面板可包括列解码器210、行解码器220、及多个mLED单元230以及其他部件。列解码器210基于列选择信号选择或者断言显示面板的一列mLED单元。在一个实施方式中，通过n比特计数器生成列选择信号。在这个实施方式中，列选择解码器可以是n至2n解码器。
行解码器220基于行选择信号选择或者断言显示面板的一行mLED单元。在一些实施方式中，通过m比特计数器生成行选择信号。在这个实施方式中，行选择解码器可以是m至2m解码器。
多个mLED单元230被布置成网格图案。在一些实施方式中，mLED单元被布置成其他图案，诸如，圆形图案、椭圆形图案。显示面板的每个mLED单元耦接至列解码器210的一个输出端和行解码器220的一个输出端。因而，可以通过断言列解码器210的特定输出端和行解码器220的特定输出端寻址特定mLED单元。例如，通过断言列解码器输出端C1和行解码器输出端R1寻址mLED单元230A，通过断言列解码器输出端C2和行解码器输出端R1寻址mLED单元230B，通过断言列解码器输出端CN和行解码器输出端R1寻址mLED单元230N，等。
为了增加mLED显示面板的效率，以大于阈值的电流密度驱动mLED。在一些实施方式中，阈值是300A/cm2。如果期望低亮度值(例如，视频的暗场景中)，不是以较低的电流密度驱动mLED，而是以较短的时间量驱动mLED，或者利用了使用如上参考图1C描述的PWM方案的较短的发射突发(emission burst)。
图2B示出根据一种实施方式的mLED单元230的框图。mLED单元230包括mLED控制器250、电流源260、及mLED270。mLED控制器250接收数据信号252、列有源信号256、行有源信号258、及时钟254作为输入。mLED控制器250存储在列有源信号256和行有源信号258均被断言时与时钟254同步的数据信号252。在一些实施方式中，mLED控制器250被配置为接收单个有源信号并且在断言有源信号时存储数据信号252。mLED控制器250然后基于存储的数据信号生成驱动信号。mLED控制器250生成的驱动信号具有设定的电压振幅和基于数据信号的值的占空比。在一些实施方式中，驱动信号的占空比随着数据信号252的值增加而增加。在一个实施方式中，驱动信号的占空比与数据信号252的值成比例。
电流源260接收驱动信号并且生成驱动mLED 270的驱动电流。在一些实施方式中，电流源260包括基于从mLED控制器250接收的驱动信号导通或者断开的驱动晶体管。在这个实施方式中，驱动信号控制驱动晶体管的栅极端子，驱动晶体管的漏极端子耦接至电源电压，并且驱动晶体管的源极端子耦接至mLED。在一些实施方式中，驱动电流的振幅被选择为使得mLED的电流密度等于或基本上等于J*’。在其他实施方式中，驱动信号的振幅被选择为使得mLED的电流密度大于J*’。然后，mLED270接收驱动电流并因此发光。
图3A示出根据一种实施方式的mLED单元230的电路图。MLED230可包括存储器320、多个与门330A至330D、电流源340和mLED 350及其他部件。如本文中使用的，与门是接收至少两个输入并且产生一个输出的逻辑门。在一些实施方式中，与门仅具有上拉网络或下拉网络之一。例如，与门可以具有在两个输入均高时设定高电平输出，但在输入中的一个低时具有浮动输出(例如，高阻抗输出)的上拉网络。在实施方式中，与门仅具有上拉网络或者下拉网络之一，可以排除结合与门的输出的或门。当两个输出的电压电平高于阈值时，与门的输出具有高电平(HI)，当至少一个输入的电压电平低于阈值时，与门的输出具有低电平(LO)。存储器320包括存储表明mLED单元230的mLED 350的期望亮度的数字值的存储元件(未示出)。图3的存储器320存储表明mLED 350的期望亮度的四比特值。在一些实施方式中，存储器320可以是更大的值(即，具有更深的位深度的值)，诸如8比特值或者10比特值。存储器320进一步包括多个输出。在一些实施方式中，存储器320包括与存储器320的存储元件存储的值的位深度相同数量的输出。
图3B根据一种实施方式示出存储器320的详图。存储器320包括多个存储元件320。在图3B的实施方式中，存储器320包括四个存储元件，并且因此存储4比特值。因而，包括图3B的存储器320的mLED单元可以具有4比特的亮度深度(即，16个不同级别的亮度)。在其他实施方式中，存储器320可包括更多的存储元件以增加mLED单元的亮度深度。例如，具有8比特的亮度深度的mLED单元可包括具有8个存储元件的存储器320。在一些实施方式中，存储器320具有简单电路并且实际上是动态的，因为存储在存储器320中的信息仅存储长达一个帧周期的持续时间。
图3B的存储器320进一步包括四个输出端b0、b1、b2、及b3。输出端b0至b3中的每一个对应于存储元件325的输出端。即，输出端b0对应于存储元件325A的输出端，输出端b1对应于存储元件325B的输出端，输出端b2对应于存储元件325C的输出端，及输出端b3对应于存储元件325D的输出端。在具有更大位深度的实施方式中，存储器320包括更多输出，每个输出对应于存储元件325存储的值的一个比特。
存储器320进一步包括顺次输入要被存储在存储元件325中的值的数据输入端。在一些实施方式中，作为替代，存储器包括多个数据输入端，以并行地提供要被存储在存储元件325中的值。存储器325进一步包括时钟输入端、列有源输入端、及行有源输入端。当列有源输入端和行有源输入端均被断言并且通过时钟输入端提供时钟信号时，存储器320存储通过数据输入端提供的值。在一些实施方式中，存储元件在时钟信号的正沿存储数据。在其他实施方式中，存储元件在时钟信号的负沿存储数据。在图3B的实施方式中，使用与门合并时钟输入、列有源输入、及行有源输入。因此，当列有源输入端和行有源输入端均被断言时，通过时钟输入端提供的时钟信号仅传播至存储元件。
参考回图3A，存储器320的每个输出端耦接至与门330。每个门330进一步耦接至脉冲信号P。即，与门330A耦接至存储器输出端b0和脉冲信号P0，与门330B耦接至存储器输出端b1和脉冲信号P1，与门330C耦接至存储器输出端b2和脉冲信号P2，并且与门330D耦接至存储器输出端b3和脉冲信号P3。具有较大的亮度深度水平的mLED单元可包括另外的与门330并且可接收另外的脉冲信号P。
图3A中示出的与门330是仅具有上拉网络的逻辑门。即，代替具有下拉网络，当输入中的一个具有低电平时，与门330具有高阻抗输出。
在一些实施方式中，与功能直接合并到存储单元中。即，除非存储元件325的“输出选择”线被寻址，否则每个存储元件325的输出具有高阻抗输出。在该实施方式中，将脉冲信号P0至P3提供至存储元件325A至325D的“输出选择”线。
图4A示出根据一种实施方式的脉冲信号P0至P3的一个循环的波形的时序图。在图4A的时序图中，水平轴线表示时间，垂直轴线表示脉冲信号的电压。脉冲信号P0的脉冲具有持续时间t0。即，脉冲信号P0的上升沿与脉冲信号P0的下降沿之间的时间等于t0。脉冲信号P1的脉冲的持续时间为t1并且在脉冲信号P0的下降沿之后延迟t0’后开始。即，脉冲信号P1的上升沿与脉冲信号P1的下降沿之间的时间等于t1，并且脉冲信号P0的下降沿与脉冲信号P1的上升沿之间的时间是t0’。脉冲信号P1的持续时间t1是脉冲信号P0的持续时间t0的两倍。脉冲信号P2的脉冲的持续时间为t2并且在脉冲信号P1的下降沿之后延迟t1’后开始。即，脉冲信号P2的上升沿与脉冲信号P2的下降沿之间的时间等于t2，并且脉冲信号P1的下降沿与脉冲信号P2的上升沿之间的时间是t1’。脉冲信号P2的持续时间t2是脉冲信号P1的持续时间t1的两倍，或者是脉冲信号P0的持续时间t0的四倍。脉冲信号P3的脉冲的持续时间为t3并且在脉冲信号P2的下降沿之后延迟t2’后开始。即，脉冲信号P3的上升沿与脉冲信号P3的下降沿之间的时间等于t3，并且脉冲信号P2的下降沿与脉冲信号P3的上升沿之间的时间是t2’。脉冲信号P3的持续时间t3是脉冲信号P2的持续时间t2的两倍，或者是脉冲信号P0的持续时间t0的八倍。此外，脉冲信号P3的下降沿与脉冲信号P0的下一周期的上升沿之间的时间是t3’。脉冲信号P0至P3中的每一个每隔周期T重复。
在一个实例中，对于90Hz的刷新率(即，90Hz的频率)，周期T约11.1ms。即，t0+t′0+t1+t′1+t2+t′2+t3+t′3＝11.1ms。对于最大PWM导通/断开比率1：20，11ms窗口内的最大导通时间是555.6μs。即，t0+t1+t2+t3＝555.6μs。因而，t0大约是37μs。因而，t1大约是74.1μs，t2大约是0.148ms，并且t3大约是0.296ms。在亮度深度不同于4比特的实施方式中，t0可以计算为：
其中，refresh_rate是显示面板的刷新率(例如，90Hz)，PWM_ratio是最大PWM导通/断开比率(例如，1：20)，并且n是mLED单元的亮度深度(例如，对于8比特亮度信号为8)。
在一些实施方式中，时间t0’、t1’、t2’、及t3’长度相同。在其他实施方式中，时间t0’与时间t0成比例，时间t1’与时间t1成比例，时间t2’与时间t2成比例，并且时间t3’与时间t3成比例。这可能是由于脉冲信号的较长导通时间，导致mLED的较长的冷却时间。
在一些实施方式中，脉冲P0至P3由一系列D型触发器生成，每个触发级以2函数执行时钟划分。在另一个实施方式中，使用与相关时间tn和tn’对应的包含1比特脉冲波形的查找表生成脉冲P0至P3。查找表可以在可重编程存储器中硬编码或者用户编程。在又一个实施方式中，脉冲P0至P3使用两个时钟生成，一个控制tn周期，第二个控制tn’周期。在这个实施方式中，时钟之间的控制开关基于输出的状态。即，在输出低时控制第一时钟，当输出高时控制第二时钟。
参考回图3A，与门330的输出被合并以形成数字PWM信号335并且作为输入提供至电流源340。图4B示出根据一种实施方式的针对不同数据输入的若干PWM信号的时序图。数字PWM信号335A对应于数据输入0001。因而，数字PWM信号335A仅在脉冲信号P0有源时处于导通状态。数字PWM信号335B对应于数据输入0101，并且因此，仅在脉冲信号P0和P2有源时处于导通状态。数字PWM信号335C对应于数据输入1100，并且因此，仅在脉冲信号P2和P3有源时处于导通状态。数字PWM信号335D对应于数据输入1111，并且因此，在脉冲信号P0、P1、P2和P3有源时处于导通状态。
参考回图3A，电流源340基于数字PWM信号生成驱动电流信号，并将驱动电流提供至mLED用于驱动mLED。在一些实施方式中，电流源340包括基于数字PWM信号导通和断开的晶体管。即，电流源340的晶体管在数字PWM信号处于导通状态时传导来自电源电压的电流，并且在数字PWM信号处于断开状态时阻断电流通过。
图5示出根据一种实施方式的包括多个存储器的mLED单元230的电路图。图5的mLED单元230包括两个存储器510A和510B和多个多路复用器520(代替存储器320)。存储器510A可在数据写入存储器510B时输出亮度数据信号至与门330。类似地，存储器510B可在数据写入存储器510A时输出亮度数据信号至与门330。基于选择信号的值，使用多路复用器520A至520D选择亮度数据信号。例如，如果选择信号是0或者LO，多路复用器520A传播存储器510A的输出b0至与门330A，多路复用器520B传播存储器510A的输出b1至与门330B，多路复用器520C传播存储器510A的输出b2至与门330C，及多路复用器520D传播存储器510A的输出b3至与门330D。如果选择信号是1或者HI，多路复用器520A传播存储器510B的输出b0至与门330A，多路复用器520B传播存储器510B的输出b1至与门330B，多路复用器520C传播存储器510B的输出b2至与门330C，及多路复用器520D传播存储器510B的输出b3至与门330D。此外，使能信号值0或者LO选择存储器510B用于写入，使能信号值1或者HI选择存储器510A用于写入。
图6示出根据一种实施方式的用于操作mLED单元的方法的流程图。mLED单元230接收亮度数据值并且610将亮度数据值存储在存储器320中。在一些实施方式中，串行接收并且存储亮度数据值。在其他实施方式中，并行接收并且存储亮度数据值。mLED单元230进一步接收多个脉冲信号620。mLED单元230基于亮度数据值和多个脉冲信号生成数字PWM信号630。通过对亮度数据值的每个比特和多个接收的脉冲信号的脉冲信号进行与运算生成数字PWM。
基于数字PWM信号生成驱动信号。在一些实施方式中，驱动信号由基于数字PWM信号生成驱动电流的电流源生成。基于生成的驱动信号驱动mLED。然后，mLED发出平均亮度与亮度数据值成比例的光。
基于阅读本公开内容，本领域内的普通技术人员通过公开的实施方式的原理将理解还具有另外的替代结构和功能设计。因此，尽管已示出和描述具体实施方式和应用，应当理解实施方式不局限于本文中公开的精确构造和部件而且在不偏离所附权利要求中限定的精神和范围的情况下，可对本文中公开的方法和装置的布置、操作和细节做出对本领域中的技术人员显而易见的各种修改、变化和变型。

Claims (20)

1.一种微发光二极管mLED显示设备，包括：
mLED，被配置为发光；以及
控制器，接收亮度数据信号并且生成与所述亮度数据信号对应的驱动信号，所述控制器耦接至所述mLED，用于提供所述驱动信号，所述驱动信号在循环的持续时间内导通所述mLED达第一时间并且关断所述mLED达第二时间，所述驱动信号使所述mLED中的电流密度高于所述mLED导通时的阈值。
2.根据权利要求1所述的mLED显示设备，进一步包括：
电流源，耦接在所述控制器的输出端与所述mLED之间，以基于所述驱动信号生成驱动电流。
3.根据权利要求2所述的mLED显示设备，其中，以高于1A/cm2的电流密度驱动所述mLED。
4.根据权利要求2所述的mLED显示设备，其中，所述控制器包括：
存储器，包括多个存储单元，所述存储器还包括多个存储器输出，每个存储器输出与存储单元的输出对应，所述存储器存储所述亮度数据信号；以及
多个门，所述多个门的每个门包括：
第一输入节点，耦接至所述多个存储器输出的一个存储器输出，
第二输入节点，耦接至多个周期脉冲信号的一个周期脉冲信号，以及
输出节点，所述输出节点被配置为当所述存储器输出和所述周期脉冲信号的电平高于阈值时输出高电平的信号，在所述存储器输出或所述周期脉冲信号的电平低于所述阈值时输出低电平的信号。
5.根据权利要求4所述的mLED显示设备，其中，所述多个门包括：
第一门，耦接至所述存储器的第一输出和第一周期脉冲信号；以及
第二门，耦接至所述存储器的第二输出和第二周期脉冲信号；
其中，所述第二周期脉冲信号的脉冲持续时间是所述第一周期脉冲信号的脉冲持续时间的两倍。
6.根据权利要求5所述的mLED显示设备，其中，所述第二周期脉冲信号的脉冲在所述第一周期脉冲信号的脉冲结束后开始。
7.根据权利要求5所述的mLED显示设备，其中，所述第一周期脉冲信号的脉冲宽度与所述mLED单元的刷新率以及所述亮度数据信号的比特深度成反比。
8.根据权利要求5所述的mLED显示设备，进一步包括：
第三与门，耦接至所述存储器的第三输出和第三周期脉冲信号，
其中，所述第三周期脉冲信号的脉冲持续时间是所述第二脉冲信号的脉冲持续时间的两倍。
9.根据权利要求4所述的mLED显示设备，其中，所述控制器进一步包括：
第二存储器，包括多个存储单元，所述第二存储单元还包括多个第二存储器输出，所述多个第二存储器输出的每个输出对应于第二存储器单元的输出；以及
多个多路复用器；所述多个多路复用器的每个多路复用器耦接至存储器输出和第二存储器输出；
其中，所述多个门的每一者耦接至所述多个多路复用器中的一个多路复用器。
10.根据权利要求9所述的mLED显示设备，其中：
当所述多个多路复用器被配置为选择所述第二存储器的输出时，所述第一存储器被使能用于写入，并且
当所述多个多路复用器被配置为选择所述存储器的输出时，所述第二存储器被使能用于写入。
11.根据权利要求4所述的mLED显示设备，其中，所述存储器的存储单元的数量等于所述亮度数据信号的位深度。
12.根据权利要求2所述的mLED显示设备，其中，所述电流源包括被配置为基于所述控制器的输出来导通和断开的晶体管。
13.一种微发光二极管mLED驱动电路，包括：
存储器，包括多个存储单元，所述存储器还包括多个存储器输出，每个存储器输出与存储单元的输出对应，所述存储器存储亮度数据信号的值；以及
多个门，所述多个门的每个门包括：
第一输入节点，耦接至所述多个存储器输出的一个存储器输出，
第二输入节点，耦接至多个周期脉冲信号的一个周期脉冲信号，以及
输出节点，所述输出节点被配置为当所述存储器输出和所述周期脉冲信号的电平大于阈值时高输出电平的信号，在所述存储器输出或所述周期脉冲信号的电平小于所述阈值时输出低电平的信号；并且
电流源，所述电流源耦接至每个所述门的输出，所述电流源基于每个所述门的输出在帧内生成驱动电流，所述驱动电流的平均振幅基于所述亮度数据值。
14.根据权利要求13所述的mLED驱动电路，其中，所述多个门包括：
第一门，耦接至所述存储器的第一输出和第一周期脉冲信号；以及
第二门，耦接至所述存储器的第二输出和第二周期脉冲信号；
其中，所述第二周期脉冲信号的脉冲持续时间是所述第一周期脉冲信号的脉冲持续时间的两倍。
15.根据权利要求14所述的mLED驱动电路，其中，所述第二周期脉冲信号的脉冲在所述第一周期脉冲信号的脉冲结束之后开始。
16.根据权利要求14所述的mLED驱动电路，其中，所述第一周期脉冲信号的脉冲宽度与所述mLED驱动电路的刷新率以及所述亮度数据信号的比特深度成反比。
17.根据权利要求13所述的mLED驱动电路，进一步包括：
第二存储器，包括多个存储单元，所述第二存储单元还包括多个第二存储器输出，所述多个第二存储器输出的每个输出对应于第二存储器单元的输出；并且
多个多路复用器；所述多个多路复用器的每个多路复用器耦接至存储器输出和第二存储器输出；
其中，所述多个门的每一者耦接至所述多个多路复用器的一个多路复用器。
18.一种用于操作微发光二极管mLED的方法，包括：
生成与亮度数据信号对应的驱动信号；
由所述驱动信号导通所述mLED达循环的持续时间内的第一时间，以使mLED中的电流密度高于阈值；并且
由所述驱动信号关断所述mLED达所述循环的持续时间内的第二时间。
19.根据权利要求18所述的方法，其中，生成所述驱动信号包括：
将所述亮度数据值存储在所述mLED单元的存储单元中，所述亮度数据值表明所述mLED的期望亮度；
接收多个周期脉冲信号，所述多个周期脉冲信号包括：
第一周期脉冲信号，以及
第二周期脉冲信号，所述第二脉冲信号的脉冲宽度是所述第一周期脉冲信号的脉冲宽度的两倍；
通过将所述亮度数据值的每个比特与所述多个周期脉冲信号的一个脉冲信号进行与运算，生成数字脉宽调制PWM信号；
基于所述数字PWM信号生成驱动信号；并且
使用所生成的驱动信号驱动所述mLED单元的mLED。
20.根据权利要求19所述的方法，其中，生成所述数字PWM信号包括：
将所述第一周期脉冲信号与所述亮度数据值的最低位进行与运算；并且
将所述第二周期脉冲信号与所述亮度数据值的第二最低位进行与运算。
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Application publication date: 20190524