CN109765475A - The reverse-biased pilot system of high temperature and humidity and test method for semiconductor devices - Google Patents
The reverse-biased pilot system of high temperature and humidity and test method for semiconductor devices Download PDFInfo
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- CN109765475A CN109765475A CN201910174586.6A CN201910174586A CN109765475A CN 109765475 A CN109765475 A CN 109765475A CN 201910174586 A CN201910174586 A CN 201910174586A CN 109765475 A CN109765475 A CN 109765475A
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Abstract
The present invention provides the reverse-biased pilot systems of high temperature and humidity and method for semiconductor devices, in the pilot system and test method, protective tube is arranged outside chamber, it can use common protective tube replacement special safety pipe, advantageously reduce experimentation cost, and reduce the test space in the chamber that protective tube occupies, to be conducive to provide more test stations in chamber, improve bulge test efficiency.
Description
Technical field
The present invention relates to semiconductor devices to test field, in particular to a kind of high temperature and humidity for semiconductor devices is reverse-biased
Pilot system and test method.
Background technique
Carrying out degradation to semiconductor devices is to control the important means of semiconductor device quality, is tried using existing aging
Standard inspection standard (referring to standard AECQ101) in the semiconductor devices such as diode or MOSFET carry out reverse-biased test when, load it is anti-
Bias-voltage maximum value is 100V；But in practical application, the backward voltage threshold value that semiconductor devices can be born is likely to remote
Greater than 100V, for example, some semiconductor devices needs are not still damaged when reversed bias voltage reaches 800V in automotive field
It is bad, according to application scenarios, the bad environments of some semiconductor device applications, so, in degradation, it is necessary to simulate these
Rugged environment, and the reversed bias voltage loaded much larger than 100V is tested, and ensures semiconductor devices with more harsh condition
Outgoing.Currently, being provided with chamber, setting in chamber in the reverse-biased pilot system of high temperature and humidity of semiconductor
There is an ageing test plate, be provided with power supply and detection device outside chamber, when test, semiconductor devices and protective tube are mounted on this
In ageing test plate, reversed bias voltage is provided to the semiconductor devices to be measured on ageing test plate using power supply, utilizes detection device
The test parameters for detecting semiconductor devices, using in the temperature-adjusting device and humidity control apparatus adjusting chamber in chamber
Temperature and humidity, to realize the screening of diode.In existing pilot system and experimental rig, in the environment of high temperature and humidity
Under, need to configure expensive special safety pipe, higher cost.
Summary of the invention
The main purpose of the present invention is to provide a kind of reverse-biased pilot system of high temperature and humidity for semiconductor devices and examinations
Proved recipe method, to reduce the cost of protective tube, to advantageously reduce the cost of the reverse-biased pilot system of entire high temperature and humidity.
In order to achieve the above objects and other related objects, technical solution of the present invention is as follows:
A kind of reverse-biased pilot system of high temperature and humidity for semiconductor devices, comprising:
Chamber, the temperature and humidity in the chamber is adjustable；
Ageing test plate, the ageing test plate is arranged in the chamber, if being provided on the ageing test plate
Dry test station, one semiconductor devices to be measured of corresponding installation on a test station；
Power module, to the semiconductor to be measured being mounted on the test station when power module is used to test
Device applies voltage；
Protective tube is in series with the protective tube between the power module and each semiconductor devices to be measured；
Wherein, the protective tube is arranged outside the chamber.
Optionally, the power module includes the different DC power supply of several output voltages, the power module and every
Power supply gear adjusting device is provided between ageing test plate described in block, the power supply gear adjusting device is arranged in the examination
Outside tryoff.
Optionally, the power supply gear adjusting device includes:
Bottom plate has first surface on the bottom plate, and a pair of of burn-in board static contact and multipair is provided on the first surface
Power supply static contact, a pair of burn-in board contact include cathode static contact and anode static contact, the cathode static contact with it is described
It tests the cathode connection of the semiconductor devices on station, the anode static contact and described tests described partly leading on station
The anode of body device connects, and each pair of power supply static contact includes a positive static contact and a cathode static contact, a pair
The positive static contact and cathode static contact of the power supply static contact are connected respectively the anode and cathode of a DC power supply；
Connector, the connector are provided with the second surface towards the first surface, are arranged on the second surface
There are one first moving contact, one second moving contact, a cathode moving contact and an anode moving contact, first moving contact and the sun
The connection of pole moving contact, second moving contact are connect with the cathode moving contact, and first moving contact and the second moving contact are used
In the positive static contact and the cathode static contact of a pair of power supply static contact of corresponding contact, the anode moving contact and
The cathode moving contact is for the corresponding anode static contact and the cathode static contact for contacting the burn-in board static contact.
Optionally, first moving contact, second moving contact, the cathode moving contact and the anode moving contact are equal
For spring-piece type contact.
Optionally, positive neutral gear static contact and cathode neutral gear static contact, the anode are additionally provided on the second surface
Neutral gear static contact with first moving contact for contacting, and the cathode neutral gear static contact with second moving contact for connecing
Touching.
Optionally, the connector is knob, is provided with a central axis, the central axis and the knob on the bottom plate
Between be threadedly coupled or the central axis and the bottom plate between be threadedly coupled, make the knob can by rotation close to or far from
Bottom plate, the anode static contact and the cathode static contact of the burn-in board static contact are with the central axis central symmetry cloth
It sets, the positive static contact and cathode static contact of each pair of power supply static contact are centrosymmetrically arranged with the central axis；Institute
It states the second moving contact and first moving contact is centrosymmetrically arranged with the central axis, the cathode moving contact and the anode
Moving contact is with the arrangement substantially symmetrical about its central axis, and the cathode static contact, anode static contact, positive static contact, a cathode are quiet
Contact is using the central axis as center circumference uniform distribution.
The present invention also provides prepare rank before a kind of reverse-biased test method of the high temperature and humidity for semiconductor devices, including test
Section:
Semiconductor devices to be measured is mounted on a test station of an ageing test plate,
The ageing test plate is positioned in chamber；
Semiconductor devices to be measured each of in the chamber is all connected with the protective tube outside test；
Each semiconductor devices to be measured is connect with a power module, the power module semiconductor to be measured is made
Device power supply, and make to be in series with the protective tube between the power module and each semiconductor devices to be measured.
Optionally, test method of the invention further include:
Reversed bias voltage, the reverse leakage that monitoring passes through the semiconductor devices to be measured are loaded to the semiconductor devices to be measured
Current value；
Forward voltage is loaded to the semiconductor devices to be measured, monitoring passes through the forward current of the semiconductor devices to be measured
Value, if the forward current value is greater than preset forward current threshold value, the semiconductor devices to be measured is normal, if the forward direction
Current value is less than the preset forward current threshold value, then the semiconductor devices to be measured is abnormal.
Optionally, test method of the invention further includes the first load phase and the second load phase,
In first load phase, the first reversed bias voltage is loaded to the semiconductor devices to be measured；
In second load phase, the second reversed bias voltage is loaded to the semiconductor devices to be measured；
Wherein, first load phase is carried out prior to second load phase, and the second reversed bias voltage is greater than first
Reversed bias voltage, first reversed bias voltage are equal to the reverse-biased test voltage of standard maximum.
Optionally, before the second load phase starts, the temperature in chamber is first loaded into 83~87 DEG C, then will test
Humidity in case is loaded into 80~90%RH；After the completion of the second load phase, reversed bias voltage is first removed, then reduces temperature and wet
Degree, the rate for reducing the speed ratio reduction temperature of humidity are fast.
In the reverse-biased pilot system of high temperature and humidity for semiconductor devices of the invention and method, protective tube setting is being tried
Outside tryoff, it can use common protective tube replacement special safety pipe, advantageously reduce experimentation cost, and reduce protective tube and account for
Test space in chamber improves bulge test efficiency to be conducive to provide more test stations in chamber.
Detailed description of the invention
Fig. 1 is shown as a kind of structure of embodiment of the high temperature and humidity test system for semiconductor devices of the invention
Block diagram；
Fig. 2 is shown as the knot of the another embodiment of the high temperature and humidity test system for semiconductor devices of the invention
Structure block diagram；
Fig. 3 is shown as the position schematic diagram of power supply gear adjusting device；
Fig. 4 is shown as the structural schematic diagram of power supply gear adjusting device；
Fig. 5 is shown as the structural schematic diagram of connector.
Description of symbols in embodiment: chamber 1, ageing test plate 2, power module 3, DC power supply 31, semiconductor
Device 4, protective tube 5, temperature-adjusting device 6, humidity control apparatus 7, power supply gear adjusting device 8, detection module 9, bottom plate 81,
Connector 82, central axis 83, first surface 810, positive static contact 811, cathode static contact 812, anode static contact 813, cathode
Static contact 814, positive neutral gear static contact 815, cathode neutral gear static contact 816, second surface 820, the first moving contact 821, second
Moving contact 822, anode moving contact 823, cathode moving contact 824.
Specific embodiment
In the following description, a large amount of concrete details are given so as to provide a more thorough understanding of the present invention.So
And it is obvious to the skilled person that the present invention may not need one or more of these details and be able to
Implement.In other examples, in order to avoid confusion with the present invention, for some technical characteristics well known in the art not into
Row description.
It should be understood that the present invention can be implemented in different forms, and should not be construed as being limited to propose here
Embodiment.On the contrary, provide these embodiments will make it is open thoroughly and completely, and will fully convey the scope of the invention to
Those skilled in the art.In the accompanying drawings, same reference numerals indicate identical component from beginning to end.
Semiconductor devices and semiconductor devices to be measured in following embodiment can be with diode or MOSFET.
The reverse-biased pilot system of a kind of high temperature and humidity for semiconductor devices of the present embodiment, referring to Fig. 1, comprising:
Chamber 1, the temperature and humidity in the chamber 1 is adjustable；
Ageing test plate 2, the ageing test plate 2 are arranged in the chamber 1, are arranged on the ageing test plate 2
If there is dry test station, one semiconductor devices 4 to be measured of corresponding installation on a test station；
Power module 3, the power module 3 are used to described to be measured partly lead to be mounted on the test station when testing
Body device 4 applies voltage；
Protective tube 5 is in series with the protective tube between the power module 3 and each semiconductor devices 4 to be measured
5；
Wherein, the protective tube 5 is arranged outside the chamber 1.
Also it allows for each semiconductor devices to be measured 4 and protective tube 5 corresponding with the semiconductor devices 4 to be measured is connected on one
It tests in branch, every test branch is arranged in a test loop with power module 3.
In specific implementation process, it can use existing temperature-adjusting device 6 and humidity control apparatus 7 adjust chamber 1
Internal temperature and humidity, temperature-adjusting device 6 and humidity control apparatus 7 do not limit, as long as can be realized inside chamber 1
Temperature and humidity.
When test, semiconductor devices 4 to be measured need to be only mounted on the test station of ageing test plate 2, be placed into test
In case 1, the relevant parameter of the semiconductor devices to be measured 4 in every test loop is tested i.e. on demand using test module 9
It can.Connection relationship of the specific route and test module of the test module 9 in test loop is the prior art, is not done this time
It elaborates.
In the reverse-biased pilot system of high temperature and humidity for semiconductor devices of the invention and method, the setting of protective tube 5 is existed
Outside chamber 1, it can use common protective tube 5 and replace special safety pipe 5, advantageously reduce experimentation cost, and reduce guarantor
The test space in chamber 1 that dangerous pipe 5 occupies improves batch to be conducive to provide more test stations in chamber 1
Test efficiency；In addition, also helping the setting of protective tube 5 outside chamber 1 will be few if increasing test station in chamber 1
The contact connectio point of route in chamber 1 is then more advantageous to the phenomenon that reducing poor contact under hot and humid environment.
In some embodiments, in conjunction with Fig. 1, Fig. 3, the power module 3 includes the different direct current of several output voltages
Power supply 31 is provided with power supply gear adjusting device 8, the electricity between the power module 3 and every piece of ageing test plate 2
Source gear adjusting device 8 is arranged outside the chamber 1, can use the power supply gear adjusting device 8 for different direct currents
Source 31 is connect with ageing test plate 2, can also adjust the voltage value loaded on semiconductor devices 4 on demand, which can
To be positive value, it is also possible to negative value.In the actual implementation process, multiple chambers can be set, can be set in each chamber
Multiple ageing test plates are set, a power supply gear adjusting device, Neng Goushi are respectively provided between each ageing test plate and power module
Existing batch aging test.
Specifically, in some embodiments, in conjunction with Fig. 2, Fig. 4, Fig. 5, the power supply gear adjusting device 8 includes:
Bottom plate 81 has first surface 810 on the bottom plate 81, and it is quiet to be provided with a pair of of burn-in board on the first surface 810
Contact and multipair power supply static contact, a pair of burn-in board contact include cathode static contact 814 and anode static contact 813, described
Cathode static contact 814 connect with the cathode of the semiconductor devices 4 on the test station, the anode static contact 813 and
The anode of the semiconductor devices 4 on the test station connects, and each pair of power supply static contact includes that an anode is quiet
Contact 811 and a cathode static contact 812, the positive static contact 811 and cathode static contact 812 of a pair of power supply static contact divide
It is not correspondingly connected with the anode and cathode of a DC power supply 31；
Connector 82, the connector 82 are provided with the second surface 820 towards the first surface 810, and described second
One first moving contact 821, one second moving contact 822, a cathode moving contact 824 and an anode moving contact are provided on surface 820
823, first moving contact 821 is connect with the anode moving contact 823, second moving contact 822 and the dynamic touching of the cathode
First 824 connection, the institute of first moving contact 821 and the second moving contact 822 for a pair of power supply static contact of corresponding contact
State positive static contact 811 and the cathode static contact 812, the anode moving contact 823 and the cathode moving contact 824 for pair
The anode static contact 813 and the cathode static contact 814 of the burn-in board static contact should be contacted.
When test, only the first moving contact 821 and positive static contact need to can be realized by the position of change connector 82
811 contacts or the contact of cathode static contact 812, the second moving contact 822 and the contact of corresponding static contact, anode moving contact 823 and
The contact of anode static contact 813, the contact of cathode moving contact 824 and cathode static contact 814.
In the specific implementation process, can also be arranged between the anode and anode static contact 813 of semiconductor devices 4 to be measured old
Change measurement circuit, burn-in test route also can be set between the cathode and static contact of semiconductor devices 4 to be measured, as long as can be real
The connection of anode and anode static contact 813 of existing semiconductor devices 4 to be measured and the cathode of semiconductor devices to be measured 4 and cathode stationary contact
First 814 connection.
In some embodiments, referring to fig. 4, the first moving contact 821, the second moving contact 822, cathode moving contact 824 and sun
Pole moving contact 823 can be spring-piece type contact, be conducive to each moving contact and the contact of corresponding static contact is more reliable.Spring-piece type touching
Head structure with no restrictions, as long as being able to achieve the flexible contact with corresponding static contact.
In some embodiments, in conjunction with Fig. 2, Fig. 4, Fig. 5, positive neutral gear stationary contact is additionally provided on the second surface 820
First 815 and cathode neutral gear static contact 816, the anode neutral gear static contact 815 with first moving contact 821 for contacting, institute
Cathode neutral gear static contact 816 is stated for contacting with second moving contact 822.
Specifically, in some embodiments, in conjunction with Fig. 2, Fig. 4, Fig. 5, the connector 82 is knob, on the bottom plate 81
It is provided with a central axis 83, threaded connection or the central axis 83 and the bottom plate 81 between the central axis 83 and the knob
Between be threadedly coupled, make the knob can by rotate close to or far from bottom plate 81, the anode of the burn-in board static contact
Static contact 813 and the cathode static contact 814 are centrosymmetrically arranged with the central axis 83, the institute of each pair of power supply static contact
Positive static contact 811 and cathode static contact 812 is stated to be centrosymmetrically arranged with the central axis 83；Second moving contact, 822 He
First moving contact 821 is centrosymmetrically arranged with the central axis 83, the cathode moving contact 824 and the anode moving contact
823 are arranged symmetrically with the central axis 83, and the cathode static contact 814, anode static contact 813, positive static contact 811, one
A cathode static contact 812 is with the central axis 83 for center circumference uniform distribution.
When test, only connector 82 (knob) need to be turned, it will be able to so that connector 82 is close to or far from bottom plate 81, and same
When rotated along central axis 83, realize the contact of positive static contact 811 or the cathode static contact of the first moving contact 821 and a certain gear
When 812, the contact of the second moving contact 822 and the cathode static contact 812 of respective notch can also the company of turning when non-test process
Fitting 82 realizes the contact of the first moving contact 821 with positive neutral gear static contact 815, the second moving contact 822 and cathode neutral gear stationary contact
First 816 contact, need to only turn knob can apply the worth forward voltage of different voltages or reverse-biased electricity to semiconductor devices 4 to be measured
Pressure, it is easy to operate.
It is of the invention in conjunction with Fig. 1 the present invention also provides a kind of reverse-biased test method of the high temperature and humidity for semiconductor devices
Test method includes the preparation stage before testing:
Semiconductor devices 4 to be measured is mounted on a test station of an ageing test plate 2,
The ageing test plate 2 is positioned in chamber 1；
Semiconductor devices 4 to be measured each of in the chamber 1 is all connected with the protective tube 5 outside test；
Each semiconductor devices 4 to be measured is connect with a power module 3, the power module 3 described to be measured half is made
Conductor device 4 is powered, and makes to be in series with the insurance between the power module 3 and each semiconductor devices 4 to be measured
Pipe 5.
In some embodiments, the reverse-biased test method of the high temperature and humidity for semiconductor devices of the invention, further includes:
Reversed bias voltage, the reverse leakage that monitoring passes through the semiconductor devices to be measured are loaded to the semiconductor devices to be measured
Current value；
Forward voltage is loaded to the semiconductor devices to be measured, monitoring passes through the forward current of the semiconductor devices to be measured
Value, if the forward current value is greater than preset forward current threshold value, the semiconductor devices to be measured is normal, if the forward direction
Current value is less than the preset forward current threshold value, then the semiconductor devices to be measured is abnormal.
Specifically, the forward current threshold value of the prediction can be 0.01A.
This test method is not monitored reverse-biased leakage current only with conventional test methods, additionally uses positive auxiliary
The mode for helping monitoring is conducive to during finding test in time, the exception of semiconductor devices to be measured.Semiconductor devices to be measured is added
Carrying reversed bias voltage or forward voltage can be adjusted using the knob in above-mentioned experimental system.
It in some embodiments, can also be to be measured to this before first time loads reversed bias voltage to semiconductor devices to be measured
Semiconductor devices loads forward voltage, described to be measured partly to lead if the forward current value is greater than preset forward current threshold value
Body device is normal, if the forward current value is less than the preset forward current threshold value, the semiconductor devices to be measured is different
Often.It can be found in time using this experimental method if semiconductor devices to be measured has exception before reverse-biased test.
In some embodiments, after reversed bias voltage being loaded to semiconductor devices to be measured continuing a period every time,
Forward voltage is applied to semiconductor devices to be measured, which can make 24 hours or other times section, this experimental method energy
How long enough relatively accurate judgement semiconductor devices to be measured are abnormal afterwards in load reversed bias voltage.
In some embodiments, test method of the invention includes the first load phase and the second load phase,
In first load phase, the first reversed bias voltage is loaded to the semiconductor devices to be measured；
In second load phase, the second reversed bias voltage is loaded to the semiconductor devices to be measured；
Wherein, first load phase is carried out prior to second load phase, and the second reversed bias voltage is greater than first
Reversed bias voltage, first reversed bias voltage are equal to the reverse-biased test voltage of standard maximum.Referring to standard AECQ101, the standard maximum
The value of reverse-biased test voltage is usually 100V.
This experimental method is conducive to the semiconductor devices to be measured for finding just to generate exception under standard test conditions in time,
And these abnormal semiconductor devices are tested with regard to not entering back into the second load phase, improve test efficiency.
In some embodiments, before the second load phase starts, the temperature in chamber is first loaded into 83~87 DEG C,
After stablizing half an hour, then the humidity in chamber is loaded into 80~90%RH；After the completion of the second load phase, first removal is anti-
Bias-voltage, then temperature and humidity is reduced, the rate for reducing the speed ratio reduction temperature of humidity is fast, the adjusting of this temperature and humidity
Mode can prevent from generating condensation in chamber, avoid influencing test result because of condensation.
Specifically, the rate that the speed ratio for reducing humidity reduces temperature is fast, then humidity is at the uniform velocity reduced to target humidity value
Time is reduced to the time of target temperature value short than temperature, that is, passes through the time cycle of control reduction process.In practical reality
During applying, can cool the temperature in test to target temperature is worth time control at 1.5 hours, and humidity is reduced to target
The rate that the time of humidity controls the speed ratio reduction temperature for achieving the effect that reduce humidity at 1 hour is fast.
It in some embodiments, need to also be before by semiconductor fab to be measured on test station, on ageing test plate 2
Route is detected, it is ensured that route normally.
In some embodiments, after the completion of the second load phase, 38~42 DEG C are dropped to temperature, humidity drops to 45~50%
When RH, ageing test plate is taken out from chamber；The ageing test plate of taking-up is put to stress recovery at room temperature, then right
The semiconductor devices carries out parameter testing.Specifically, the time that the ageing test plate after taking-up is placed at room temperature be 22~
26 hours.
In the present description unless specifically defined or limited otherwise, fisrt feature the "upper" of second feature or it
"lower" may include that the first and second features directly contact, and also may include that the first and second features are not direct contacts but lead to
Cross the other characterisation contact between them.
In description of the invention, " one " of singular, "one" and " described/should " be also intended to include plural form, remove
Non- context is expressly noted that other mode.Term " composition " and/or " comprising " are also to be understood that, when using in this specification
When, determine the presence of the feature, integer, step, operation, component and/or component, but be not excluded for one or more other special
Sign, integer, step, operation, the presence or addition of component, component and/or group.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology all without departing from the spirit and scope of the present invention, carries out modifications and changes to above-described embodiment.Cause
This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as
At all equivalent modifications or change, should be covered by the claims of the present invention.
Claims (10)
1. a kind of reverse-biased pilot system of high temperature and humidity for semiconductor devices, it is characterised in that: include:
Chamber, the temperature and humidity in the chamber is adjustable；
Ageing test plate, the ageing test plate are arranged in the chamber, and several examinations are provided on the ageing test plate
Station is tested, one semiconductor devices to be measured of corresponding installation on a test station；
Power module, to the semiconductor devices to be measured being mounted on the test station when power module is used to test
Apply voltage；
Protective tube is in series with the protective tube between the power module and each semiconductor devices to be measured；
Wherein, the protective tube is arranged outside the chamber.
2. the reverse-biased pilot system of the high temperature and humidity according to claim 1 for semiconductor devices, it is characterised in that: described
Power module includes the different DC power supply of several output voltages, between the power module and every piece of ageing test plate
It is provided with power supply gear adjusting device, the power supply gear adjusting device is arranged outside the chamber.
3. the reverse-biased pilot system of the high temperature and humidity according to claim 2 for semiconductor devices, it is characterised in that: described
Power supply gear adjusting device includes:
Bottom plate has first surface on the bottom plate, a pair of of burn-in board static contact and multipair power supply is provided on the first surface
Static contact, a pair of burn-in board contact include cathode static contact and anode static contact, the cathode static contact and the test
The cathode of the semiconductor devices on station connects, the semiconductor device on the anode static contact and the test station
The anode of part connects, and each pair of power supply static contact includes a positive static contact and a cathode static contact, described in a pair
The positive static contact and cathode static contact of power supply static contact are connected respectively the anode and cathode of a DC power supply；
Connector, the connector are provided with the second surface towards the first surface, are provided with one on the second surface
First moving contact, one second moving contact, a cathode moving contact and an anode moving contact, first moving contact and the anode are dynamic
Contact connection, second moving contact connect with the cathode moving contact, and first moving contact and the second moving contact are used for pair
The positive static contact and the cathode static contact of a pair of power supply static contact should be contacted, the anode moving contact and described
Cathode moving contact is for the corresponding anode static contact and the cathode static contact for contacting the burn-in board static contact.
4. the reverse-biased pilot system of the high temperature and humidity according to claim 3 for semiconductor devices, it is characterised in that: described
First moving contact, second moving contact, the cathode moving contact and the anode moving contact are spring-piece type contact.
5. the reverse-biased pilot system of the high temperature and humidity according to claim 3 for semiconductor devices, it is characterised in that: described
Be additionally provided with positive neutral gear static contact and cathode neutral gear static contact on second surface, the anode neutral gear static contact be used for it is described
The contact of first moving contact, the cathode neutral gear static contact with second moving contact for contacting.
6. the reverse-biased pilot system of the high temperature and humidity according to claim 5 for semiconductor devices, it is characterised in that: described
Connector is knob, and a central axis is provided on the bottom plate, is threadedly coupled between the central axis and the knob or described
It is threadedly coupled between central axis and the bottom plate, makes the knob can be by rotating close to or far from bottom plate, the burn-in board is quiet
The anode static contact and the cathode static contact of contact are centrosymmetrically arranged with the central axis, each pair of power supply stationary contact
The positive static contact and cathode static contact of head are centrosymmetrically arranged with the central axis；Second moving contact and described
One moving contact is centrosymmetrically arranged with the central axis, and the cathode moving contact and the anode moving contact are with the central axis pair
Claim arrangement, and during the cathode static contact, anode static contact, positive static contact, a cathode static contact with the central axis be
Heart circumference uniform distribution.
7. a kind of reverse-biased test method of high temperature and humidity for semiconductor devices, which is characterized in that including the preparation stage before testing:
Semiconductor devices to be measured is mounted on a test station of an ageing test plate,
The ageing test plate is positioned in chamber；
Semiconductor devices to be measured each of in the chamber is all connected with the protective tube outside test；
Each semiconductor devices to be measured is connect with a power module, the power module semiconductor devices to be measured is made
Power supply, and make to be in series with the protective tube between the power module and each semiconductor devices to be measured.
8. the reverse-biased test method of the high temperature and humidity according to claim 7 for semiconductor devices, which is characterized in that packet
It includes:
Reversed bias voltage is loaded to the semiconductor devices to be measured, monitoring passes through the reverse current leakage of the semiconductor devices to be measured
Value；
Forward voltage is loaded to the semiconductor devices to be measured, monitoring passes through the forward current value of the semiconductor devices to be measured, if
The forward current value is greater than preset forward current threshold value, then the semiconductor devices to be measured is normal, if the forward current
Value is less than the preset forward current threshold value, then the semiconductor devices to be measured is abnormal.
9. the reverse-biased test method of the high temperature and humidity according to claim 8 for semiconductor devices, it is characterised in that: including
First load phase and the second load phase,
In first load phase, the first reversed bias voltage is loaded to the semiconductor devices to be measured；
In second load phase, the second reversed bias voltage is loaded to the semiconductor devices to be measured；
Wherein, first load phase is carried out prior to second load phase, and the second reversed bias voltage is reverse-biased greater than first
Voltage, first reversed bias voltage are equal to the reverse-biased test voltage of standard maximum.
10. the reverse-biased test method of the high temperature and humidity according to claim 9 for semiconductor devices, it is characterised in that:
Before the second load phase starts, the temperature in chamber is first loaded into 83~87 DEG C, then by the humidity in chamber
It is loaded into 80~90%RH；
After the completion of the second load phase, reversed bias voltage is first removed, then reduce temperature and humidity, the speed ratio for reducing humidity reduces
The rate of temperature is fast.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110879343A (en) * | 2019-10-28 | 2020-03-13 | 深圳市晶导电子有限公司 | Method and system for testing high-temperature drain-source leakage current characteristics of device |
| CN112051495A (en) * | 2020-07-27 | 2020-12-08 | 西安电子科技大学 | High-temperature high-humidity reverse bias stress damage characterization method of SiC JBS device |
| CN112964958A (en) * | 2021-04-27 | 2021-06-15 | 深圳吉华微特电子有限公司 | Reverse bias test method for high-power intelligent power module |
| CN113514746A (en) * | 2021-04-15 | 2021-10-19 | 华电(烟台)功率半导体技术研究院有限公司 | High-temperature high-humidity high-pressure reverse bias test system and method for high-voltage high-power device |
| CN113589132A (en) * | 2021-08-30 | 2021-11-02 | 中国振华集团永光电子有限公司（国营第八七三厂） | High-temperature aging reverse bias test device suitable for transistor and field effect transistor |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2307365Y (en) * | 1997-06-17 | 1999-02-10 | 王文国 | Knob on-off type fuse box |
| CN105548853A (en) * | 2015-10-29 | 2016-05-04 | 温州墨熵微电子有限公司 | High temperature reverse bias and high temperature gate bias test system for power device |
| CN206945902U (en) * | 2017-06-13 | 2018-01-30 | 杭州高坤电子科技有限公司 | A kind of high temperature reverse bias testing equipment with junction temperature test |
| CN207992389U (en) * | 2017-11-29 | 2018-10-19 | 中国振华集团永光电子有限公司（国营第八三七厂） | A kind of full dynamic aging circuit of diode |
| CN108680486A (en) * | 2018-05-02 | 2018-10-19 | 河海大学常州校区 | A kind of photovoltaic module long-term weatherability performance test method |
-
2019
- 2019-03-08 CN CN201910174586.6A patent/CN109765475B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2307365Y (en) * | 1997-06-17 | 1999-02-10 | 王文国 | Knob on-off type fuse box |
| CN105548853A (en) * | 2015-10-29 | 2016-05-04 | 温州墨熵微电子有限公司 | High temperature reverse bias and high temperature gate bias test system for power device |
| CN206945902U (en) * | 2017-06-13 | 2018-01-30 | 杭州高坤电子科技有限公司 | A kind of high temperature reverse bias testing equipment with junction temperature test |
| CN207992389U (en) * | 2017-11-29 | 2018-10-19 | 中国振华集团永光电子有限公司（国营第八三七厂） | A kind of full dynamic aging circuit of diode |
| CN108680486A (en) * | 2018-05-02 | 2018-10-19 | 河海大学常州校区 | A kind of photovoltaic module long-term weatherability performance test method |
Non-Patent Citations (1)
| Title |
|---|
| 黄汉尧等: "《半导体器件工艺原理》", 30 June 1980 * |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110879343A (en) * | 2019-10-28 | 2020-03-13 | 深圳市晶导电子有限公司 | Method and system for testing high-temperature drain-source leakage current characteristics of device |
| CN110879343B (en) * | 2019-10-28 | 2021-09-24 | 深圳市晶导电子有限公司 | Method and system for testing high-temperature drain-source leakage current characteristics of device |
| CN112051495A (en) * | 2020-07-27 | 2020-12-08 | 西安电子科技大学 | High-temperature high-humidity reverse bias stress damage characterization method of SiC JBS device |
| CN113514746A (en) * | 2021-04-15 | 2021-10-19 | 华电(烟台)功率半导体技术研究院有限公司 | High-temperature high-humidity high-pressure reverse bias test system and method for high-voltage high-power device |
| CN112964958A (en) * | 2021-04-27 | 2021-06-15 | 深圳吉华微特电子有限公司 | Reverse bias test method for high-power intelligent power module |
| CN113589132A (en) * | 2021-08-30 | 2021-11-02 | 中国振华集团永光电子有限公司（国营第八七三厂） | High-temperature aging reverse bias test device suitable for transistor and field effect transistor |
| CN113589132B (en) * | 2021-08-30 | 2024-05-14 | 中国振华集团永光电子有限公司（国营第八七三厂） | High-temperature aging reverse bias test device suitable for transistor and field effect transistor |
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