CN109755349A - A kind of mesa extension wavelength indium gallium arsenic detector preparation method of low stress passivation - Google Patents
A kind of mesa extension wavelength indium gallium arsenic detector preparation method of low stress passivation Download PDFInfo
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- CN109755349A CN109755349A CN201910030209.5A CN201910030209A CN109755349A CN 109755349 A CN109755349 A CN 109755349A CN 201910030209 A CN201910030209 A CN 201910030209A CN 109755349 A CN109755349 A CN 109755349A
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- silicon nitride
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Abstract
The invention discloses a kind of mesa extension wavelength indium gallium arsenic detector preparation method of low stress passivation, structures are as follows: in semi-insulating InP substrate, successively grow N+Type layer of InP, the N of content gradually variational+Type InxAl1‑xAs buffer layer, InxGa1‑xAs absorbed layer, P+Type InxAl1‑xAs cap layers, silicon nitride SiNxPassivating film, P electrode thicken electrode.Passivating film is that inductively coupled plasma chemical vapour deposition technique grows low stress SiNx passivating film.The present invention has the advantages that the silicon nitride film using low stress is passivated, angularity < 10 μm of large area array detector chip are controlled, the focal plane device of low blind element rate is advantageously implemented；The high reliablity of low stress SiNx passivating film；The surface sides good passivation effect of low stress SiNx passivating film.
Description
Technical field
The present invention relates to the mesa extension wavelengths that the technology of preparing of infrared detector, in particular to a kind of low stress are passivated
Indium gallium arsenic detector preparation method, it is suitable for preparing the platform of large area array, small pixel, high-aspect-ratio, high sensitivity, high reliability
Face type indium gallium arsenic detector.
Background technique
Short-wave infrared indium gallium arsenic detector has the excellent properties such as high detection rate, high-quantum efficiency, nearly working and room temperature, with
Indium component increase when, the cutoff wavelength of extension wavelength indium gallium arsenic detector can extend to 2.5 μm from 1.7 μm, environmental monitoring,
Spectroscopy, night vision etc. extensive application value.With the demand that short-wave infrared imaging technique develops to high-resolution, prolong
Wavelength indium gallium-arsenium coke plane detector is stretched to develop to extensive, small pixel, highly sensitive direction, for 1280 × 1024 yuan and
More massive face battle array device needs to develop high performance big to guarantee the inverse bonding connected ratio of photosensor chip and reading circuit
Scale, small pixel, high-aspect-ratio extension wavelength indium gallium-arsenium coke plane detector process of preparing.
The cross-section structure of mesa extension wavelength indium gallium arsenic detector is as shown in Fig. 1, it is by semi-insulating InP substrate 1, N+
The N of type layer of InP 2, content gradually variational+Type InxAl1-xAs buffer layer 3, InxGa1-xAs absorbed layer 4, P+Type InxAl1-xAs cap layers 5, nitrogen
SiClx SiNxPassivating film 6, P electrode 7 thicken the composition of electrode 8.Currently, the technique of mesa indium gallium arsenic detector mainly include with
Lower key step:
Step 1. is in extension on piece deposition-etch exposure mask；
Step 2. forms table top by the method that dry etching and wet etching combine；
Step 3. removes remaining silicon nitride mask by wet etching；
Step 4. opens N slot in extension on piece by wet etching；
Step 5. is in P hole surface electron beam evaporation growth Ti/Pt/Au as P electrode；
Step 6. is in device surface deposit silicon nitride passivating film；
Step 7. opens P, N electrode hole by being dry-etched on epitaxial wafer；
Step 8. is in P electrode and the area N surface, sputter Cr/Au metal film are used as thickening electrode；
Step 9. scribing.
During existing mesa indium gallium-arsenium coke plane detector chip preparing process, it is conventional inductively it is equal from
Daughter chemical vapor deposition deposits growth of passivation film since membrane stress is big, causes the warpage degree of large area array detector chip big,
It is unfavorable for the control of short-wave infrared focal plane inverse bonding process connected ratio；And since membrane stress is big, lead to film poor reliability,
Follow-up heat treatment process easily leads to film surface blistering and falls off, so as to cause large area array detector chip poor reliability.Therefore,
The passivating film for needing to study low stress keeps the angularity of large area array detector chip small, and thin film passivation effect is good and film is reliable
Property it is high.
Summary of the invention
The problem of based on above-mentioned mesa large area array detector chip preparation process, the present invention innovatively proposes
A kind of mesa extension wavelength indium gallium arsenic detector preparation method of low stress passivation, after reducing silicon nitride passive film growth
The warpage degree of large area array detector chip, i.e. membrane stress are low, and film high reliablity, good passivation effect.
A kind of mesa extension wavelength indium gallium arsenic detector preparation method of low stress passivation, structure are as follows: semi-insulating
In InP substrate 1, it is followed successively by N+Type layer of InP 2, the N of content gradually variational+Type InxAl1-xAs buffer layer 3, InxGa1-xAs absorbed layer 4, P+
Type InxAl1-xAs cap layers 5, silicon nitride SiNxPassivating film 6, P electrode 7 thicken electrode 8；Wherein:
One layer of silicon nitride passive film, the silicon nitride are covered in the mesa extension wavelength indium gallium arsenic detector surface
Angularity < 10 μm of passivating film growth front and back large area array detector chip, and silicon nitride passive film high reliablity, passivation effect
It is good.
The present invention is improved on original technology basis.It is carried out in the growth parameter(s) of silicon nitride passive film
It improves, 75 ± 5 DEG C of 750 ± 5W of ICP power, the underlayer temperature of ICPCVD deposited silicon nitride remains unchanged, but SiH4、N2Two kinds of works
The flow and gas pressure intensity of skill gas optimize, and increase pressure, improve gas flow.Steps are as follows for concrete technology flow process:
1 deposit silicon nitride etch mask, is used as etch mask, and using plasma enhances chemical vapor deposition (PECVD)
Deposition techniques with a thickness of 400 ± 20nm silicon nitride.
2 etching table tops, are divided into etch silicon nitride and etching InGaAs epitaxial material forms table top two parts.Using induction coupling
Close plasma (ICP) lithographic technique etch silicon nitride, etching condition are as follows: ICP power is 2000 ± 5W, RF power be 40 ±
5W, temperature are 5 ± 1 DEG C, using SF6Gas etching；Table top is etched using inductively coupled plasma (ICP) lithographic technique, is carved
Erosion condition are as follows: ICP power is 350 ± 5W, RF power is 130 ± 5W, using Cl2Gas and N2Gas is as etching gas；
3 removal silicon nitride masks, corrode 120 ± 5s using buffered hydrofluoric acid solution at room temperature；
4 open N slot, corrode ingaas layer with tartaric acid solution, corrosive liquid volume ratio is weight ratio tartaric acid solution: H2O is
1:1, corrosion rate are 0.5 ± 0.05 μm/min；
5 growth P electrodes, are used as P electrode 7, use electron beam evaporation process deposition thickness for 20 ± 5nm/30 ± 5nm/20
The Ti/Pt/Au of ± 5nm；
6 rapid thermal annealings, annealing conditions are as follows: nitrogen protection atmosphere, annealing temperature are 420 ± 5 DEG C, and temperature hold-time is
40±5s；
7 deposit low temperature silicon nitride passivating films, it is raw using inductively coupled plasma chemical vapor deposition (ICPCVD) technology
The silicon nitride of long 580~600nm is as passivating film 6, growth conditions are as follows: ICP power is 750 ± 5W, using SiH4And N2As work
Skill gas, 75 ± 5 DEG C of underlayer temperature, control chamber pressure is stablized；
8 open P, N electrode hole, identical as the etch silicon nitride in step 2 using process conditions；
9 growths thicken electrode, and growth thickeies electrode, are used as and thicken electrode 8, successively deposit thickness using ion beam sputtering process
Degree is respectively the Cr/Au of 20 ± 5nm/400 ± 20nm；
10 scribings.
The present invention has the advantages that
The silicon nitride passivation membrane stress of 1 preparation is low, by selecting suitable growth conditions, by inductively coupled plasma
Chemical vapor deposition growth goes out the silicon nitride film of low stress, so that angularity < 10 μm of large area array detector chip.
The good passivation effect of the silicon nitride passive film of 2 preparations, effectively reduces the dangling bonds of device surface, so that the table of device
Surface side surface current is effectively inhibited.
The high reliablity of the silicon nitride passive film of 3 preparations, film is in stable condition by high annealing rear surface, and film
Adhesiveness is good, the high reliablity of device in subsequent heat treatment and use process.
Detailed description of the invention
Fig. 1 is the schematic diagram of the section structure of mesa extension wavelength indium gallium arsenic detector chip of the invention；
Fig. 2 is mesa extension wavelength indium gallium arsenic detector chip step of preparation process flow chart of the invention；
In figure:
(1) -- semi-insulating substrate InP substrate；
(2)--N+Type layer of InP；
(3)--N+Type indium aluminium arsenic buffer layer
(4) -- indium gallium arsenic absorbed layer；
(5)--P+Type InP cap layers；
(6) -- silicon nitride SiNxPassivating film；
(7) -- P electrode；
(8) -- thicken electrode；
Specific embodiment
Specific implementation method of the invention is described in detail with reference to the accompanying drawing.
As shown in Fig. 1, epitaxial wafer used in the present embodiment is using molecular beam epitaxy technique, with a thickness of 350 ± 20 μ
In the N-type substrate 1 of m, N is successively grown+Type layer of InP 2, the indium aluminium arsenic buffer layer 3 of content gradually variational, indium gallium arsenic absorbed layer 4, P+Type InP
Cap layers 5.The mesa extension wavelength indium gallium arsenic detector preparation process of the low stress passivation of the present embodiment is in original technique base
On plinth, will deposit passivating film ICPCVD growth conditions keep ICP power be 750 ± 5W, 75 ± 5 DEG C of underlayer temperature it is constant,
Increase SiH4And N2Gas flow, SiH4:N2Ratio increases to 1.15:1, and increase chamber pressure is 15~17mTorr.
The concrete technology flow process of the present embodiment detector photosensor chip preparation are as follows:
Embodiment 1
1 deposit silicon nitride etch mask, is used as etch mask, and using plasma enhances chemical vapor deposition (PECVD)
For deposition techniques with a thickness of the silicon nitride of 400 ± 20nm, RF power is 40 ± 5W, 330 ± 5 DEG C of underlayer temperature, gas flow SiH4:
N2For 1:18；
2 etching table tops, are divided into etch silicon nitride and etching InGaAs epitaxial material forms table top two parts.Using induction coupling
Close plasma (ICP) lithographic technique etch silicon nitride, etching condition are as follows: ICP power is 2000 ± 5W, RF power be 40 ±
5W, using SF6As etching gas；Table top, etching condition are etched using inductively coupled plasma (ICP) lithographic technique are as follows:
ICP power is 350 ± 5W, RF power is 130 ± 5W, using Cl2And N2As etching gas；
3 removal silicon nitride masks corrode 120 ± 5s using buffered hydrofluoric acid solution at room temperature, and corrosive liquid volume ratio is HF:
NH4F:H2O is 3:6:10；
4 open N slot, corrode ingaas layer with tartaric acid solution, corrosive liquid volume ratio is weight ratio tartaric acid solution: H2O is
1:1, corrosion rate are 0.5 ± 0.05 μm/min；
5 growth P electrodes, are used as P electrode 7, use electron beam evaporation process deposition thickness for 20 ± 5nm/30 ± 5nm/20
The Ti/Pt/Au of ± 5nm；
6 rapid thermal annealings, annealing conditions are nitrogen protection atmosphere, and annealing temperature is 420 ± 5 DEG C, and temperature hold-time is
40±5s；
7 deposit low temperature silicon nitride passivating films, it is raw using inductively coupled plasma chemical vapor deposition (ICPCVD) technology
The silicon nitride of long 580nm is as passivating film 6, growth conditions are as follows: ICP power is 750 ± 5W, 75 ± 5 DEG C of underlayer temperature, uses
SiH4And N2As process gas, SiH4:N2For 1.15:1, pressure 15mTorr；
8 open P, N electrode hole, identical as the etch silicon nitride in step 2 using process conditions；
9 growths thicken electrodes, are used as and thicken electrode 8, using ion beam sputtering process successively deposition thickness be respectively 20 ±
The Cr/Au of 5nm/400 ± 20nm；
10 scribings.
Embodiment 2
1 deposit silicon nitride etch mask, is used as etch mask, and using plasma enhances chemical vapor deposition (PECVD)
For deposition techniques with a thickness of the silicon nitride of 400 ± 20nm, RF power is 40 ± 5W, 330 ± 5 DEG C of underlayer temperature, gas flow SiH4:
N2For 1:18；
2 etching table tops, are divided into etch silicon nitride and etching InGaAs epitaxial material forms table top two parts.Using induction coupling
Close plasma (ICP) lithographic technique etch silicon nitride, etching condition are as follows: ICP power is 2000 ± 5W, RF power be 40 ±
5W, using SF6As etching gas；Table top, etching condition are etched using inductively coupled plasma (ICP) lithographic technique are as follows:
ICP power is 350 ± 5W, RF power is 130 ± 5W, using Cl2And N2As etching gas；
3 removal silicon nitride masks corrode 120 ± 5s using buffered hydrofluoric acid solution at room temperature, and corrosive liquid volume ratio is HF:
NH4F:H2O is 3:6:10；
4 open N slot, corrode ingaas layer with tartaric acid solution, corrosive liquid volume ratio is weight ratio tartaric acid solution: H2O is
1:1, corrosion rate are 0.5 ± 0.05 μm/min；
5 growth P electrodes, are used as P electrode 7, use electron beam evaporation process deposition thickness for 20 ± 5nm/30 ± 5nm/20
The Ti/Pt/Au of ± 5nm；
6 rapid thermal annealings, annealing conditions are nitrogen protection atmosphere, and annealing temperature is 420 ± 5 DEG C, and temperature hold-time is
40±5s；
7 deposit low temperature silicon nitride passivating films, it is raw using inductively coupled plasma chemical vapor deposition (ICPCVD) technology
The silicon nitride of long 600nm is as passivating film 6, growth conditions are as follows: ICP power is 750 ± 5W, 75 ± 5 DEG C of underlayer temperature, uses
SiH4And N2As process gas, SiH4:N2For 1.15:1, pressure 16mTorr；
8 open P, N electrode hole, identical as the etch silicon nitride in step 2 using process conditions；
9 growths thicken electrodes, are used as and thicken electrode 8, using ion beam sputtering process successively deposition thickness be respectively 20 ±
The Cr/Au of 5nm/400 ± 20nm；
10 scribings.
Embodiment 3
1 deposit silicon nitride etch mask, is used as etch mask, and using plasma enhances chemical vapor deposition (PECVD)
For deposition techniques with a thickness of the silicon nitride of 400 ± 20nm, RF power is 40 ± 5W, 330 ± 5 DEG C of underlayer temperature, gas flow SiH4:
N2For 1:18；
2 etching table tops, are divided into etch silicon nitride and etching InGaAs epitaxial material forms table top two parts.Using induction coupling
Close plasma (ICP) lithographic technique etch silicon nitride, etching condition are as follows: ICP power is 2000 ± 5W, RF power be 40 ±
5W, using SF6As etching gas；Table top, etching condition are etched using inductively coupled plasma (ICP) lithographic technique are as follows:
ICP power is 350 ± 5W, RF power is 130 ± 5W, using Cl2And N2As etching gas；
3 removal silicon nitride masks corrode 120 ± 5s using buffered hydrofluoric acid solution at room temperature, and corrosive liquid volume ratio is HF:
NH4F:H2O is 3:6:10；
4 open N slot, corrode ingaas layer with tartaric acid solution, corrosive liquid volume ratio is weight ratio tartaric acid solution: H2O is
1:1, corrosion rate are 0.5 ± 0.05 μm/min；
5 growth P electrodes, are used as P electrode 7, use electron beam evaporation process deposition thickness for 20 ± 5nm/30 ± 5nm/20
The Ti/Pt/Au of ± 5nm；
6 rapid thermal annealings, annealing conditions are nitrogen protection atmosphere, and annealing temperature is 420 ± 5 DEG C, and temperature hold-time is
40±5s；
7 deposit low temperature silicon nitride passivating films, it is raw using inductively coupled plasma chemical vapor deposition (ICPCVD) technology
The silicon nitride of long 620nm is as passivating film 6, growth conditions are as follows: ICP power is 750 ± 5W, 75 ± 5 DEG C of underlayer temperature, uses
SiH4And N2As process gas, SiH4:N2For 1.15:1, pressure 17mTorr；
8 open P, N electrode hole, identical as the etch silicon nitride in step 2 using process conditions；
9 growths thicken electrodes, are used as and thicken electrode 8, using ion beam sputtering process successively deposition thickness be respectively 20 ±
The Cr/Au of 5nm/400 ± 20nm；
10 scribings.
Three above embodiment film growth front and back large area array detector chip angularity variation < 10 μm, film
High reliablity, and thin film passivation effect is good.
Claims (1)
1. a kind of mesa extension wavelength indium gallium arsenic detector preparation method of low stress passivation, the panel detector structure are as follows:
On semi-insulating InP substrate (1), it is followed successively by N+Type layer of InP (2), the N of content gradually variational+Type InxAl1-xAs buffer layer (3),
InxGa1-xAs absorbed layer (4), P+Type InxAl1-xAs cap layers (5), silicon nitride SiNxPassivating film (6), P electrode (7) thicken electrode
(8)；The method and step for preparing the detector is as follows: 1) deposit silicon nitride etching is covered on extension wavelength indium gallium arsenic epitaxial material
Film, 2) etching table top, 3) removal silicon nitride mask 4) open N slot, 5) growth P electrode, 6) rapid thermal annealing, 7) deposit silicon nitride is blunt
Change film, 8) open P, N electrode hole, 9) growth thickeies electrode, and 10) scribing；It is characterized by:
Deposit silicon nitride described in step 7) is passivated film method are as follows: uses inductively coupled plasma chemical vapor deposition skill
Art grows the silicon nitride of 580~600nm as passivating film, growth conditions are as follows: ICP power is 750 ± 5W, underlayer temperature 75 ± 5
DEG C, using SiH4、N2For as process gas, SiH4:N2For 1.15:1,15~17mTorr of pressure.
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Cited By (3)
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| CN110444617A (en) * | 2019-08-30 | 2019-11-12 | 武汉敏芯半导体股份有限公司 | A kind of photodetector and its manufacturing method based on InGaAs material |
| CN110444607A (en) * | 2019-07-10 | 2019-11-12 | 中国科学院上海技术物理研究所 | Extensive indium gallium-arsenium coke plane detector and preparation method with stress equilibrium layer |
| CN113013268A (en) * | 2021-01-26 | 2021-06-22 | 中国科学院上海技术物理研究所 | Small-pixel infrared focal plane detector based on super-surface lens |
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Cited By (3)
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| CN110444607A (en) * | 2019-07-10 | 2019-11-12 | 中国科学院上海技术物理研究所 | Extensive indium gallium-arsenium coke plane detector and preparation method with stress equilibrium layer |
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| CN113013268A (en) * | 2021-01-26 | 2021-06-22 | 中国科学院上海技术物理研究所 | Small-pixel infrared focal plane detector based on super-surface lens |
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