CN109742032A - 包括两步包封的制造电子器件的方法和相关器件 - Google Patents

包括两步包封的制造电子器件的方法和相关器件 Download PDF

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CN109742032A
CN109742032A CN201910025993.0A CN201910025993A CN109742032A CN 109742032 A CN109742032 A CN 109742032A CN 201910025993 A CN201910025993 A CN 201910025993A CN 109742032 A CN109742032 A CN 109742032A
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encapsulated layer
bare die
electronic device
encapsulating
grid matrix
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CN109742032B (zh
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K-Y·吴
Y·马
张学仁
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STMicroelectronics Pte Ltd
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Abstract

本公开涉及包括两步包封的制造电子器件的方法和相关器件。例如，一种制造电子器件的方法可以包括将集成电路(IC)裸片定位于格栅阵列衬底的上表面上并且用多条键合接线将该IC裸片的多个对应的键合焊盘耦接至该格栅阵列，该格栅阵列衬底在其下表面上具有多个连接。该方法还可以包括在该IC裸片和这些键合接线之上形成第一包封层并且在形成该第一包封层之后将散热器定位在该衬底上在该第一包封层上方。该方法可以进一步包括在该第一包封层之上形成第二包封层并且将该散热器嵌入在该第二包封层中。

Description

包括两步包封的制造电子器件的方法和相关器件
本申请是申请日为2015年09月29日、申请号为201510634614.X、发明名称为“包括两步包封的制造电子器件的方法和相关器件”的中国发明专利申请的分案申请。
技术领域
本发明涉及电子器件，并且更具体地涉及制造包括集成电路的电子器件的方法以及相关器件。
背景技术
随着电子器件变得相对较小，封装可能变得让人特别感兴趣。例如，低k夹层电介质(ILD)材料可以用于代替例如SiO2ILD以减小互连延迟。
将低K ILD材料引入到硅中可能对高接线密度封装施加新的挑战。具体地，低k互连中固有的弱粘合使得硅更易发生通常可以称为ILD开裂或分层的故障。ILD开裂或分层引起电子器件的故障，例如，故障经常发生在温度循环试验期间。由特伦(Tran)等人在EPTC2010中发表的题为“带有温度增强的球栅阵列(TE-PBGA)的低k硅中的封装挑战(PackagingChallenges in Low-k Silicon with Thermally Enhanced Ball Grid Array(TE-PBGA))”的技术论文突出强调了低K ILD材料的问题。
如在特伦等人的技术论文中所描述的，已经确定了低k故障的一个原因是模具复合填充物在与模具浇口相对的裸片拐角中的不均匀分布。插入的散热器在传递模塑过程期间阻碍了模具复合物流动，这导致了在此拐角中更大的填充物损失。
发明内容
一种制造电子器件的方法可以包括将集成电路(IC)裸片定位于在其下表面上具有多个连接的格栅阵列衬底的上表面上并且用多条键合接线将该IC裸片的多个对应的键合焊盘耦接至该格栅阵列。该方法还可以包括在该IC裸片和这些键合接线之上形成第一包封层并且在形成该第一包封层之后将散热器定位在该衬底上在该第一包封层上方。该方法可以进一步包括在该第一包封层之上形成第二包封层并且将该散热器嵌入在该第二包封层中。因而，该方法可以减少电子器件的故障，例如通过可以减少ILD开裂和分层的两步包封。
例如，该IC裸片可以是矩形形状的。形成该第一包封层可以包括将该第一包封层形成为延伸跨过并且覆盖在该矩形形状的IC裸片的每个拐角。
该第一和第二包封层可以各自包括相同的包封材料。在其他实施例中，该第一和第二包封层可以各自包括不同的包封材料。该IC裸片可以包括低k夹层电介质。
例如，形成该第一包封层可以包括将第一模具定位至该格栅阵列衬底上、用第一包封材料填充该第一模具、固化该第一包封材料、以及移除该第一模具。形成该第二包封层可以包括将第二模具定位至该格栅阵列衬底上、用第二包封材料填充该第二模具、固化该第二包封材料、以及移除该第二模具。例如，形成该第一包封层可以包括在该IC之上施加包封材料本体、以及固化该包封材料本体。
器件方面涉及一种可以包括格栅阵列衬底和集成电路(IC)裸片的电子器件，该格栅阵列衬底在其下表面上具有多个连接，该集成电路裸片在该格栅阵列衬底的上表面上并且具有多个键合焊盘。该电子器件还可以包括分别将这些键合焊盘耦接至该格栅阵列的多条键合接线、在该IC裸片和这些键合接线之上的具有第一包封材料的第一包封层、以及由该格栅阵列衬底承载于该第一包封层上方并且与该第一包封层间隔开的散热器。该电子器件可以进一步包括第二包封层，该第二包封层在该第一包封层之上具有不同于该第一包封材料的第二包封材料并且将该散热器嵌入在该第二包封层中。
附图说明
图1a至图1i是在根据一个实施例的制造电子器件的方法制造电子器件时该电子器件的示意性截面视图。
图2a至图2g是在根据另一个实施例的制造电子器件的方法制造电子器件时该电子器件的示意性截面视图。
图3是根据一个实施例的电子器件的透视剖切视图。
具体实施方式
现在下文将参照这些附图对本发明进行更全面地描述，在附图中示出了本发明的优选实施例。然而，本发明可以用许多不同的形式体现，并且不应当被解释为受到在此所列出的实施例的限制。相反，提供这些实施例以便本披露将是彻底和完整的，并且将向本领域技术人员充分地传达本发明的范围。贯穿全文相似的数字指代相似的元件，并且上撇号符号用于指示在替代实施例中的类似元件。
最初参考图1a至图1i，描述了一种制造电子器件20的方法。该方法包括将集成电路(IC)裸片21定位在格栅阵列衬底22的上表面23上。IC裸片21可以包括低k夹层电介质28并且说明性地具有矩形形状(图1a)。当然，IC裸片21可以具有相同或不同材料的其他和/或附加夹层，并且还可以具有不同的形状。
格栅阵列衬底22在其下表面24上具有多个连接25。格栅阵列衬底22说明性地是球栅阵列(BGA)衬底，并且更具体地是塑料球栅阵列衬底(PBGA)。当然，如本领域技术人员将认识到的那样，格栅阵列衬底22可以是另一种类型的衬底。
该方法包括用多条键合接线27将该IC裸片21的多个对应的键合焊盘26耦接至该格栅阵列衬底22(图1b)。该方法还包括在该IC裸片21和这些键合接线27之上形成第一包封层30。将该第一包封层30形成为延伸跨过并覆盖该矩形形状的IC裸片21的每个拐角。
为了形成该第一包封层30，将第一模具31定位至该格栅阵列衬底22上(图1c)。用第一包封材料32填充该第一模具31并且对其进行固化(图1d)。然后，移除第一模具31(图1e)。第一包封材料32说明性地不延伸至该格栅阵列衬底22的末端。
该方法进一步包括在形成该第一包封层之后将散热器51定位在格栅阵列衬底22上，该散热器在该第一包封层30上方并且与其间隔开(图1f)。例如，散热器51可以是铜，并且说明性地被定位成使得被暴露于电子器件20的上表面上。
在定位散热器51之后，该方法进一步包括在该第一包封层30之上形成第二包封层40并且将散热器51嵌入在该第二包封层中。第二包封层40是通过将第二模具41定位至该格栅阵列衬底22上(图1g)、用第二包封材料42填充该第二模具并且固化该第二包封材料(图1h)、并且移除该第二模具(图1i)形成的。该第一和第二包封材料可以各自是相同的材料。在某些实施例中，该第一和第二包封材料可以是不同的材料。
现在参考图2a至图2g，在另一个实施例中，第一包封层30'是通过在IC裸片21'之上施加第一包封材料主体55'形成的。例如，该第一包封材料主体55'(图2c)是球顶材料。更具体地，该第一包封材料主体55'可以是低模量球顶树脂，该树脂可以是热固性树脂或热塑性树脂。换言之，不使用模具。如本领域技术人员将认识到的那样，低模量球顶树脂例如可以有利地为板上芯片技术提供相对低成本的封装手段。
应指出的是，尽管没有进行具体描述，对应于图2a至图2b的这些方法步骤类似于关于图1a至图1b所描述的那些方法步骤。允许对该第一包封材料主体55'进行固化。
类似于上文所描述的实施例，并且具体地关于图1f，本实施例的方法进一步包括在形成该第一包封层之后将散热器51'定位在格栅阵列衬底22'上，该散热器在该第一包封层30'上方并且与其间隔开(图2d)。
在定位散热器51'之后，该方法进一步包括在该第一包封层30'之上形成第二包封层40'并且将散热器51'嵌入在该第二包封层中。第二包封层40'是通过将第二模具41'定位至该格栅阵列衬底22'上(图2e)、用第二包封材料填充该第二模具并且固化该第二包封材料(图2f)、并且移除该第二模具(图2g)形成的。当然，在某些实施例中，可以用第二包封材料主体(例如，球顶材料)来替代第二模具和第二包封材料。
的确，如本领域技术人员将认识到的那样，第一和第二包封层的形成有利地可以提供包封材料在裸片的与模具浇口相对的那些拐角中的更均匀分布。在现有技术包封方法中，散热器通常在传递模塑过程期间阻碍了包封材料的流动，这导致了在此拐角中更大的包封材料损失。形成第一和第二包封层的两步方法可以提供在裸片的拐角中的减少的损失，并且可以因此减少故障。
现在另外参考图3，器件方面涉及一种包括格栅阵列衬底22和IC裸片21的电子器件20，该格栅阵列衬底在其下表面24上具有多个连接25，该IC裸片在上表面23上并且具有多个键合焊盘26。该电子器件20还包括分别将这些键合焊盘26耦接至该格栅阵列衬底22的多条键合接线27、以及在该IC裸片21和这些键合接线27之上的具有第一包封材料的第一包封层30。散热器51由该格栅阵列衬底22承载于该第一包封层30上方并且与该第一包封层间隔开。具有不同于该第一包封材料的第二包封材料的第二包封层40在该第一包封层30之上并且将该散热器51嵌入在该第二包封层中。
受益于前述描述和相关附图中所呈现的教导的本领域技术人员将意识到本发明的很多修改和其他实施例。因此，应当理解本发明不限于所披露的具体实施例，并且那些修改及实施例旨在被包括于所附权利要求书的范围内。

Claims (4)

1.一种制造电子器件的方法，所述方法包括：
将集成电路(IC)裸片定位在格栅阵列衬底的上表面上，所述格栅阵列衬底在其下表面上具有多个连接；
用键合接线将所述IC裸片的相应的键合焊盘耦接至所述格栅阵列衬底；
在所述IC裸片和所述键合接线之上形成第一包封层；
在形成所述第一包封层之后将散热器定位在所述衬底上，位于所述第一包封层上方；以及
在所述第一包封层之上形成第二包封层并且将所述散热器嵌入在所述第二包封层中。
2.根据权利要求1所述的方法，其中所述IC裸片是矩形形状的，并且其中，形成所述第一包封层包括将所述第一包封层形成为延伸跨过并且覆盖所述矩形形状的IC裸片的每个拐角。
3.根据权利要求1所述的方法，其中所述IC裸片包括低k夹层电介质。
4.根据权利要求1所述的方法，其中形成所述第一包封层包括在所述IC之上施加包封材料本体，以及固化所述包封材料本体。
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