CN109728807A - A kind of sender unit synchronous with alternating current - Google Patents
A kind of sender unit synchronous with alternating current Download PDFInfo
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- CN109728807A CN109728807A CN201811653602.1A CN201811653602A CN109728807A CN 109728807 A CN109728807 A CN 109728807A CN 201811653602 A CN201811653602 A CN 201811653602A CN 109728807 A CN109728807 A CN 109728807A
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Abstract
The invention discloses a kind of synchronous sender units of the and alternating current of electronic information technical field, including phase discriminator, the phase discriminator is by FLASH look-up table means, three D/A conversion modules be added/integration module composition, the input terminal of the output end of the FLASH look-up table means and three D/A conversion modules is electrically connected, the output end of the frequency divider and the input terminal of FLASH look-up table means are electrically connected, pass through the phase discriminator installed on device, low-pass filter, the combination of the devices such as voltage controlled oscillator and frequency divider, connection relationship between and its, it can be in the case where not reducing the frequency stability of oscillator, increase the following range of frequency, to improve the Stability and dependability of entire loop work, improve alternating current net synchronization capability, economic and practical is stronger.
Description
Technical field
The present invention relates to electronic information technical field, specially a kind of sender unit synchronous with alternating current.
Background technique
Phaselocked loop (Phase Lock Loop, abbreviation PLL) is to complete the synchronous automatic control system of two electrical signal phases
System, is able to achieve the tracking to frequency input signal and phase.It is no frequency-deviation regulation and control system, uses second-order loop can be with
Steady track without phase error is realized to mains frequency, when stable state can eliminate synchronous error.The characteristics of phaselocked loop, is: utilizing
The frequency and phase of externally input reference signal control loop internal oscillation signal.Because output signal frequency may be implemented in phaselocked loop
Rate automatically tracks frequency input signal, so phaselocked loop is commonly used in Closed loop track circuit.Process of the phaselocked loop in work
In, when the frequency of output signal is equal with the frequency of input signal, phase difference that output voltage and input voltage are kept fixed
Value, the i.e. phase of output voltage and input voltage are lockable, and here it is the origin of phaselocked loop title.
So-called digital PLL, just refer to using with the PLL of digital display circuit, that is to say, that the modules in digital PLL are all
It is a digital circuit with digital device come what is realized.The advantages of digital phase-locked loop is that circuit is most simple and effective, be can be used not
There is voltage-controlled crystal oscillator, reduce costs, improves the stability of crystal oscillator.But a disadvantage is that as analog phase-locked look, once it loses
Go reference frequency output frequency that can generate shake, frequency difference is bigger, shake can more be greater than it is close, be unfavorable for the application of certain occasions, and
The synchronous sender unit of the alternating current made based on such mode only in the case where reducing the frequency stability of oscillator,
The following range of frequency can just increased.
Summary of the invention
The purpose of the present invention is to provide a kind of sender units synchronous with alternating current, to solve in above-mentioned background technique
The Digital Phase-Locked Loop Technology of proposition when in use cannot be in the case where not reducing oscillator frequency stabilizing degree to the tracking of frequency
The problem of range increases.
To achieve the above object, the invention provides the following technical scheme: a kind of sender unit synchronous with alternating current, packet
Include including phase discriminator, the phase discriminator by FLASH look-up table means, three D/A conversion modules be added/integration module forms,
The input terminal of the output end of the FLASH look-up table means and three D/A conversion modules is electrically connected, three D/A conversions
The output end of module be added/input terminal of integration module is electrically connected, the output end of the addition/integration module is electrically connected
There is low-pass filter, the output end of the low-pass filter is electrically connected with voltage controlled oscillator, the output of the voltage controlled oscillator
End is electrically connected with frequency divider, and the output end of the frequency divider and the input terminal of FLASH look-up table means are electrically connected.
Preferably, the location mode of sine wave is folded with power frequency sine wave and DC quantity in the FLASH look-up table means
The form storage added, and the frequency range of power frequency is between 45Hz-55Hz.
Preferably, the message switching mode of the D/A conversion module is four-quadrant multiplication formula.
Preferably, the mode signal output of the phase discriminator is using the superposition output of three-phase phase demodulation.
Compared with prior art, the beneficial effects of the present invention are: passing through a kind of sender unit synchronous with alternating current
Setting, reasonable in design, external alternating current generates input signal from phase discriminator, while closed ring set makes to generate from frequency divider
Feedback signal be compared generation error voltage with input signal, the radio-frequency component in error voltage is low pass filtering device filter
It removes, forms control voltage.Under control voltage effect, the frequency and phase of voltage controlled oscillator move closer to loop input signal
Frequency and phase, if the frequency of voltage controlled oscillator can change to it is identical as frequency input signal, in the case where meeting stability condition,
It will settle out, reach after stablizing, the frequency difference between input signal and voltage controlled oscillator output signal is on this frequency
Zero, difference no longer changes over time, and error voltage is a fixed value, and at this moment loop enters " locking " state.After locking, pressure
Control oscillator can make the frequency shift of the frequency following input signal of output signal, and input is synchronous with output signal holding, make whole
A loop is in stable state always, while improving the following range to frequency.
Detailed description of the invention
Fig. 1 is schematic structural view of the invention;
Fig. 2 is principle of the invention figure structure schematic representation.
In figure: 1 phase discriminator, 11FLASH look-up table means, 12D/A conversion module, 13 additions/integration module, 2 low pass filtereds
Wave device, 3 voltage controlled oscillators, 4 frequency dividers.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
The invention provides the following technical scheme: a kind of sender unit synchronous with alternating current, for mention it is high-frequency with
Track range, the operation for keeping entire loop stable, referring to Fig. 1, including phase discriminator 1, phase discriminator 1 is for by input signal
Phase difference between feedback signal is converted into error voltage output, usually can be using analog multiplier or XOR gate come complete
At the mode signal output of, phase discriminator 1 using the superposition output of three-phase phase demodulation, when phase shortage, can still be worked normally, referring to Fig. 2, mirror
Phase device 1 by 11, three D/A conversion modules 12 of FLASH look-up table means be added/integration module 13 forms, FLASH look-up table mould
The location mode of sine wave is the form storage being superimposed with power frequency sine wave and DC quantity in block 11, and the frequency range of power frequency is
Between 45Hz-55Hz, the message switching mode of D/A conversion module 12 is four-quadrant multiplication formula, FLASH look-up table means 11 it is defeated
Outlet and the input terminal of three D/A conversion modules 12 are electrically connected, the output end of three D/A conversion modules 12 be added/integral
The input terminal of module 13 is electrically connected, and the output end of addition/integration module 13 is electrically connected with low-pass filter 2, to filter out
The higher hamonic wave and noise that phase discriminator 1 exports increase the stability of system to guarantee performance required by loop, and allow useful
Signal passes through, and the output end of low-pass filter 2 is electrically connected with voltage controlled oscillator 3, refers to that its frequency of oscillation can be by outer
The oscillator of making alive control, the output end of voltage controlled oscillator 3 are electrically connected with frequency divider 4, for exporting to voltage controlled oscillator 3
High-frequency signal carry out frequency dividing generate feedback signal, be then compared with the frequency of input signal, with realize to input signal
The frequency-tracking without phase error, the input terminal of the output end of frequency divider 4 and FLASH look-up table means 11 is electrically connected.
In the specific use process, external alternating current generates input signal from phase discriminator 1, while closed ring set makes from frequency dividing
The feedback signal that device 4 generates is compared generation error voltage with input signal, radio-frequency component in error voltage (including noise
In radio-frequency component) be low pass filtering device 2 and filter out, form control voltage.Under control voltage effect, the frequency of voltage controlled oscillator 3
Rate and phase move closer to the frequency and phase of loop input signal, if the frequency of voltage controlled oscillator 3 can be changed to and be inputted
Signal frequency is identical, in the case where meeting stability condition, will settle out on this frequency, reaches after stablizing, input signal
Frequency difference between 3 output signal of voltage controlled oscillator is zero, and difference no longer changes over time, and error voltage is a fixed value, this
Shi Huanlu enters " locking " state.After locking, voltage controlled oscillator 3 can make the frequency of the frequency following input signal of output signal
Rate changes, and inputs synchronous with output signal holding, entire loop is made to be in stable state always, at the same raising to frequency with
Track range.
It although an embodiment of the present invention has been shown and described, for the ordinary skill in the art, can be with
A variety of variations, modification, replacement can be carried out to these embodiments without departing from the principles and spirit of the present invention by understanding
And modification, the scope of the present invention is defined by the appended.
Claims (4)
1. a kind of sender unit synchronous with alternating current, it is characterised in that: including phase discriminator (1), the phase discriminator (1) by
FLASH look-up table means (11), three D/A conversion modules (12) are searched with/integration module (13) composition, the FLASH is added
The output end of table module (11) and the input terminal of three D/A conversion modules (12) are electrically connected, three D/A conversion modules
(12) output end be added/input terminal of integration module (13) is electrically connected, the output end of the addition/integration module (13)
It is electrically connected with low-pass filter (2), the output end of the low-pass filter (2) is electrically connected with voltage controlled oscillator (3), described
The output end of voltage controlled oscillator (3) is electrically connected with frequency divider (4), the output end and FLASH look-up table mould of the frequency divider (4)
The input terminal of block (11) is electrically connected.
2. a kind of sender unit synchronous with alternating current according to claim 1, it is characterised in that: the FLASH is looked into
The location mode for looking for sine wave in table module (11) is the form storage being superimposed with power frequency sine wave and DC quantity, and the frequency of power frequency
Rate range is between 45Hz-55Hz.
3. a kind of sender unit synchronous with alternating current according to claim 1, it is characterised in that: the D/A conversion
The message switching mode of module (12) is four-quadrant multiplication formula.
4. a kind of sender unit synchronous with alternating current according to claim 1, it is characterised in that: the phase discriminator
(1) mode signal output is using the superposition output of three-phase phase demodulation.
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CN201811653602.1A CN109728807A (en) | 2018-12-29 | 2018-12-29 | A kind of sender unit synchronous with alternating current |
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CN201811653602.1A CN109728807A (en) | 2018-12-29 | 2018-12-29 | A kind of sender unit synchronous with alternating current |
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1409490A (en) * | 2001-09-30 | 2003-04-09 | 深圳市中兴通讯股份有限公司上海第二研究所 | Shake-removing circuit based on digital lock phase loop |
US20080049884A1 (en) * | 2006-08-24 | 2008-02-28 | Samsung Electronics Co., Ltd. | Linear phase detector and clock/data recovery circuit thereof |
US20090224842A1 (en) * | 2008-03-05 | 2009-09-10 | Tse-Hsien Yeh | Phase lock loop apparatus |
CN102983858A (en) * | 2012-11-29 | 2013-03-20 | 深圳市晶福源电子技术有限公司 | Phase-locked loop and phase-locking method thereof |
-
2018
- 2018-12-29 CN CN201811653602.1A patent/CN109728807A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1409490A (en) * | 2001-09-30 | 2003-04-09 | 深圳市中兴通讯股份有限公司上海第二研究所 | Shake-removing circuit based on digital lock phase loop |
US20080049884A1 (en) * | 2006-08-24 | 2008-02-28 | Samsung Electronics Co., Ltd. | Linear phase detector and clock/data recovery circuit thereof |
US20090224842A1 (en) * | 2008-03-05 | 2009-09-10 | Tse-Hsien Yeh | Phase lock loop apparatus |
CN102983858A (en) * | 2012-11-29 | 2013-03-20 | 深圳市晶福源电子技术有限公司 | Phase-locked loop and phase-locking method thereof |
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Effective date of registration: 20201207 Address after: 102, No.2, big data R & D center, Hebei Industrial Zone, Hualian community, Longhua street, Longhua District, Shenzhen City, Guangdong Province Applicant after: Shenzhen shuangfengqiao Technology Co.,Ltd. Address before: 518000 Industrial Building of Huafu Street, Futian District, Shenzhen City, Guangdong Province Applicant before: SHENZHEN YUHONGTU ELECTRIC Co.,Ltd. |
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Application publication date: 20190507 |