CN109687738B - Circuit structure for realizing series connection prevention function of bridge circuit - Google Patents
Circuit structure for realizing series connection prevention function of bridge circuit Download PDFInfo
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- CN109687738B CN109687738B CN201811632948.3A CN201811632948A CN109687738B CN 109687738 B CN109687738 B CN 109687738B CN 201811632948 A CN201811632948 A CN 201811632948A CN 109687738 B CN109687738 B CN 109687738B
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- pmos
- nmos
- field effect
- effect transistor
- bridge circuit
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M7/219—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
Abstract
The invention relates to a circuit structure for realizing a series connection prevention function of a bridge circuit, which comprises a bridge circuit module, a bridge circuit module and a control module, wherein the bridge circuit module is used for controlling the output of a circuit; and the alternating current feedback path functional circuit module is connected with the bridge circuit module and is used for feeding back the output change of the bridge circuit and controlling the bridge circuit. By adopting the circuit structure for realizing the anti-series-connection function of the bridge circuit, the problem of series connection caused by output change coupling of the PMOS0 and the NMOS0 is avoided, alternating current feedback can be automatically carried out no matter the switching speed of the bridge circuit is high or low, and the risk of series connection of the bridge circuit is avoided.
Description
Technical Field
The invention relates to the field of circuit control, in particular to bridge circuit control, and particularly relates to a circuit structure for realizing a series connection prevention function of a bridge circuit.
Background
As shown in fig. 1, when the PMOS0 is switched off from on and the NMOS0 is switched on from off, the output OUT of the bridge circuit is rapidly changed from high level to low level, and since a gate (G) and a drain (D) of the PMOS0 and a gate (G) and a source (S) of the PMOS0 are parasitic capacitors CGDP and CGSP respectively, the CGDP and CGSP divide the voltage of the change of the output and apply the divided voltage to the gate (G) of the PMOS0, which easily causes the PMOS0 to be turned on again, thereby causing the PMOS0 and the NMOS0 to be connected in series; similarly, when the NMOS0 is switched off from on and the PMOS0 is switched on from off, the output OUT of the bridge circuit is rapidly changed from low level to high level, and since a capacitor is respectively parasitic on the gate (G) and the drain (D) of the NMOS0 and the gate (G) and the source (S) of the NMOS0, the CGDN and the CGSN divide the voltage of the change of the output and apply the divided voltage to the gate (G) of the NMOS0, which easily causes the NMOS0 to be turned on for the second time, thereby causing the PMOS0 and the NMOS0 to be connected in series; and this problem becomes more and more severe as the switching speed increases. Fig. 2 shows the signal change of each key node at the instant when the crosstalk occurs (shaded portion).
The circuit structure of the invention perfectly solves the problem, and the bridge circuit can automatically carry out alternating current feedback no matter the switching speed of the bridge circuit is high or low, thereby avoiding the risk of the bridge circuit from being connected in series.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a circuit structure which has low cost, simple and convenient operation and wider application range and realizes the series connection prevention function of a bridge circuit.
In order to achieve the above object, the circuit structure of the present invention for realizing the series-connection prevention function of the bridge circuit is as follows:
this realize circuit structure of bridge circuit anti-series connection function, its key feature is, circuit structure include:
the bridge circuit module is used for controlling the output of the circuit;
and the alternating current feedback path functional circuit module is connected with the bridge circuit module and is used for feeding back the output change of the bridge circuit and controlling the bridge circuit.
Preferably, the bridge circuit module includes a first PMOS field effect transistor and a first NMOS field effect transistor, and the first PMOS field effect transistor and the first NMOS field effect transistor are connected in series between the power supply and the ground.
Preferably, the ac feedback path functional circuit module includes:
the first alternating current feedback path module is connected with the first PMOS field effect transistor and used for feeding back the change output by the bridge circuit module;
and the second alternating current feedback path module is connected with the first NMOS field effect transistor and is used for feeding back the change output by the bridge circuit module.
Preferably, the first ac feedback path module includes a first capacitor, a first resistor, and a second PMOS fet;
the first resistor and the first capacitor are connected in series between a power supply and a source electrode of the first PMOS field effect transistor;
the drain electrode and the grid electrode of the second PMOS field effect transistor are respectively connected with two ends of the first resistor;
the source electrode of the second PMOS field effect transistor is connected with the grid electrode of the first PMOS field effect transistor;
the first capacitor is used for pulling down and opening the grid electrode of the second PMOS field effect transistor through the change of CP coupling OUT when the first PMOS field effect transistor is switched off and the first NMOS field effect transistor is switched on, so that the grid electrode of the first PMOS field effect transistor is pulled, and the bridge circuit series connection state formed by the secondary opening of the first PMOS field effect transistor due to output coupling is avoided.
Preferably, the second ac feedback path module includes a second capacitor, a second resistor, and a second NMOS fet;
the second capacitor and the second resistor are sequentially connected between the drain electrode of the first NMOS field effect transistor and the ground in series;
the drain electrode and the grid electrode of the second NMOS field effect transistor are respectively connected with two ends of the second resistor;
the drain electrode of the second NMOS field effect transistor is connected with the source electrode of the first NMOS field effect transistor;
the second capacitor is used for pulling up and opening the grid electrode of the second NMOS field effect transistor through the change of CN coupling OUT when the first PMOS field effect transistor is started and the first NMOS field effect transistor is turned off, so that the grid electrode of the first NMOS field effect transistor is pulled, and the bridge circuit series connection state formed by the secondary opening of the first NMOS field effect transistor due to output coupling is avoided.
Preferably, the bridge circuit module includes a switch control unit, which is connected to both the bridge circuit module and is configured to control the switches of the first PMOS fet and the first NMOS fet in the bridge circuit module.
Preferably, the first PMOS fet and the first NMOS fet in the bridge circuit module are alternately turned on and off, and the states of the first PMOS fet and the first NMOS fet are different.
Preferably, the circuit structure adjusts the feedback quantity by adjusting parameters of the CP unit, the second PMOS fet, the CN unit, and the second NMOS fet.
Preferably, the circuit structure further includes a first clamping diode and a second clamping diode, the first clamping diode is connected to the second PMOS fet, and the second clamping diode is connected to the second NMOS fet, for protecting the safety of the switching tube during high voltage application.
By adopting the circuit structure for realizing the anti-series-connection function of the bridge circuit, the problem of series connection caused by output change coupling of the PMOS0 and the NMOS0 is avoided, alternating current feedback can be automatically carried out no matter the switching speed of the bridge circuit is high or low, and the risk of series connection of the bridge circuit is avoided.
Drawings
FIG. 1 is a schematic diagram of parasitic capacitance of a bridge circuit.
Fig. 2 is a diagram illustrating signal changes at each key node at the moment when crosstalk occurs due to parasitic capacitance coupling output changes.
Fig. 3 is a circuit structure diagram of a circuit structure for implementing the anti-series function of the bridge circuit according to the present invention.
Fig. 4 is a schematic diagram of a circuit structure and a parasitic capacitance of the circuit structure for implementing the anti-series function of the bridge circuit according to the present invention.
Fig. 5 is a circuit diagram of an embodiment of adding a clamping diode to a circuit structure for realizing a series-pass prevention function of a bridge circuit according to the invention.
Reference numerals:
PMOS0 first PMOS FET
NMOS0 first NMOS field effect transistor
CP first capacitance
RP first resistance
PMOS1 second PMOS FET
CN second capacitance
RN second resistance
NMOS1 second NMOS field effect transistor
Detailed Description
In order to more clearly describe the technical contents of the present invention, the following further description is given in conjunction with specific embodiments.
This realize circuit structure of bridge circuit anti-series connection function, wherein, circuit structure include:
the bridge circuit module is used for controlling the output of the circuit;
and the alternating current feedback path functional circuit module is connected with the bridge circuit module and is used for feeding back the output change of the bridge circuit and controlling the bridge circuit.
As a preferred embodiment of the present invention, the bridge circuit module includes a first PMOS fet PMOS0 and a first NMOS fet NMOS0, the drain of the first PMOS fet PMOS0 is connected to the power supply, the source of the first PMOS fet is connected to the drain of the first NMOS fet, and the source of the first NMOS fet is connected to the ground.
As a preferred embodiment of the present invention, the ac feedback path module set includes:
the first alternating current feedback path module is connected with the first PMOS field effect transistor PMOS0 and is used for feeding back the change of the output of the bridge circuit module;
and the second alternating current feedback path module is connected with the NMOS0 of the first NMOS field effect transistor and is used for feeding back the change of the output of the bridge circuit module.
As a preferred embodiment of the present invention, the first ac feedback path module includes a first capacitor CP, a first resistor RP, and a second PMOS fet PMOS 1;
the first resistor RP and the first capacitor CP are connected in series between a power supply and a source electrode of the first PMOS field effect transistor PMOS 0;
the drain and the gate of the second PMOS field effect transistor PMOS1 are respectively connected to two ends of the first resistor RP;
the source electrode of the second PMOS field effect transistor PMOS1 is connected with the grid electrode of the first PMOS field effect transistor PMOS 0;
the first capacitor CP is used for pulling down and opening the grid electrode of the second PMOS field effect transistor PMOS1 through the change of CP coupling OUT when the first PMOS field effect transistor PMOS0 is turned off and the first NMOS field effect transistor NMOS0 is turned on, so that the grid electrode of the first PMOS field effect transistor PMOS0 is pulled, a bridge circuit series-connection state formed by the second opening of the first PMOS field effect transistor PMOS0 due to output coupling is avoided, and the problem of bridge circuit series-connection is solved.
As a preferred embodiment of the present invention, the second ac feedback path module includes a second capacitor CN, a second resistor RN, and a second NMOS field effect transistor NMOS 1;
the second capacitor CN and the second resistor RN are sequentially connected in series between the source of the first NMOS field effect transistor NMOS0 and ground;
the drain and the gate of the second NMOS field effect transistor NMOS1 are connected to two ends of the second resistor RN respectively;
the drain electrode of the second NMOS field effect transistor NMOS1 is connected with the source electrode of the first NMOS field effect transistor PMOS 0;
the second capacitor CN is used for pulling up and opening the grid electrode of the second NMOS field effect transistor NMOS1 through the change of CN coupling OUT when the first PMOS field effect transistor PMOS0 is started and the first NMOS field effect transistor NMOS0 is turned off, so that the grid electrode of the first NMOS field effect transistor NMOS0 is pulled, a bridge circuit series-connection state formed by the fact that the first NMOS field effect transistor NMOS0 is opened for the second time due to output coupling is avoided, and the problem of series-connection of the bridge circuit is solved.
As a preferred embodiment of the present invention, the bridge circuit module includes a switch control unit, which is connected to both the bridge circuit module and is used for controlling the switches of the first PMOS fet PMOS0 and the first NMOS fet NMOS0 in the bridge circuit module.
In a preferred embodiment of the present invention, the first PMOS fet PMOS0 and the first NMOS fet NMOS0 in the bridge circuit module are alternately turned on and off, and the states of the first PMOS fet PMOS0 and the first NMOS fet NMOS0 are different.
In a preferred embodiment of the present invention, the circuit structure adjusts the feedback amount by adjusting parameters of the CP unit, the second PMOS fet PMOS1, the CN unit, and the second NMOS fet NMOS 1.
As a preferred embodiment of the present invention, the circuit structure further includes a first clamping diode and a second clamping diode, the first clamping diode is connected to the second PMOS fet PMOS1, and the second clamping diode is connected to the second NMOS fet NMOS1, so as to protect the safety of the switching tube during high voltage application.
In the specific implementation mode of the invention, a circuit structure for preventing a bridge circuit from being connected in series is disclosed. The circuit structure of the invention comprises a bridge circuit and an alternating current feedback path for carrying out feedback by utilizing the output change of the bridge circuit.
The bridge circuit is particularly a PMOS + NMOS structure; the feedback quantity of the AC feedback path in which feedback is made using the change in the output of the bridge circuit is related to the rate of change of the output of the bridge circuit. At the moment that the NMOS of the bridge circuit is turned off, the feedback path starts to act to pull the grid G of the PMOS, so that the bridge circuit is prevented from being connected in series due to the fact that the PMOS is turned on for the second time; at the moment when the NMOS of the bridge circuit is turned off and the PMOS is turned on, the feedback path starts to act to pull the grid G of the NMOS, so that the bridge circuit is prevented from being connected in series due to the secondary turn-on of the NMOS.
As shown in FIG. 4, the present invention avoids the bridge circuit from cross-connecting during fast switching by introducing an AC feedback path from the output terminal OUT to the switch control terminal of the bridge circuit into the bridge circuit, and an AC feedback control loop composed of CP, RP, PMOS1 and an AC feedback control loop composed of CN, RN, NMOS1 are respectively designed to achieve the above purpose.
The working principle is introduced as follows:
when the PMOS0 is switched from on to off, and the NMOS0 is switched from off to on, the OUT is changed from high level to low level rapidly, at the moment, the CGSP and the CGDP parasitized by the PMOS0 pull the GP downwards, and meanwhile, the CP in the alternating current feedback control loop also pulls the grid G of the PMOS1 downwards, so that the PMOS1 is opened, and the PMOS1 charges the GP, so that the GP is kept not to drop or only slightly drops, and the series connection of the PMOS0 and the NMOS0 is avoided;
similarly, when the NMOS0 is turned off from on, and the PMOS0 is turned on from off, the OUT will be quickly changed from low to high, and at this time, the CGSN and CGDN parasitic to the NMOS0 will pull up the GN, and at the same time, the CN in the ac feedback control loop will pull up the gate G of the NMOS1, so as to turn on the NMOS1, so that the NMOS1 will discharge the GN, thereby keeping the GN from rising or only slightly rising, and avoiding the occurrence of series connection of the PMOS0 and the NMOS 0;
in the process of alternately switching the PMOS0 and the NMOS0, the faster the GP and GN change, the larger the relative feedback quantity of the feedback network is, and the PMOS0 and the NMOS0 can be ensured not to be in series connection when switched at high speed or low speed;
in a practical circuit, parameters of CP, PMOS1 and CN, and NMOS1 can be properly adjusted to adjust the feedback quantity, and a clamping diode can be added to the GS terminals of PMOS1 and NMOS1 for protecting the safety of the switching tube in high-voltage application as shown in fig. 5.
By adopting the circuit structure for realizing the anti-series-connection function of the bridge circuit, the problem of series connection caused by output change coupling of the PMOS0 and the NMOS0 is avoided, alternating current feedback can be automatically carried out no matter the switching speed of the bridge circuit is high or low, and the risk of series connection of the bridge circuit is avoided.
In this specification, the invention has been described with reference to specific embodiments thereof. It will, however, be evident that various modifications and changes may be made thereto without departing from the broader spirit and scope of the invention. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense.
Claims (5)
1. The utility model provides a circuit structure of realization bridge circuit anti-series connection function which characterized in that, circuit structure include:
the bridge circuit module is used for controlling the output of the circuit;
the AC feedback channel functional circuit module is connected with the bridge circuit module and is used for feeding back the output change of the bridge circuit and controlling the bridge circuit;
the bridge circuit module comprises a first PMOS field effect transistor (PMOS 0) and a first NMOS field effect transistor (NMOS 0), wherein the drain electrode of the first PMOS field effect transistor (PMOS 0) is connected with a power supply, the source electrode of the first PMOS field effect transistor (PMOS 0) is connected with the drain electrode of the first NMOS field effect transistor (NMOS 0), and the source electrode of the first NMOS field effect transistor (NMOS 0) is connected with the ground;
the alternating current feedback path functional circuit module comprises:
the first alternating current feedback path module is connected with the first PMOS field effect transistor (PMOS 0) and is used for feeding back the change output by the bridge circuit module and controlling the bridge circuit;
the second alternating current feedback path module is connected with the first NMOS field effect transistor (NMOS 0) and is used for feeding back the change output by the bridge circuit module and controlling the bridge circuit;
wherein, the circuit structure further comprises one of the following three structures:
the structure I is as follows: the first alternating current feedback path module comprises the following circuit structure:
the first alternating current feedback path module comprises a first Capacitor (CP), a first Resistor (RP) and a second PMOS field effect transistor (PMOS 1);
the first Resistor (RP) and the first Capacitor (CP) are connected in series between a power supply and a source electrode of a first PMOS field effect transistor (PMOS 0);
the drain and the grid of the second PMOS field effect transistor (PMOS 1) are respectively connected with two ends of the first Resistor (RP);
the source electrode of the second PMOS field effect transistor (PMOS 1) is connected with the grid electrode of the first PMOS field effect transistor (PMOS 0);
the first Capacitor (CP) is used for pulling down and opening the grid of the second PMOS field effect transistor (PMOS 1) through the change of the coupling OUT of the first Capacitor (CP) when the first PMOS field effect transistor (PMOS 0) is turned off and the first NMOS field effect transistor (NMOS 0) is turned on, so that the grid of the first PMOS field effect transistor (PMOS 0) is pulled, and a bridge circuit series-connection state formed by the secondary opening of the first PMOS field effect transistor (PMOS 0) due to output coupling is avoided;
the structure II is as follows: the second alternating current feedback path module comprises the following circuit structure:
the second alternating current feedback path module comprises a second Capacitor (CN), a second Resistor (RN) and a second NMOS field effect transistor (NMOS 1);
the second Capacitor (CN) and the second Resistor (RN) are sequentially connected between the drain electrode of the first NMOS field effect transistor (NMOS 0) and the ground in series;
the drain electrode and the grid electrode of the second NMOS field effect transistor (NMOS 1) are respectively connected to two ends of the second Resistor (RN);
the drain electrode of the second NMOS field effect transistor (NMOS 1) is connected with the source electrode of the first NMOS field effect transistor (NMOS 0);
the second Capacitor (CN) is used for pulling up and opening the grid electrode of the second NMOS field effect transistor (NMOS 1) through the change of the coupling OUT of the second Capacitor (CN) when the first PMOS field effect transistor (PMOS 0) is started and the first NMOS field effect transistor (NMOS 0) is turned off, so that the grid electrode of the first NMOS field effect transistor (NMOS 0) is pulled, and a bridge circuit series-connection state formed by the secondary opening of the first NMOS field effect transistor (NMOS 0) due to output coupling is avoided;
the structure is three: the first alternating current feedback path module comprises the following circuit structure:
the first alternating current feedback path module comprises a first Capacitor (CP), a first Resistor (RP) and a second PMOS field effect transistor (PMOS 1);
the first Resistor (RP) and the first Capacitor (CP) are connected in series between a power supply and a source electrode of a first PMOS field effect transistor (PMOS 0);
the drain and the grid of the second PMOS field effect transistor (PMOS 1) are respectively connected with two ends of the first Resistor (RP);
the source electrode of the second PMOS field effect transistor (PMOS 1) is connected with the grid electrode of the first PMOS field effect transistor (PMOS 0);
the first Capacitor (CP) is used for pulling down and opening the grid of the second PMOS field effect transistor (PMOS 1) through the change of the coupling OUT of the first Capacitor (CP) when the first PMOS field effect transistor (PMOS 0) is turned off and the first NMOS field effect transistor (NMOS 0) is turned on, so that the grid of the first PMOS field effect transistor (PMOS 0) is pulled, and a bridge circuit series-connection state formed by the secondary opening of the first PMOS field effect transistor (PMOS 0) due to output coupling is avoided; and the number of the first and second electrodes,
the second alternating current feedback path module comprises the following circuit structure:
the second alternating current feedback path module comprises a second Capacitor (CN), a second Resistor (RN) and a second NMOS field effect transistor (NMOS 1);
the second Capacitor (CN) and the second Resistor (RN) are sequentially connected between the drain electrode of the first NMOS field effect transistor (NMOS 0) and the ground in series;
the drain electrode and the grid electrode of the second NMOS field effect transistor (NMOS 1) are respectively connected to two ends of the second Resistor (RN);
the drain electrode of the second NMOS field effect transistor (NMOS 1) is connected with the source electrode of the first NMOS field effect transistor (NMOS 0);
the second Capacitor (CN) is used for pulling up and opening the grid electrode of the second NMOS field effect transistor (NMOS 1) through the change of the coupling OUT of the second Capacitor (CN) when the first PMOS field effect transistor (PMOS 0) is started and the first NMOS field effect transistor (NMOS 0) is turned off, so that the grid electrode of the first NMOS field effect transistor (NMOS 0) is pulled, and the bridge circuit series-connection state formed by the secondary opening of the first NMOS field effect transistor (NMOS 0) due to output coupling is avoided.
2. The circuit structure of claim 1, wherein the bridge circuit block comprises a switch control unit, and the switch control unit is connected to both of the bridge circuit block for controlling the switching of the first PMOS FET (PMOS 0) and the first NMOS FET (NMOS 0) in the bridge circuit block.
3. The circuit structure of claim 1, wherein the first PMOS FET (PMOS 0) and the first NMOS FET (NMOS 0) in the bridge module are alternatively turned on and off, and the states of the first PMOS FET (PMOS 0) and the first NMOS FET (NMOS 0) are different.
4. The circuit structure of claim 1, wherein when said circuit structure comprises structure one, the feedback quantity is adjusted by adjusting the parameters of the first Capacitor (CP) unit and the second PMOS fet (PMOS 1);
when the circuit structure comprises a second structure, adjusting the feedback quantity by adjusting the parameters of a two-Capacitor (CN) unit and a second NMOS field effect transistor (NMOS 1);
when the circuit structure comprises a third structure, the feedback quantity is adjusted by adjusting parameters of the first Capacitor (CP) unit, the second PMOS field effect transistor (PMOS 1), the second Capacitor (CN) unit and the second NMOS field effect transistor (NMOS 1).
5. The circuit structure of claim 1, wherein the circuit structure further comprises a first clamping diode and a second clamping diode, a cathode of the first clamping diode is connected to a drain of the second PMOS FET (PMOS 1), and an anode of the first clamping diode is connected to a gate of the second PMOS FET (PMOS 1); the cathode of the second clamping diode is connected with the grid electrode of a second NMOS field effect transistor (NMOS 1), and the anode of the second clamping diode is connected with the drain electrode of the second NMOS field effect transistor (NMOS 1), so that the safety of the switch tube is protected during high-voltage application.
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| CN201811632948.3A CN109687738B (en) | 2018-12-29 | 2018-12-29 | Circuit structure for realizing series connection prevention function of bridge circuit |
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| CN201811632948.3A CN109687738B (en) | 2018-12-29 | 2018-12-29 | Circuit structure for realizing series connection prevention function of bridge circuit |
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| CN109687738A CN109687738A (en) | 2019-04-26 |
| CN109687738B true CN109687738B (en) | 2020-12-18 |
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4970620A (en) * | 1989-08-23 | 1990-11-13 | General Motors Corporation | FET bridge protection circuit |
| US6832327B1 (en) * | 2001-10-02 | 2004-12-14 | Advanced Micro Devices, Inc. | Apparatus and method for providing an external clock from a circuit in sleep mode in a processor-based system |
| CN201118500Y (en) * | 2007-11-06 | 2008-09-17 | 黄瑞益 | Single-phase drive control circuit for DC brushless fan |
| CN201438776U (en) * | 2009-04-16 | 2010-04-14 | 永磁电子（东莞）有限公司 | High-frequency generator circuit of electrodeless lamp |
| CN103441748A (en) * | 2013-07-21 | 2013-12-11 | 马东林 | Transistored bridge |
| CN105375750A (en) * | 2015-12-17 | 2016-03-02 | 南京工程学院 | Driving protection circuit for preventing bridge arm direct connection |
| CN106160447A (en) * | 2016-07-08 | 2016-11-23 | 南京航空航天大学 | A kind of Dead Time optimal control method being applicable to SiC base brachium pontis power circuit |
-
2018
- 2018-12-29 CN CN201811632948.3A patent/CN109687738B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4970620A (en) * | 1989-08-23 | 1990-11-13 | General Motors Corporation | FET bridge protection circuit |
| US6832327B1 (en) * | 2001-10-02 | 2004-12-14 | Advanced Micro Devices, Inc. | Apparatus and method for providing an external clock from a circuit in sleep mode in a processor-based system |
| CN201118500Y (en) * | 2007-11-06 | 2008-09-17 | 黄瑞益 | Single-phase drive control circuit for DC brushless fan |
| CN201438776U (en) * | 2009-04-16 | 2010-04-14 | 永磁电子（东莞）有限公司 | High-frequency generator circuit of electrodeless lamp |
| CN103441748A (en) * | 2013-07-21 | 2013-12-11 | 马东林 | Transistored bridge |
| CN105375750A (en) * | 2015-12-17 | 2016-03-02 | 南京工程学院 | Driving protection circuit for preventing bridge arm direct connection |
| CN106160447A (en) * | 2016-07-08 | 2016-11-23 | 南京航空航天大学 | A kind of Dead Time optimal control method being applicable to SiC base brachium pontis power circuit |
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|---|---|
| CN109687738A (en) | 2019-04-26 |
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