CN210578242U

CN210578242U - Power supply slow-start circuit

Info

Publication number: CN210578242U
Application number: CN201921377601.9U
Authority: CN
Inventors: 不公告发明人
Original assignee: Wuhan Nuoke Power Technology Co ltd
Current assignee: Wuhan Nuoke Power Technology Co ltd
Priority date: 2019-08-23
Filing date: 2019-08-23
Publication date: 2020-05-19
Anticipated expiration: 2029-08-23

Abstract

The utility model provides a power delay circuit for electronic bottle opener of intelligence, include: the voltage delay rising circuit, the switching circuit and the current delay rising circuit; one end of the voltage delay rising circuit is connected with an external power supply, and the other end of the voltage delay rising circuit is connected with the switch circuit and is used for controlling the starting time of the switch circuit; the current delay rising circuit is used for buffering the rising slope of the power-on impact current and limiting the rated current from the switch circuit to an external load. The invention aims to solve the ignition problem and the potential safety hazard in the prior art, realize the electric heating plugging and unplugging of the safety belt and protect components by designing a control circuit capable of controlling the power-on and turn-on time of a power supply on a front-stage circuit and connecting a controllable impact current influence on a rear-stage circuit, namely controlling the rising slope of the power-on current and carrying out double control on the front stage and the rear stage.

Description

Power supply slow-start circuit

Technical Field

The utility model relates to a power technical field, concretely relates to power has slowly played circuit for electronic bottle opener of intelligence.

Background

In the prior art, a traditional electric screw driver power supply is not specially processed, when the traditional electric screw driver power supply is used, an electric hot plug capacitor is charged, impact current is generated in the hot plug power-on process, the phenomenon of sparking occurs, fire safety is possibly caused to be low, and interface damage and component failure rate are easily caused to be increased; the power supply oscillation can cause the power supply abnormality of the system, and the product is in failure.

Accordingly, there are problems in the art and improvements are needed.

SUMMERY OF THE UTILITY MODEL

The utility model discloses to the poor technical problem of security performance who exists among the prior art, provide a steerable impulse current influence, realize safety belt electric heat plug, the circuit is slowly played to the power of protection components and parts.

The utility model provides a power delay circuit for electronic bottle opener of intelligence, include: the voltage delay rising circuit, the switching circuit and the current delay rising circuit; one end of the voltage delay rising circuit is connected with an external power supply, and the other end of the voltage delay rising circuit is connected with the switch circuit and is used for controlling the starting time of the switch circuit; the current delay rising circuit is used for buffering the rising slope of the power-on impact current and limiting the rated current from the switch circuit to an external load.

Wherein, the voltage delay rising circuit comprises: a first capacitor C1, a first resistor R1 and a second resistor R2; the first capacitor C1 is connected in parallel with the first resistor R1 and connected in series with the second resistor R2 between the external power supply VIN and the ground GND, the first resistor R1 is a discharge channel of the first capacitor C1, and the second resistor R2 and the first capacitor C1 are used for achieving the anti-jitter delay function.

Wherein, the voltage delay rising circuit further comprises: a first diode D1, a second diode D2, and a third diode D3, the first diode D1 connected between the power source VIN and ground GND; an anode of the second diode D2 is connected to a connection point between the first capacitor C1 and the second resistor R2, a cathode of the second diode D2 is connected to an anode of a third diode D3, and a cathode of the third diode D3 is connected to a power source VIN.

The switch circuit comprises a PMOS (P-channel metal oxide semiconductor) tube, the first diode D1 and the second diode D3 are clamping diodes, the first clamping diode D1 is used for protecting a rear-stage circuit, and the third clamping diode D3 is used for protecting a grid-source electrode of the PMOS tube Q1 from being broken down by high voltage; the second diode D2 is used to prevent the PMOS gate charging process from being affected by the first capacitor C1.

The current delay rising circuit further comprises a third resistor R3 and a second capacitor C2, wherein the third resistor R3 and the second capacitor C2 are the current delay rising circuit and are used for controlling the rising slope of the power-on current.

The PMOS transistor also comprises a fourth resistor R4 and a fifth resistor R5, the fourth resistor R4 and the fifth resistor R5 are used for preventing self-oscillation of the PMOS transistor, one end of the fifth resistor R5 is connected with the second capacitor C2, and the other end of the fifth resistor R5 is connected with a connection point of the third resistor R3 and the fourth resistor R4.

Wherein a cathode of the second diode D2 and an anode of a third diode D3 are commonly connected to a connection point of the third resistor R3 and a fourth resistor R4; the source electrode of the PMOS tube is connected with a power supply VIN, the drain electrode of the PMOS tube is connected with the output end, and the grid electrode of the PMOS tube is connected with a third resistor R3 and then connected with a power supply ground GND after being connected with a fourth resistor R4 in series.

The voltage delay rising circuit comprises: a first capacitor C1, a first resistor R1 and a second resistor R2; the switch module is a PMOS tube; the first capacitor C1 is charged to a set charging time through a +48V input power supply, and the starting time of the power-on to the PMOS tube is controlled by adjusting the parameter specifications of the first resistor R1, the second resistor R2 and the first capacitor C1; the set charging time is a constant, and the charging time constant is t ═ C1 (R1// R2).

The utility model discloses the technical scheme that the scheme provided has following technological effect or advantage at least: the utility model discloses a current of preceding level's voltage time delay raising circuit and back level delays raising circuit, and the electric conduction opening time on the steerable power of voltage time delay raising circuit realizes safety belt electric heat plug, has protected the safe handling of components and parts, has prolonged the life of components and parts on the influence of back level circuit control impulse current.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.

Fig. 1 is a schematic circuit block diagram of a first embodiment of the present invention;

fig. 2 is a schematic diagram of the circuit of fig. 1.

Detailed Description

In order to solve the potential safety hazard that exists among the prior art and cause the interface to damage easily and lead to the problem that components and parts fault rate rises, the utility model aims at providing a power delay circuit for intelligent electric screw driver, its core thought is: the invention aims to solve the ignition problem and the potential safety hazard in the prior art, realize the electric heating plugging and unplugging of the safety belt and protect components by designing a control circuit capable of controlling the power-on and turn-on time of a power supply on a front-stage circuit and connecting a controllable impact current influence on a rear-stage circuit, namely controlling the rising slope of the power-on current and carrying out double control on the front stage and the rear stage.

In order to make the objects, technical solutions and advantages of the present invention clearer, embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

The embodiment of the utility model provides a circuit is slowly played to power is applied to on the electronic bottle opener of intelligence, refers to fig. 1, and fig. 1 is the utility model provides a circuit block diagram schematic diagram, this circuit includes: the voltage delay rising circuit, the switch module and the current delay rising circuit; the input end of the voltage delay rising circuit is connected with an external power Vin, the external power is an external direct-current power, the output end of the voltage delay rising circuit is connected with a switch circuit, the output end of the switch circuit is connected to a DC conversion module (namely a load), and the voltage delay rising circuit is used for controlling the starting time of the switch circuit; the switch circuit is also connected to a current delay rising circuit, and the current delay rising circuit is used for buffering the rising slope of the power-on impact current and limiting the rated current of the switch circuit to an external load.

With reference to fig. 2, fig. 2 is a schematic circuit diagram of a power supply slow-start circuit, which includes a voltage delay-rise circuit disposed at a front stage of the power supply slow-start circuit, and the voltage delay-rise circuit includes: a first capacitor C1, a first resistor R1 and a second resistor R2; the first capacitor C1 is connected in parallel with the first resistor R1 and connected in series with the second resistor R2 between the external power source VIN and the ground GND, the first resistor R1 is a discharge channel of the first capacitor C1, and the second resistor R2 and the first capacitor C1 are used for achieving the anti-jitter delay function.

Further, the voltage delay rising circuit further comprises: a first diode D1, a second diode D2, and a third diode D3, the first diode D1 being connected between the power source VIN and ground GND, the cathode of the first diode D1 being connected to the power source VIN, the anode of the first diode D1 being connected to ground GND; an anode of the second diode D2 is connected to a connection point of the first capacitor C1 and the first resistor R1 and the second resistor R2, a cathode of the second diode D2 is connected to an anode of the third diode D3, and a cathode of the third diode D3 is connected to the power source VIN in common with one end of the first capacitor C1 and one end of the first resistor R1. The voltage delay rising circuit composed of the first diode D1, the second diode D2, the third diode D3, the first capacitor C1, the first resistor R1 and the second resistor R2 can control the power-on turn-on time of the power supply, and the rear-stage circuit is effectively protected.

Further, the switch circuit comprises a PMOS (P-channel metal oxide semiconductor) tube, the first diode D1 and the second diode D3 are clamping diodes, the first clamping diode D1 is used for protecting a rear-stage circuit, and the third clamping diode D3 is used for protecting a grid-source electrode of the PMOS tube Q1 from being broken down by high voltage; the second diode D2 is used to prevent the PMOS gate charging process from being affected by the first capacitor C1.

The current delay rising circuit comprises a third resistor R3 and a second capacitor C2; the PMOS transistor also comprises a fourth resistor R4 and a fifth resistor R5, the fourth resistor R4 and the fifth resistor R5 are used for preventing self-oscillation of the PMOS transistor, one end of the fifth resistor R5 is connected with the second capacitor C2, and the other end of the fifth resistor R5 is connected with a connection point of the third resistor R3 and the fourth resistor R4. A cathode of the second diode D2 and an anode of the third diode D3 are commonly connected to a connection point of the third resistor R3 and the fourth resistor R4; the source electrode of the PMOS tube is connected with a power supply VIN, the drain electrode of the PMOS tube is connected with an output end Vout, and the grid electrode of the PMOS tube is connected with a third resistor R3 and then connected with a power supply ground GND after being connected with a fourth resistor R4 in series. The circuit utilizes the third resistor R3 and the second capacitor C2 which are connected in series to realize the control of the rising slope of the electrifying current, effectively controls the impact current influence, realizes the electrothermal plugging of the safety belt and protects the components.

The working principle of the attached figure 2 of the present invention includes the following three stages:

the first stage is as follows: charging the first capacitor C1 to a set charging time by a rated voltage (such as +48V) input power supply, and adjusting the specifications of the first resistor R1, the second resistor R2 and the first capacitor C1 to control the turn-on time of the PMOS transistor; the charging time constant t is (R1// R2) C1; the charging time constant t is the ratio of the first resistor R1 to the second resistor R2 multiplied by the first capacitor C1, and the parameters can be adjusted by this formula to control the turn-on time of the PMOS transistor.

And a second stage: the PMOS tube starts to increase the drain current, the change speed is in direct proportion to the transconductance of the PMOS tube and the change rate of the grid source voltage, and the specific relationship is as follows: dldrain/dt gfm × dgvgs/dt;

gfm is transconductance, the ratio of the variation of drain current to the variation of gate-source voltage of MOS transistor,

idrain is the current of the drain electrode, and the current of the drain electrode of the MOS tube flowing to the source electrode.

Vgs is the gate-source voltage, the voltage across the gate and source of the MOS transistor.

And a third stage: when the drain-source current Idrain reaches the maximum load, the drain-source voltage is saturated, at this time, the gate-source voltage Vplt enters a plateau period, the drain-source current Idrain is constant at this stage, and the gate-source voltage Vplt is Vth + (Idrain/gfm); the fixed gate-source voltage causes the gate current all to pass through the feedback capacitance Cgd, gate current Ig ═ Vb-Vplt)/(R3;

since the gate current Ig ≈ Icgd, Ig ═ Cgd × dVgd/dt.

The gate-source voltage remains constant so the rate of change of the gate-source voltage and the drain-source voltage are equal.

Therefore, the method comprises the following steps: dVds/dt ═ dVgd/dt ═ (Vb-Vplt)/(R3 × C2).

Wherein Vplt is the gate-source voltage, and the voltage at both ends of the grid and the source of the PMOS transistor

The Vth threshold voltage is a gate voltage required for starting to form a conductive channel between the source S and the drain D of the PMOS transistor, and parameters of the PMOS transistor are usually calculated with a fixed constant.

Cgd is feedback capacitance, and in the case of grounding of the source electrode of the PMOS tube, the measured capacitance between the drain electrode and the gate electrode is reverse transmission capacitance. Also commonly called Miller capacitance, is an important parameter for the rising and falling time of the switch, and influences the turn-off delay time of the PMOS tube

Vb is the steady-state grid driving voltage of the PMOS tube, and the parameters of the PMOS tube are self parameters.

Ig is grid current, grid parasitic capacitance, the parasitic capacitance is charged by the current when the PMOS tube is driven, the capacitance is discharged when the PMOS tube is switched off, and when the PMOS tube works as a switching tube, the current is in direct proportion to the frequency.

Icgd is the current between the drain and the gate of the PMOS tube.

Vgd is the PMOS transistor gate-to-drain voltage, which is approximately the drain voltage Vds-gate voltage Vgs.

Vds is the voltage between the drain and the source of the PMOS transistor, and the DS breakdown voltage. The parameters of the PMOS tube are self parameters.

Vgs is the voltage between the gate and the source of the MOS transistor, and is generally calculated in the range of-20V to + 20V.

According to the above steps, the hot plug surge current rising slope can be controlled by adjusting the parameters of the third resistor R3 and the second capacitor C2.

To sum up, the utility model discloses a preceding stage's voltage time delay rise circuit delays the rise circuit with the electric current of back level, and the electric conduction opening time on the steerable power of voltage time delay rise circuit realizes safety belt electric heat plug, has protected the safe handling of components and parts, has prolonged the life of components and parts on the influence of back level circuit control impulse current.

While the invention has been described with reference to a few preferred embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention.

Claims

1. The utility model provides a circuit is slowly played to power for electronic bottle opener of intelligence, its characterized in that includes: the voltage delay rising circuit, the switching circuit and the current delay rising circuit;

the input end of the voltage delay rising circuit is connected with an external power supply, and the output end of the voltage delay rising circuit is connected with the switch circuit and is used for controlling the starting time of the switch circuit;

the current delay rising circuit is used for buffering the rising slope of the power-on impact current and limiting the rated current from the switch circuit to an external load.

2. The power supply slow-start circuit according to claim 1, wherein the voltage delay rise circuit comprises: the circuit comprises a first capacitor, a first resistor and a second resistor;

the first capacitor is connected with the first resistor in parallel and connected between an external power supply VIN and ground GND in series with the second resistor, the first resistor is a discharge channel of the first capacitor, and the second resistor and the first capacitor are used for achieving an anti-jitter delay function.

3. The power supply slow-start circuit according to claim 2, wherein the voltage delay rise circuit further comprises: the circuit comprises a first diode, a second diode and a third diode, wherein the first diode is connected between a power supply VIN and ground GND; the anode of the second diode D2 is connected to the connection point of the first and second resistors of the capacitor, the cathode of the second diode is connected to the anode of the third diode, and the cathode of the third diode is connected to the power source VIN.

4. The power supply slow start circuit according to claim 3, wherein the switch circuit comprises a PMOS tube, the first diode and the third diode are clamping diodes, the first clamping diode is used for protecting a rear stage circuit, and the third clamping diode is used for protecting a gate-source electrode of the PMOS tube from being broken down by high voltage; the second diode is used for preventing the PMOS gate charging process from being influenced by the first capacitor.

5. The power supply slow-start circuit according to claim 4, further comprising a third resistor and a second capacitor, wherein the third resistor and the second capacitor are the current slow-start circuit and are used for controlling the rising slope of the power-on current.

6. The power supply slow-start circuit according to claim 5, further comprising a fourth resistor and a fifth resistor, wherein the fourth resistor and the fifth resistor are used for preventing self-oscillation of a PMOS transistor, one end of the fifth resistor is connected to the second capacitor, and the other end of the fifth resistor is connected to a connection point of the third resistor and the fourth resistor.

7. The power supply slow-start circuit according to claim 6, wherein a cathode of the second diode and an anode of a third diode are commonly connected to a connection point of the third resistor and a fourth resistor; the source electrode of the PMOS tube is connected with a power supply VIN, the drain electrode of the PMOS tube is connected with the output end, and the grid electrode of the PMOS tube is connected with a third resistor and a fourth resistor in series and then is connected with a power supply ground GND.

8. The power supply slow-start circuit according to claim 1, wherein the voltage delay rise circuit comprises: the circuit comprises a first capacitor, a first resistor and a second resistor; the switch module is a PMOS tube;

and charging the first capacitor to a set charging time through a +48V input power supply, and adjusting the parameter specifications of the first resistor, the second resistor and the first capacitor to control the starting time of the power-on to the PMOS tube.

9. The power supply slow-start circuit according to claim 8, wherein the set charging time is a constant, and the constant of the charging time is t ═ (R1// R2) C1, where R1 is a first resistor, R2 is a second resistor, and C1 is a first capacitor.