CN109684734B - Method for checking model matrix - Google Patents

Method for checking model matrix Download PDF

Info

Publication number
CN109684734B
CN109684734B CN201811600971.4A CN201811600971A CN109684734B CN 109684734 B CN109684734 B CN 109684734B CN 201811600971 A CN201811600971 A CN 201811600971A CN 109684734 B CN109684734 B CN 109684734B
Authority
CN
China
Prior art keywords
difference
del
matrix
branch
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201811600971.4A
Other languages
Chinese (zh)
Other versions
CN109684734A (en
Inventor
王思浩
罗巍
吴大可
周振亚
贾程瀚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Huada Jiutian Technology Co.,Ltd.
Original Assignee
Huada Empyrean Software Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huada Empyrean Software Co Ltd filed Critical Huada Empyrean Software Co Ltd
Priority to CN201811600971.4A priority Critical patent/CN109684734B/en
Publication of CN109684734A publication Critical patent/CN109684734A/en
Application granted granted Critical
Publication of CN109684734B publication Critical patent/CN109684734B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/36Circuit design at the analogue level
    • G06F30/367Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/398Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Measurement Of Resistance Or Impedance (AREA)

Abstract

A method of inspecting a model matrix, comprising the steps of: performing circuit simulation, and collecting nodes with difficult iteration; searching devices connected to the nodes with difficult convergence according to the circuit network topology; carrying out matrix inspection on the searched device; and giving out detection result information. The method for checking the model matrix utilizes the matrix check comprising forward difference check, central difference check and Richardson extrapolation check to check and judge the correctness of the Jacobian matrix elements of the device model in the simulation process of the integrated circuit and give error positioning, namely, dynamically checks whether the Jacobian matrix and the right-end item of the linear equation set are matched or not, thereby ensuring the correctness of the solution and improving the simulation efficiency.

Description

Method for checking model matrix
Technical Field
The invention relates to the field of integrated circuit simulation software. And more particularly to a method of inspecting a model matrix.
Background
With the development of the integrated circuit industry, the electronic circuit scale is larger and larger, and the requirements on the simulation speed and the simulation precision of circuit simulation software are higher and higher. The circuit simulation software mainly simulates a circuit structure, converts physical problems into mathematical problems, establishes a relevant model and an equation set, and utilizes a computer to analyze and calculate to obtain a solution of the equation set so as to simulate circuit characteristics. The accurate solving of the nonlinear equation system in the circuit simulation process is a key factor for ensuring the correctness of the simulation result. The most common method for solving a nonlinear system of equations is the newton iteration method, which transforms the problem of solving the nonlinear system of equations into the problem of solving the linear system of equations in an iterative process. Solving the system of linear equations relies primarily on the jacobian matrix and the corresponding right-hand terms. If the Jacobian matrix is not matched with the right-end term, Newton iteration is difficult to converge, the iteration times are increased, the solution result after convergence is wrong or not converged seriously, and simulation failure is finally caused. The accuracy of the jacobian matrix is very important.
In order to ensure the correctness of the jacobian matrix, the invention provides a dynamic rapid automatic checking method. The method can automatically check the correctness of the Jacobian matrix of the device model in the circuit simulation process, automatically report the check result, position the incorrect Jacobian matrix element position, facilitate the timely correction of the Jacobian matrix element and provide guarantee for improving the accuracy and efficiency of the equation set solution.
Disclosure of Invention
In order to solve the defects of the prior art, the invention aims to provide a method for checking a model matrix, which is used for checking and judging the correctness of the Jacobian matrix element of a device model and giving error positioning in the simulation process of an integrated circuit, namely dynamically checking whether the Jacobian matrix and the right-end item of a linear equation set are matched or not, thereby ensuring the correctness of solution and improving the simulation efficiency.
In order to achieve the above object, the present invention provides a method for checking a model matrix, comprising the steps of:
1) performing circuit simulation, and collecting nodes with difficult iteration;
2) finding out devices connected to the nodes with difficulty in convergence according to the circuit network topology;
3) carrying out matrix inspection on the searched device;
4) and giving out detection result information.
Further, the step 1) further comprises:
if the iteration result is that the solution does not converge, the nodes are sorted according to the voltage difference;
if the iteration result is that the right-end item does not converge, sorting according to the right-end item;
taking the node arranged at the front X position as a node needing to be checked;
wherein X is a positive integer.
Further, the matrix check comprises a forward difference check, a center difference check and a Richardson extrapolation check.
Further, the forward differential check comprises the steps of:
calculating a numerical solution of the conductance: firstly, calculating the difference del _ v between the branch voltage drop of the current iteration step and the branch voltage drop of the previous iteration step, and dividing the difference between the branch current of the current iteration step and the branch current of the previous iteration step by the del _ v to obtain the numerical value of conductance decon _ value;
calculating a numerical solution of capacitance: firstly, calculating the difference del _ v between the voltage drop of a branch in the current iteration step and the voltage drop of a branch in the previous iteration step, and dividing the difference between the charge of the branch in the current iteration step and the charge of the branch in the previous iteration step by the del _ v to obtain the numerical value of the capacitor, namely cap _ value;
checking the conductivity correctness: comparing the value solution con _ value of the conductance with the corresponding conductance in the Jacobian matrix of the device, and marking the difference con _ del if the difference exceeds the allowed tolerance tol;
checking the correctness of the capacitance: comparing the numerical solution cap _ value of the capacitance with the corresponding capacitance in the Jacobian matrix of the device, and marking the difference cap _ del if the difference exceeds the allowable tolerance tol;
if the conductance difference con _ del and the capacitance difference cap _ del are both smaller than the tolerance tol, the detection result information can be directly given; if one of the conductance difference con _ del and the capacitance difference cap _ del is not smaller than the tolerance tol, center difference detection is performed.
Further, the central differential check includes the steps of:
calculating a numerical solution of the conductance: firstly, calculating the difference del _ v between the branch voltage drop of the current iteration step and the branch voltage drop of the previous iteration step, and dividing the difference between the branch current of the previous step of the current iteration step and the branch current of the next step of the current iteration step by 2 times del _ v to obtain the numerical value of conductance solution con _ value _ 2;
calculating a numerical solution of capacitance: dividing the difference between the branch charge of the previous step of the current iteration step and the branch charge of the next step of the current iteration step by del _ v which is 2 times to obtain a numerical solution of the capacitor, namely cap _ value _ 2;
checking the conductivity correctness: comparing the value solution con _ value _2 of the conductance with the corresponding conductance in the Jacobian matrix of the device, and marking the difference con _ del _2 of the two if the difference exceeds the allowed tolerance tol;
checking the correctness of the capacitance: comparing the numerical value solution of the capacitance, namely, cap _ value _2 with the corresponding capacitance in the device Jacobian matrix, and marking the difference cap _ del _2 if the difference exceeds the allowable tolerance tol;
if the conductance difference con _ del _2 and the capacitance difference cap _ del _2 are both smaller than the tolerance tol, the detection result information can be directly given; if one of the conductance difference con _ del _2 and the capacitance difference cap _ del _2 is not less than the tolerance tol, a Richardson extrapolation check is performed.
Further, the Richardson extrapolation check includes the following steps:
calculating a numerical solution of the conductance: firstly, calculating the difference del _ v between the branch voltage drop of the current iteration step and the branch voltage drop of the previous iteration step, then calculating the difference between the branch current of the previous step of the current iteration step and the branch current of the next step of the current iteration step, dividing the difference by 2 times del _ v to obtain a first term D0, then dividing the difference between the branch current of the previous two steps of the current iteration step and the branch current of the next two steps of the current iteration step by 4 times del _ v to obtain a value D1, and dividing the difference between the D0 and the D1 by 4 times to obtain a numerical value solution con _ value _3 of high-precision conductance;
calculating a numerical solution of capacitance: dividing the difference between the branch charge of the previous step of the current iteration step and the branch charge of the next step of the current iteration step by del _ v of 2 times to obtain a first term C _ D0, dividing the difference between the branch charge of the previous two steps of the current iteration step and the branch charge of the next two steps of the current iteration step by del _ v of 4 times to obtain C _ D1, and dividing the difference between C _ D0 of 4 times and C _ D1 by 4 to obtain the value of the capacitor to be solved by cap _ value _ 3;
checking the conductivity correctness: comparing the value solution con _ value _3 of the conductance with the corresponding conductance filled in the matrix by the device model, and marking the difference con _ del _3 of the two if the difference exceeds the allowed tolerance;
checking the correctness of the capacitance: comparing the numerical value solution of the capacitor cap _ value3 with the corresponding capacitor filled in the matrix by the device model, marking if the difference cap _ del _3 of the two capacitors exceeds the allowed tolerance, finally judging whether the filling of the Jacobian matrix has errors according to the mark, and then reporting a corresponding check result;
and judging whether the matrix is wrongly filled according to the marks and reporting corresponding information.
Further, the matrix inspection in step 2) is performed, and when the same device is connected to different nodes needing to be inspected, the inspected device is not repeatedly inspected.
Further, the step 2) further comprises,
in the process of matrix inspection, linear nodes in the device are filtered, and only nonlinear nodes are inspected;
when the device model is built, linear nodes are determined according to the physical characteristics of the model, the linear nodes are marked, and whether the detection is needed or not is distinguished through the marks during matrix detection.
Further, step 2) is executed by the matrix check, wherein the check object is a non-zero element in the jacobian matrix.
To achieve the above object, the present invention further provides a computer readable storage medium having stored thereon computer instructions which, when executed, perform the steps of the above method of inspecting a model matrix.
The method can find the problem of filling errors of the model matrix in the circuit simulation process, improve the correctness of the model matrix, further reduce the iteration times of solving the equation set and improve the simulation efficiency and the simulation precision.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
fig. 1 is a flow chart of a method of inspecting a model matrix according to the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are described herein for the purpose of illustration and explanation and not limitation.
Fig. 1 is a flowchart of a method of inspecting a model matrix according to the present invention, which will be described in detail with reference to fig. 1.
First, in step 101, a circuit simulation is performed to collect nodes whose iteration is difficult.
When a large-scale circuit is solved, when Newton iteration steps are increased abnormally, nodes which cause difficulty in convergence are found, and if the solutions (solutions) do not converge, the nodes (nodes) are sequenced according to a voltage difference (deltaV); if the right term (residual) does not converge, sorting by residual. And taking the node with the first X bits as the node to be checked, wherein X is a positive integer according to the requirement.
The current, the charge and the voltage difference of the previous step and the next step of the current iteration step are stored well in the simulation process, so that the numerical solutions of the conductance and the capacitance are conveniently calculated by a numerical analysis method according to the stored data during matrix check (matrix check), the values of the current and the charge do not need to be repeatedly calculated, the calculated amount can be reduced, and the time is saved.
In step 102, devices connected on nodes with difficulty in convergence are found according to the circuit network topology.
In the step, devices connected with nodes needing to be checked are found by searching the topological relation of the circuit network, matrix check is carried out on the device model matrixes in the subsequent steps, and the checked devices are marked. When the same device is connected to different nodes needing to be checked, the checked device is not checked repeatedly. This can reduce the number of devices to be inspected and shorten the inspection time.
In the matrix check process, linear nodes in the device need to be filtered, only nonlinear nodes are checked, and the checking frequency is obviously reduced. When the device model is built, linear nodes are determined according to the physical characteristics of the model, and the linear nodes are marked. The flag is used in matrix check to distinguish whether detection is required.
In step 103, matrix check is performed on the found device.
Matrix check in the present invention mainly includes three kinds of checks, which are forward differential check, center differential check and richardson extrapolation check.
In this step, forward differential inspection, center differential inspection and richardson extrapolation inspection are performed on the found devices in sequence.
Generally, if an n-dimensional matrix needs to be checked, each element in the matrix needs to be checked, i.e., matrix check is performed n × n times. In the invention, only the non-zero elements in the jacobian matrix are checked. Before the check, all elements in the Jacobian matrix are checked, and if the value of the element is 0, matrix check is not performed. Therefore, the calculation times can be reduced, and the checking efficiency can be improved.
First, forward differential inspection is performed on the found device. The invention uses the forward difference method in the numerical analysis to calculate the numerical solution of the conductance and the capacitance, and compares the numerical solution with the value actually filled in the Jacobian matrix, and if the difference between the numerical solution and the value is larger than the tolerance, the Jacobian matrix is considered to be wrongly filled. The method comprises the following specific steps:
1) calculating a numerical solution of the conductance: firstly, calculating the difference del _ v between the branch voltage drop of the current iteration step and the branch voltage drop of the previous iteration step, and dividing the difference between the branch current of the current iteration step and the branch current of the previous iteration step by the del _ v to obtain the numerical value of conductance decon _ value;
2) calculating a numerical solution of capacitance: firstly, calculating the difference del _ v between the voltage drop of a branch in the current iteration step and the voltage drop of a branch in the previous iteration step, and dividing the difference between the charge of the branch in the current iteration step and the charge of the branch in the previous iteration step by the del _ v to obtain the numerical value of the capacitor, namely cap _ value;
3) checking the conductivity correctness: the value of the conductance decon _ value is compared to the corresponding conductance in the device jacobian, and the difference con _ del is marked if it exceeds the allowable tolerance tol.
4) Checking the correctness of the capacitance: the value solution of the capacitance, cap _ value, is compared to the corresponding capacitance in the device jacobian, and the difference, cap _ del, is marked if it exceeds the allowable tolerance tol.
5) And judging whether the Jacobian matrix is wrongly filled according to the marks and reporting corresponding information.
If the conductance difference con _ del and the capacitance difference cap _ del are both smaller than the tolerance tol, step 104 may be performed to give detection result information, report that the matrix is correctly filled, and exit; and if one of the conductance difference con _ del and the capacitance difference cap _ del is not smaller than the tolerance tol, performing the next central differential detection.
The central difference detection of the invention is to use the central difference method in numerical analysis to calculate the numerical solution of the conductance and the capacitance, and compare the numerical solution with the value actually filled in the Jacobian matrix, and if the difference between the numerical solution and the value is larger than the tolerance, the Jacobian matrix is considered to be wrongly filled in. The method comprises the following specific steps:
1) calculating a numerical solution of the conductance: firstly, calculating the difference del _ v between the branch voltage drop of the current iteration step and the branch voltage drop of the previous iteration step, and dividing the difference between the branch current of the previous step of the current iteration step and the branch current of the next step of the current iteration step by 2 times del _ v to obtain the numerical value of conductance solution con _ value _ 2;
2) calculating a numerical solution of capacitance: dividing the difference between the branch charge of the previous step of the current iteration step and the branch charge of the next step of the current iteration step by del _ v which is 2 times to obtain a numerical solution of the capacitor, namely cap _ value _ 2;
3) checking the conductivity correctness: the value of the conductance, recon _ value _2, is compared to the corresponding conductance in the device jacobian, and the difference, con _ del _2, is marked if the allowable tolerance, tol, is exceeded.
4) Checking the correctness of the capacitance: the value of the capacitance solution, cap _ value _2, is compared to the corresponding capacitance in the device jacobian, and the difference, cap _ del _2, is marked if the allowable tolerance tol is exceeded.
If the conductance difference con _ del _2 and the capacitance difference cap _ del _2 are both smaller than the tolerance tol, step 104 may be performed to give detection result information, report that the matrix is correctly filled, and exit; if one of the conductance difference con _ del _2 and the capacitance difference cap _ del _2 is not less than the tolerance tol, the next Richardson extrapolation check is performed.
The Richardson extrapolation inspection of the invention is to use the Richardson extrapolation method of numerical analysis to calculate the numerical solution of high-precision conductance and capacitance, and then compare the numerical solution with the value filled in the Jacobian matrix, if the difference between the two is larger than the tolerance, the Jacobian matrix is considered to be wrongly filled. The method comprises the following specific steps:
1) calculating a numerical solution of the conductance: firstly, calculating the difference del _ v between the branch voltage drop of the current iteration step and the branch voltage drop of the previous iteration step, then calculating the difference between the branch current of the previous step of the current iteration step and the branch current of the next step of the current iteration step, dividing the difference by 2 times del _ v to obtain a first term D0, then dividing the difference between the branch current of the previous two steps of the current iteration step and the branch current of the next two steps of the current iteration step by 4 times del _ v to obtain a value D1, and dividing the difference between the D0 and the D1 by 4 times to obtain a numerical value solution con _ value _3 of high-precision conductance;
2) calculating a numerical solution of capacitance: dividing the difference between the branch charge of the previous step of the current iteration step and the branch charge of the next step of the current iteration step by del _ v of 2 times to obtain a first term C _ D0, dividing the difference between the branch charge of the previous two steps of the current iteration step and the branch charge of the next two steps of the current iteration step by del _ v of 4 times to obtain C _ D1, and dividing the difference between C _ D0 of 4 times and C _ D1 by 4 to obtain the value of the capacitor to be solved by cap _ value _ 3;
3) checking the conductivity correctness: the value of the conductance, conc _ value _3, is compared to the corresponding conductance filled into the matrix by the device model, and the difference, con _ del _3, is marked if it exceeds the allowable tolerance.
4) Checking the correctness of the capacitance: the capacitance value solution, cap _ value3, is compared to the corresponding capacitance filled into the matrix by the device model, and the difference, cap _ del _3, between the two is marked if it exceeds the allowable tolerance. And finally, judging whether the Jacobian matrix is wrongly filled according to the marks, and then reporting a corresponding check result.
5) And judging whether the matrix is filled with errors or not according to the marks in the 3) and the 4) and reporting corresponding information.
The whole checking process is automatically carried out in the circuit simulation process, and the specific information of the filling and writing errors of the Jacobian matrix elements of the device model is automatically reported.
In step 104, information on the detection result is given.
In this step, a final inspection report is issued by comparing whether the numerical solution and the jacobian fill-in value are less than the tolerance.
In the whole circuit simulation process, the three checks are sequentially carried out at each Newton iteration, the check result is reported, and if the previous check passes, the subsequent check is not carried out. And correcting the elements of the Jacobian matrix according to the check result to improve the correctness of the filled Jacobian matrix, further reduce the iteration times of solving the equation set and improve the simulation efficiency.
The forward differential inspection method used in the invention has high calculation speed and is suitable for the inspection of the simulation process of a large-scale circuit; the central differential inspection method has higher calculation precision and slower calculation speed than the forward differential inspection method; the Richardson extrapolation inspection method has the highest calculation precision, and the calculation speed is not as fast as that of the forward difference inspection method and the central difference inspection method. The invention fully combines three inspection methods, and the obtained inspection result finally provides the Jacobian matrix inspection result information.
In particular, the advantages of the present invention are in the following aspects:
first, the nodes causing convergence difficulties are quickly found. The search is ordered according to the reason for the difficulty in convergence.
Secondly, the device which is subjected to matrix check is not checked repeatedly, and time is saved.
Thirdly, only the nonlinear node inside the device is checked, and the checking times are reduced.
Fourthly, matrix check is carried out on non-zero elements only, and checking efficiency is improved.
Fifth, matrix check will be performed step by step, from simple to complex, reducing unnecessary computation.
Sixth, the application of the method of the invention can improve the speed of solving the equation set: the Jacobian matrix filling and writing errors can increase the iteration number of the equation system solution, and the simulation speed of the circuit is limited. The invention checks the correctness of the Jacobian matrix in the simulation process, gives out matrix error information, is convenient for quickly positioning the filling problem of the Jacobian matrix, improves the precision of the Jacobian matrix and further improves the solving speed of an equation set.
Seventh, the method of the present invention can improve the reliability of the simulation result: according to the error information reported by the invention, the Jacobian matrix of the device model is corrected, the solving precision of the equation set can be improved, and the accuracy of the simulation result is improved.
The present invention further provides a computer-readable storage medium, on which computer instructions are stored, and when the computer instructions are executed, the steps of the method for checking a model matrix are performed, and the method for checking a model matrix is described in the foregoing section and will not be described again.
Those of ordinary skill in the art will understand that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that changes may be made in the embodiments and/or equivalents thereof without departing from the spirit and scope of the invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (9)

1. A method of inspecting a model matrix, comprising the steps of:
1) performing circuit simulation, and collecting nodes with difficult iteration;
2) searching devices connected to the nodes with difficult convergence according to the circuit network topology;
3) carrying out matrix inspection on the searched device;
4) giving out detection result information;
the matrix checking includes: and carrying out forward differential inspection, central differential inspection and Richardson extrapolation inspection on the searched device in sequence according to conditions, calculating numerical solutions of the conductance and the capacitance, comparing the numerical solutions with values actually filled in the Jacobian matrix, and considering that the Jacobian matrix is wrongly filled when the difference between the conductance and the capacitance in the forward differential inspection or the central differential inspection or the Richardson extrapolation inspection and the values actually filled in the Jacobian matrix is larger than a tolerance.
2. The method of inspecting a model matrix according to claim 1, wherein the step 1), further comprises:
if the iteration result is that the solution does not converge, the nodes are sorted according to the voltage difference;
if the iteration result is that the right-end item does not converge, sorting according to the right-end item;
taking the node arranged at the front X position as a node needing to be checked;
wherein X is a positive integer.
3. The method of inspecting a model matrix of claim 1, wherein the forward differential inspection comprises the steps of:
calculating a numerical solution of the conductance: firstly, calculating the difference del _ v between the branch voltage drop of the current iteration step and the branch voltage drop of the previous iteration step, and dividing the difference between the branch current of the current iteration step and the branch current of the previous iteration step by the del _ v to obtain the numerical value of conductance decon _ value;
calculating a numerical solution of capacitance: firstly, calculating the difference del _ v between the voltage drop of a branch in the current iteration step and the voltage drop of a branch in the previous iteration step, and dividing the difference between the charge of the branch in the current iteration step and the charge of the branch in the previous iteration step by the del _ v to obtain the numerical value of the capacitor, namely cap _ value;
checking the conductivity correctness: comparing the value solution con _ value of the conductance with the corresponding conductance in the Jacobian matrix of the device, and marking the difference con _ del if the difference exceeds the allowed tolerance tol;
checking the correctness of the capacitance: comparing the numerical solution cap _ value of the capacitance with the corresponding capacitance in the Jacobian matrix of the device, and marking the difference cap _ del if the difference exceeds the allowable tolerance tol;
if the conductance difference con _ del and the capacitance difference cap _ del are both smaller than the tolerance tol, the detection result information can be directly given; if one of the conductance difference con _ del and the capacitance difference cap _ del is not smaller than the tolerance tol, center difference detection is performed.
4. The method of inspecting a model matrix of claim 1, wherein the central differential inspection comprises the steps of:
calculating a numerical solution of the conductance: firstly, calculating the difference del _ v between the branch voltage drop of the current iteration step and the branch voltage drop of the previous iteration step, and dividing the difference between the branch current of the previous step of the current iteration step and the branch current of the next step of the current iteration step by 2 times del _ v to obtain the numerical value of conductance solution con _ value _ 2;
calculating a numerical solution of capacitance: dividing the difference between the branch charge of the previous step of the current iteration step and the branch charge of the next step of the current iteration step by del _ v which is 2 times to obtain a numerical solution of the capacitor, namely cap _ value _ 2;
checking the conductivity correctness: comparing the value solution con _ value _2 of the conductance with the corresponding conductance in the Jacobian matrix of the device, and marking the difference con _ del _2 of the two if the difference exceeds the allowed tolerance tol;
checking the correctness of the capacitance: comparing the numerical value solution of the capacitance, namely, cap _ value _2 with the corresponding capacitance in the device Jacobian matrix, and marking the difference cap _ del _2 if the difference exceeds the allowable tolerance tol;
if the conductance difference con _ del _2 and the capacitance difference cap _ del _2 are both smaller than the tolerance tol, the detection result information can be directly given; if one of the conductance difference con _ del _2 and the capacitance difference cap _ del _2 is not less than the tolerance tol, a Richardson extrapolation check is performed.
5. The method of inspecting a model matrix of claim 1, wherein the Richardson extrapolation inspection comprises the steps of:
calculating a numerical solution of the conductance: firstly, calculating the difference del _ v between the branch voltage drop of the current iteration step and the branch voltage drop of the previous iteration step, then calculating the difference between the branch current of the previous step of the current iteration step and the branch current of the next step of the current iteration step, dividing the difference by 2 times del _ v to obtain a first term D0, then dividing the difference between the branch current of the previous two steps of the current iteration step and the branch current of the next two steps of the current iteration step by 4 times del _ v to obtain a value D1, and dividing the difference between the D0 and the D1 by 4 times to obtain a numerical value solution con _ value _3 of high-precision conductance;
calculating a numerical solution of capacitance: dividing the difference between the branch charge of the previous step of the current iteration step and the branch charge of the next step of the current iteration step by del _ v of 2 times to obtain a first term C _ D0, dividing the difference between the branch charge of the previous two steps of the current iteration step and the branch charge of the next two steps of the current iteration step by del _ v of 4 times to obtain C _ D1, and dividing the difference between C _ D0 of 4 times and C _ D1 by 4 to obtain the value of the capacitor to be solved by cap _ value _ 3;
checking the conductivity correctness: comparing the value solution con _ value _3 of the conductance with the corresponding conductance filled in the matrix by the device model, and marking the difference con _ del _3 of the two if the difference exceeds the allowed tolerance;
checking the correctness of the capacitance: comparing the numerical value solution of the capacitor cap _ value3 with the corresponding capacitor filled in the matrix by the device model, marking if the difference cap _ del _3 of the two capacitors exceeds the allowed tolerance, finally judging whether the filling of the Jacobian matrix has errors according to the mark, and then reporting a corresponding check result;
and judging whether the matrix is wrongly filled according to the marks and reporting corresponding information.
6. A method of inspecting a model matrix according to claim 1, characterized in that the inspected device is not inspected again when the same device is connected to different nodes to be inspected.
7. The method of inspecting a model matrix according to claim 1, wherein the step 2) further comprises,
in the process of matrix inspection, linear nodes in the device are filtered, and only nonlinear nodes are inspected;
when the device model is built, linear nodes are determined according to the physical characteristics of the model, the linear nodes are marked, and whether detection is needed or not is distinguished through the marks during matrix inspection.
8. The method of inspecting a model matrix according to claim 1, wherein step 2) said matrix inspection, whose inspection objects are non-zero elements in a jacobian matrix.
9. A computer readable storage medium having stored thereon computer instructions, characterized in that the computer instructions when executed perform the steps of the method of inspecting a model matrix according to any one of claims 1 to 8.
CN201811600971.4A 2018-12-26 2018-12-26 Method for checking model matrix Active CN109684734B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201811600971.4A CN109684734B (en) 2018-12-26 2018-12-26 Method for checking model matrix

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201811600971.4A CN109684734B (en) 2018-12-26 2018-12-26 Method for checking model matrix

Publications (2)

Publication Number Publication Date
CN109684734A CN109684734A (en) 2019-04-26
CN109684734B true CN109684734B (en) 2020-06-02

Family

ID=66189588

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201811600971.4A Active CN109684734B (en) 2018-12-26 2018-12-26 Method for checking model matrix

Country Status (1)

Country Link
CN (1) CN109684734B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112861461B (en) * 2021-03-05 2022-05-17 北京华大九天科技股份有限公司 Abnormity detection method and device for circuit simulation model
CN113128157B (en) * 2021-04-22 2022-05-17 北京华大九天科技股份有限公司 Method and device for solving high-impedance node non-convergence in analog circuit simulation
CN113283133B (en) * 2021-05-17 2023-12-08 杜玉玲 Sensor grid discretization error assessment method based on ANSYS software
CN113255268B (en) * 2021-05-21 2022-05-24 北京华大九天科技股份有限公司 Method for detecting and repairing transient analysis non-convergence in circuit simulation

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106972493A (en) * 2017-05-15 2017-07-21 东北电力大学 A kind of ill data source tracing method of the unsolvable power flow theoretical based on matrix perturbance
CN107741569A (en) * 2017-11-16 2018-02-27 温州大学 A kind of evaluation method of the lithium battery charge state based on segment extension Kalman filtering

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7299428B2 (en) * 2004-02-06 2007-11-20 Cadence Design Systems, Inc Model stamping matrix check technique in circuit simulator
CN102981686B (en) * 2012-08-29 2015-11-25 北京集创北方科技有限公司 A kind of method of capacitive touch screen architecture defects detection

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106972493A (en) * 2017-05-15 2017-07-21 东北电力大学 A kind of ill data source tracing method of the unsolvable power flow theoretical based on matrix perturbance
CN107741569A (en) * 2017-11-16 2018-02-27 温州大学 A kind of evaluation method of the lithium battery charge state based on segment extension Kalman filtering

Also Published As

Publication number Publication date
CN109684734A (en) 2019-04-26

Similar Documents

Publication Publication Date Title
CN109684734B (en) Method for checking model matrix
CN109522192B (en) Prediction method based on knowledge graph and complex network combination
CN110289613B (en) Sensitivity matrix-based power distribution network topology identification and line parameter identification method
CN102879730B (en) The method of testing of the single-particle inversion characteristic of part triplication redundancy SRAM type FPGA
CN110838075A (en) Training and predicting method and device for prediction model of transient stability of power grid system
CN112685961A (en) Method and system for predicting remaining service life of analog circuit
CN113377567A (en) Distributed system fault root cause tracing method based on knowledge graph technology
US20140040841A1 (en) Apparatus and method thereof for hybrid timing exception verification of an integrated circuit design
CN106529080A (en) Establishment method for square resistor SPICE (Simulation Program with Integrated Circuit Emphasis) model
CN113674106A (en) Combined positioning method for ground fault of medium-low voltage distribution network
CN111881124A (en) Data processing method and system based on state estimation of improved algorithm
CN108122598A (en) Possess the soft error rate method for predicting and system of EDAC functions SRAM
CN115952760A (en) Method, device and equipment for simulating digital-analog circuit and computer storage medium
CN105182219A (en) Power converter fault classification method based on Hamming error correcting code support vector machine
CN104111887A (en) Software fault prediction system and method based on Logistic model
CN112505532A (en) Analog circuit single fault diagnosis method based on improved particle swarm optimization
CN101853322A (en) Check method for model calculation in circuit simulation
CN115827353A (en) Fault diagnosis method and device
US7299428B2 (en) Model stamping matrix check technique in circuit simulator
CN115616412A (en) Energy storage battery pack modeling method, device, equipment and readable storage medium
CN115795222A (en) Grid bad parameter identification and correction method based on synchronous phasor measurement
CN112698154B (en) Power distribution network fault positioning method, equipment and system based on state estimation residual error comparison
CN104572455B (en) One kind is based on markovian component-based software reliability estimation method
CN109861214B (en) Method and system for judging weak line with stable transient power angle of regional power grid
CN212723249U (en) Fault detection device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20210322

Address after: 518100 1001, building 5, Shenjiu science and Technology Pioneer Park, northwest, intersection of Taohua road and Binglang Road, Fubao community, Fubao street, Futian District, Shenzhen City, Guangdong Province

Patentee after: Shenzhen Huada Jiutian Technology Co.,Ltd.

Address before: 100102 floor 2, block a, No.2, lizezhong 2nd Road, Chaoyang District, Beijing

Patentee before: HUADA EMPYREAN SOFTWARE Co.,Ltd.