CN112861461B - Abnormity detection method and device for circuit simulation model - Google Patents
Abnormity detection method and device for circuit simulation model Download PDFInfo
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Abstract
The invention discloses an anomaly detection method and device for a circuit simulation model, wherein the method comprises the following steps: starting a simulation flow of the circuit simulation model; determining detection parameters related to a comprehensive result according to the type of the circuit simulation model, and executing abnormal detection unrelated to bias voltage according to the detection parameters; performing anomaly detection related to the bias voltage according to a Jacobian matrix and a right-end term of the circuit simulation model; and outputting the result of the abnormality detection. The invention avoids repeated detection, saves detection time, reduces detection times, improves detection efficiency and simultaneously improves circuit simulation speed.
Description
Technical Field
The invention relates to the technical field of integrated circuits, in particular to an anomaly detection method and device for a circuit simulation model.
Background
With the development of integrated circuits and the enlargement of the scale of electronic circuits, the requirements on the simulation speed and the simulation precision of circuit simulation software in the prior art are higher and higher. The circuit simulation is mainly used for simulating a circuit structure, a specific physical device is replaced by a mathematical model which can correctly reflect the physical characteristics and the electrical characteristics of the physical device by constructing a circuit component model, the physical problem is converted into the mathematical problem to establish a relevant model and an equation set of the circuit, and the computer is used for analyzing and calculating to obtain the solution of the equation set so as to simulate the circuit characteristics. Therefore, the circuit simulation model plays a significant role in the circuit simulation process and directly influences the simulation precision and the simulation speed.
Once an abnormality occurs in the circuit simulation model, the circuit simulation result is affected, and even the circuit simulation fails. The anomaly checking of the circuit simulation model is very important. In the prior art, whether a circuit simulation model is abnormal or not is usually determined by detecting whether some parameters in the circuit simulation model are within a set range or not. The parameters aimed at by the detection method are relatively narrow, the detection range is relatively narrow, the detection result cannot be comprehensively reflected, and a plurality of abnormalities cannot be effectively detected.
Disclosure of Invention
The invention provides an anomaly detection method and device for a circuit simulation model, which are used for solving the technical problem that the anomaly of the circuit simulation model cannot be detected comprehensively in the prior art.
In order to solve the above technical problem, the present invention provides an anomaly detection method for a circuit simulation model, including:
starting a simulation flow of the circuit simulation model;
determining detection parameters related to a comprehensive result according to the type of the circuit simulation model, and executing abnormal detection unrelated to bias voltage according to the detection parameters;
performing anomaly detection related to the bias voltage according to a Jacobian matrix and a right-end term of the circuit simulation model;
and outputting the result of the abnormality detection.
In one embodiment, the determining the detection parameter related to the integrated result according to the type of the circuit simulation model includes:
determining the type of the circuit simulation model according to the circuit netlist;
when the type of the circuit simulation model is a diode model, determining the detection parameter related to the comprehensive result comprises: length parameters of the effective channel, width of the effective channel, constant resistance, constant capacitance and saturation current;
when the type of the circuit simulation model is a bipolar junction transistor model, determining the detection parameters related to the comprehensive result comprises: constant resistance, constant capacitance and saturation current;
when the type of the circuit simulation model is a metal-oxide semiconductor field effect transistor model, determining detection parameters related to the comprehensive result comprises: the length of the effective channel, the width of the effective channel, the constant resistance, the constant capacitance, and the saturation current.
In one embodiment, the performing anomaly detection related to the bias voltage according to the Jacobian matrix and the right-end term of the circuit simulation model includes:
detecting whether an abnormality related to the bias voltage exists according to a value on a diagonal line of the Jacobian matrix, the sum of values of rows and columns, and the value of the Jacobian matrix;
and detecting whether the abnormity related to the bias voltage exists according to the values of all the nodes of the right end item.
In an embodiment, before detecting whether there is an abnormality according to the values on the diagonal line of the jacobian matrix, the sum of the values of each row and each column, and the values of the jacobian matrix, the method further includes:
determining linear nodes and nonlinear nodes of the circuit simulation model;
determining, for the non-linear node, whether a numerical value in the Jacobian matrix is zero;
detecting whether there is an abnormality related to the bias voltage with respect to a value on a diagonal of the Jacobian matrix of non-zero elements, a sum of values of respective columns and rows, and a value of the Jacobian matrix.
In one embodiment, before performing bias-independent anomaly detection on the detection parameter, the method further includes:
judging whether abnormal detection unrelated to the bias voltage is performed or not according to the marks of all devices in the circuit detection model;
performing an abnormality detection unrelated to the bias voltage if it is determined that the abnormality detection unrelated to the bias voltage has not been performed; skipping if it is determined that the abnormality detection unrelated to the bias voltage is performed.
In order to solve the above technical problem, an embodiment of the present invention further provides an anomaly detection apparatus for a circuit simulation model, including:
the starting module is configured to start a simulation flow of the circuit simulation model;
a first execution module configured to determine a detection parameter related to a synthetic result according to a type of the circuit simulation model, and execute an abnormality detection unrelated to a bias voltage according to the detection parameter;
a second execution module configured to execute anomaly detection related to the bias voltage according to a Jacobian matrix and a right-end term of the circuit simulation model;
an output module configured to output a result of the anomaly detection.
In one embodiment, the first execution module includes:
a first determining submodule configured to determine a type of the circuit simulation model from a circuit netlist;
a second determination sub-module configured to, when the type of the circuit simulation model is a diode model, determine a detection parameter related to a synthesis result including: length parameters of the effective channel, width of the effective channel, constant resistance, constant capacitance and saturation current;
a third determining submodule configured to determine, when the type of the circuit simulation model is a bipolar junction transistor model, the detection parameter related to the integrated result includes: constant resistance, constant capacitance and saturation current;
a fourth determination submodule configured to, when the type of the circuit simulation model is a metal-oxide semiconductor field effect transistor model, determine the detection parameter related to the integrated result including: the length of the effective channel, the width of the effective channel, the constant resistance, the constant capacitance, and the saturation current.
In one embodiment, the second execution module includes:
a first detection sub-module configured to detect whether there is an abnormality related to the bias voltage based on a value on a diagonal of the Jacobian matrix, a sum of values of respective columns and rows, and a value of the Jacobian matrix;
a second detection submodule configured to detect whether there is an abnormality related to the bias voltage based on values of all the nodes of the right-end item.
In one embodiment, the second execution module further comprises:
a fifth determination submodule configured to determine linear nodes and non-linear nodes of the circuit simulation model;
a sixth determination submodule configured to determine, for the non-linear node, whether a numerical value in the Jacobian matrix is zero;
the first detection submodule is configured to detect whether there is an abnormality related to the bias voltage with respect to a value on a diagonal line of the Jacobian matrix of non-zero elements, a sum of values of respective rows and columns, and a value of the Jacobian matrix.
In one embodiment, the apparatus further comprises:
a judging module configured to judge whether or not abnormality detection has been performed irrespective of the bias voltage, based on a flag of each device in the circuit detection model;
the first execution module executes the abnormality detection unrelated to the bias voltage when the judgment module judges that the abnormality detection unrelated to the bias voltage is not executed; skipping when the determining module determines that the abnormality detection unrelated to the bias voltage is performed.
Advantageous effects
According to the abnormity detection method and device for the circuit simulation model, provided by the embodiment of the invention, the abnormity of the circuit simulation model can be automatically detected in the circuit simulation process, including the abnormity irrelevant to bias voltage and the abnormity relevant to bias voltage, the correctness of a model matrix is improved, the iteration times of solving an equation set are reduced, and the simulation efficiency and the simulation precision are improved.
On the other hand, for a device which has been subjected to abnormality detection irrespective of bias voltage, detection is not repeated, thereby saving detection time; for the detection related to the bias voltage, the detection is only performed on the non-linear nodes and the non-zero elements of the Jacobian matrix, the detection times are reduced, and the detection efficiency is improved.
On the other hand, by applying the anomaly detection method and the anomaly detection device provided by the invention, the solving speed of the equation set can be improved, and once the Jacobian matrix filling error occurs in the anomaly detection related to the bias voltage, the iteration times of the equation set solving can be increased, which restricts the simulation speed of the circuit. The invention performs abnormal inspection related to bias voltage in the simulation process, provides matrix error information, and is convenient for quickly positioning the Jacobian matrix filling problem, thereby improving the accuracy of the Jacobian matrix and further improving the solving speed of the equation set.
Drawings
FIG. 1 is a flow chart of an anomaly detection method for a circuit simulation model according to an embodiment of the present invention;
FIG. 2 is a flow chart of an anomaly detection method for a circuit simulation model according to another embodiment of the present invention;
FIG. 3 is a flow chart of an anomaly detection method for a circuit simulation model according to another embodiment of the present invention;
FIG. 4 is a flow chart of an anomaly detection method for a circuit simulation model according to another embodiment of the present invention;
FIG. 5 is a schematic structural diagram of an anomaly detection apparatus for a circuit simulation model according to an embodiment of the present invention;
FIG. 6 is a schematic structural diagram of an anomaly detection apparatus for a circuit simulation model according to another embodiment of the present invention;
FIG. 7 is a schematic structural diagram of an anomaly detection apparatus for a circuit simulation model according to another embodiment of the present invention;
fig. 8 is a schematic structural diagram of an anomaly detection apparatus for a circuit simulation model according to another embodiment of the present invention.
Detailed Description
The embodiments of the present invention are not limited to the following examples, and can be arbitrarily selected and modified within a range not affecting the technical effects to be achieved by the present invention.
In order that the invention may be more readily understood, the terms used are defined as follows.
As shown in fig. 1, a flowchart of an anomaly detection method for a circuit simulation model according to an embodiment of the present invention may include the following steps:
and step 110, starting a simulation flow of the circuit simulation model.
In the step of the present disclosure, a simulation flow is started for a circuit simulation model to be subjected to anomaly detection.
And step 120, determining detection parameters related to the comprehensive result according to the type of the circuit simulation model, and performing bias-independent anomaly check according to the detection parameters.
In the steps of the present disclosure, the abnormal detection unrelated to the bias voltage is also referred to as static detection, and in the static detection, the detection parameters related to the integrated result are determined according to the type of the circuit simulation model.
The types of the circuit simulation model may include: diode models, bipolar junction transistor models, and metal-oxide semiconductor field effect transistor models.
In one embodiment, anomaly detection is performed on corresponding detection parameters for various types of circuit simulation models. The detection parameters are different from the simple parameters in the prior art, are parameters finally used for calculating and determining the final detection result, and are called detection parameters related to the comprehensive result. For example: the detection parameter called the effective channel length related to the effective channel length generally relates to a plurality of parameters, and even if all the parameters are valid, the comprehensive calculation result is not necessarily valid, and the plurality of parameters are simple parameters. The detection parameters of the effective channel length related to the integrated result are influenced by the channel length, scale parameters, etching and masking, diffusion length and the like.
And step 130, according to the Jacobian matrix and the right end item of the circuit simulation model, executing abnormal detection related to the bias voltage.
In this step, the bias-related anomaly checking may also be referred to as dynamic monitoring, including: and carrying out anomaly detection according to the Jacobian matrix of the non-zero values, and carrying out anomaly detection according to the values of all the nodes of the right-end item.
And step 140, outputting the result of the abnormal detection.
In this embodiment, a corresponding file may be output based on the result of the anomaly detection, and the value of the anomaly, the detection parameter of the anomaly, and the like may be recorded in detail in the file; an alarm can also be given based on the detected abnormality to remind the technician to adjust in time.
In one embodiment, the bias voltage independent anomaly detection results and the bias voltage dependent anomaly detection results may be presented separately in separate files for ease of viewing.
Therefore, according to the abnormality detection method for the circuit simulation model provided by the embodiment of the invention, the detection parameters related to the comprehensive calculation result are determined according to the type of the circuit simulation model, and the abnormality detection unrelated to the bias voltage is performed on the detection parameters, so that the abnormality unrelated to the bias voltage can be quickly detected, the circuit simulation time is saved, and the abnormality detection range is expanded. In addition, the abnormity detection related to the bias voltage is executed through the Jacobian matrix and the right end item, and the reliability of the simulation result can be improved.
The technical solutions provided by the embodiments of the present disclosure are described below with specific embodiments.
As shown in fig. 2, a flowchart of an anomaly detection method for a circuit simulation model according to another embodiment of the present invention is provided, and on the basis of the embodiment shown in fig. 1, step 120 may be implemented by the following steps:
and step 121, determining the type of the circuit simulation model and detection parameters related to the comprehensive result.
In the step of the present disclosure, first, the type of the circuit simulation model is determined according to the circuit netlist. In this embodiment, the types of the circuit simulation model may include: diode models, bipolar junction transistor models, and metal-oxide semiconductor field effect transistor models.
For the diode model, determining the detection parameters thereof related to the integrated result comprises: the detection parameters of the effective channel length, the detection parameters of the effective channel width, the detection parameters of the constant resistance, the detection parameters of the constant capacitance and the detection parameters of the saturation current.
For the bipolar junction transistor model, determining the detection parameters thereof related to the integrated result comprises: a detection parameter of the constant resistance, a detection parameter of the constant capacitance, and a detection parameter of the saturation current.
Determining, for a metal-oxide semiconductor field effect transistor model, a detection parameter related to the integrated result comprises: the detection parameters of the effective channel length, the detection parameters of the effective channel width, the detection parameters of the constant resistance, the detection parameters of the constant capacitance and the detection parameters of the saturation current.
Specifically, when the type of circuit simulation model is a diode model:
judging whether the detection parameter of the effective channel length is smaller than 1e-3 and larger than 1e-9, and determining that the detection is abnormal when the detection parameter of the effective channel length is judged to exceed the value range; the value range in this embodiment is set empirically.
Judging whether the detection parameter of the effective channel width is smaller than 1e-3 and larger than 1e-9, and determining that the detection is abnormal when the detection parameter of the effective channel width exceeds the value range;
judging whether the detection parameter of the constant resistor is less than 1e-3, and determining that the detection is abnormal when the detection parameter of the constant resistor is less than 1 e-3;
judging whether the detection parameter of the constant capacitor is larger than 1e-9, and determining that the detection is abnormal when the detection parameter of the constant capacitor is judged to be larger than 1 e-9;
and judging whether the detection parameter of the saturation current is larger than 1e-5, and determining that the detection is abnormal when the detection parameter of the saturation current is judged to be larger than 1 e-5.
The detection of the detection parameters in the present embodiment is not limited to the above-described order.
When the type of circuit simulation model is a bipolar junction transistor model:
judging whether the detection parameter of the constant resistor is less than 1e-3, and determining that the detection is abnormal when the detection parameter of the constant resistor is less than 1 e-3;
judging whether the detection parameter of the constant capacitor is larger than 1e-9, and determining that the detection is abnormal when the detection parameter of the constant capacitor is judged to be larger than 1 e-9;
and judging whether the detection parameter of the saturation current is larger than 1e-5, and determining that the detection is abnormal when the detection parameter of the saturation current is judged to be larger than 1 e-5.
The detection of the detection parameters in the present embodiment is not limited to the above-described order.
When the type of the circuit simulation model is a metal-oxide semiconductor field effect transistor model:
judging whether the detection parameter of the effective channel length is smaller than 1e-3 and larger than 1e-9, and determining that the detection is abnormal when the detection parameter of the effective channel length is judged to be beyond the range;
judging whether the detection parameter of the effective channel width is smaller than 1e-3 and larger than 1e-9, and determining that the detection is abnormal when the detection parameter of the effective channel width is judged to be beyond the range;
judging whether the detection parameter of the constant resistor is less than 1e-3, and determining that the detection is abnormal when the detection parameter of the constant resistor is less than 1 e-3;
judging whether the detection parameter of the constant capacitor is larger than 1e-9, and determining that the detection is abnormal when the detection parameter of the constant capacitor is judged to be larger than 1 e-9;
and judging whether the detection parameter of the saturation current is larger than 1e-5, and determining that the detection is abnormal when the detection parameter of the saturation current is judged to be larger than 1 e-5.
The detection of the detection parameters in the present embodiment is not limited to the above-described order.
In one embodiment, the device that has performed bias independent anomaly detection is flagged; before the bias-independent abnormality detection is performed, it is first determined by a flag whether or not the bias-independent abnormality detection has been performed, and if so, it is skipped and not repeated, and if not, it is performed.
Therefore, according to the anomaly detection method for the circuit simulation model, the detection parameters related to the comprehensive result are determined according to the type of the circuit simulation model, the anomaly unrelated to the bias voltage can be automatically and quickly detected, the anomaly information is output, the circuit simulation time is saved, meanwhile, the detection parameters related to the comprehensive result can more comprehensively reflect the anomaly existing in the circuit simulation model, and the matrix correctness of the circuit simulation model is improved.
As shown in fig. 3, a flowchart of an anomaly detection method for a circuit simulation model according to another embodiment of the present invention is provided, and on the basis of the embodiment shown in fig. 1, step 130 may be implemented by the following steps:
In the step of this disclosure, whether or not there is an abnormality related to the bias voltage is detected mainly based on the value on the diagonal of the jacobian matrix, the sum of the values of each row and each column of the jacobian matrix, and the presence or absence of a non-zero value among the non-zero values of the jacobian matrix.
The method specifically comprises the following steps (not shown in the figure):
step 1311, reading a numerical value on a diagonal line of the Jacobian matrix;
step 1312, determining whether the value on the diagonal of the Jacobian matrix is smaller than zero, and if so, determining that the bias-related abnormality exists.
Step 1313, reading the numerical value of each row and each column of the Jacobian matrix;
step 1314, performing summation operation on the numerical values of each row, and performing summation operation on the numerical values of each column;
step 1315, summing the sum of the number of rows and the sum of the number of columns;
before the summation operation is performed on the numerical values of each row, the summation operation may be performed on the numerical values greater than zero, then the summation operation may be performed on the numerical values less than zero, and finally the summation operation may be performed on the obtained sum of the two numerical values. Similarly, before the summation operation is performed on the numerical values in each column, the summation operation may be performed on the numerical values greater than zero, then the summation operation may be performed on the numerical values less than zero, and finally the summation operation may be performed on the obtained sum of the two numerical values.
1316, judging whether the sum of the values of each row and each column is zero;
step 1317, if the determination is not zero, then it is determined that an anomaly related to the bias voltage exists.
Step 1318, reading all numerical values in the Jacobian matrix;
step 1319, determining whether the value in the jacobian matrix is a non-numeric value (NAN);
when the other bits except the first bit of the floating-point number are all 1, the floating-point number is a non-digital value; when two out-of-range floating-point numbers are operated on, the operation result also becomes a non-numeric value.
Step 13110, if it is determined that the numerical value in the Jacobian matrix has a non-numerical value, then it is determined that there is an abnormality with respect to the bias voltage.
Non-digital values, which are used to handle error conditions that occur in the calculations, such as 0.0 divided by 0.0, or square root of a negative number.
In particular, the following steps (not shown in the figures) may be included:
step 1321, reading all numerical values of the right-end item;
step 1322, performing summation operation on all numerical values of the right-end term;
step 1323, judging whether the sum of all numerical values of the right-end item is zero;
if the summation of all the values of the right-end term is determined not to be zero, step 1324, it is determined that there is an abnormality related to the bias voltage.
The sequence of the steps 131 and 132 may be adjusted according to actual conditions.
Because the linear equation system is solved mainly by the Jacobian matrix and the corresponding right-end term, if the Jacobian matrix is not matched with the right-end term, Newton iteration is difficult to converge, so that the iteration times are increased, even the solution result after convergence is wrong or not converged, and finally simulation failure is caused. The accuracy of the jacobian matrix is very important. The conductance and capacitance of the fill in the Jacobian matrix are parameters related to bias voltage.
Therefore, the abnormity detection method for the circuit simulation model provided by the invention can rapidly detect the abnormity related to bias voltage by judging the numerical value in the Jacobian matrix and the numerical values of all nodes of the right end item, the matrix error information is favorable for rapidly positioning the filling problem of the Jacobian matrix, the precision of the Jacobian matrix is improved, and the solving speed of an equation set is further improved.
As shown in fig. 4, a flowchart of an anomaly detection method for a circuit simulation model according to another embodiment of the present invention may include the following steps before step 130, in combination with the embodiment shown in fig. 1:
and step 141, determining linear nodes and nonlinear nodes of the circuit simulation model.
The linear nodes of the circuit simulation model can be determined according to the physical characteristics of the circuit simulation model, and after the linear nodes are determined, the rest nodes are nonlinear nodes.
And 142, determining whether the numerical value in the Jacobian matrix is zero or not aiming at the nonlinear node.
In this embodiment, the linear node may be marked, and when the bias-related abnormality detection is performed, whether detection is required or not may be determined by whether the mark is present or not. And skipping over marked nodes and carrying out abnormity detection on unmarked nodes, namely nonlinear nodes.
Step 143 detects whether there is an abnormality related to the bias voltage with respect to the values on the diagonal line of the Jacobian matrix of the non-zero elements, the sum of the values of each row and each column, and the value of the Jacobian matrix.
If the dimension of the jacobian matrix is n, then checking each element in the jacobian matrix requires n × n number of bias-related anomaly detections, which is relatively large. Thus, firstly, whether the elements in the Jacobian matrix are zero or not is determined, and the anomaly detection is only carried out aiming at the non-zero elements; if the matrix element is zero, no bias-related anomaly detection is performed.
Therefore, according to the anomaly detection method for the circuit simulation model, provided by the invention, by distinguishing the linear nodes and the nonlinear nodes in the circuit simulation model, because the matrixes of the linear nodes are irrelevant to bias voltage, errors are not easy to occur, and only the nonlinear nodes are subjected to anomaly detection, so that unnecessary detection times are reduced; on the other hand, the abnormity detection related to the bias voltage is only carried out on the non-zero elements in the Jacobian matrix, the detection frequency can be further reduced, and the detection efficiency can be improved.
As shown in fig. 5, a schematic structural diagram of an anomaly detection apparatus for a circuit simulation model according to an embodiment of the present invention is provided, where the apparatus may include: a starting module 110, a first execution module 120, a second execution module 130, and an output module 140.
The starting module 110 is configured to start a simulation process of the circuit simulation model;
a first execution module 120 configured to determine a detection parameter related to the integrated result according to a type of the circuit simulation model, and execute an abnormality detection unrelated to the bias voltage according to the detection parameter;
a second execution module 130 configured to perform anomaly detection related to the bias voltage according to a Jacobian matrix and a right-end term of the circuit simulation model;
an output module 140 configured to output a result of the anomaly detection.
Therefore, the anomaly detection device for the circuit simulation model provided by the invention can quickly detect the anomaly unrelated to the bias voltage, save the circuit simulation time and expand the anomaly detection range by determining the detection parameters related to the calculation result according to the type of the circuit simulation model and executing the anomaly detection unrelated to the bias voltage on the detection parameters. In addition, the abnormity detection related to the bias voltage is executed through the Jacobian matrix and the right end item, and the reliability of the simulation result can be improved.
As shown in fig. 6, a schematic structural diagram of an abnormality detection apparatus for a circuit simulation model according to another embodiment of the present invention is provided, and based on the embodiment shown in fig. 5 and in combination with the embodiment shown in fig. 2, the first execution module 120 may include: a first determination submodule 121, a second determination submodule 122, a third determination submodule 123 and a fourth determination submodule 124.
A first determining submodule 121 configured to determine a type of the circuit simulation model according to a circuit netlist;
a second determining sub-module 122 configured to, when the type of the circuit simulation model is a diode model, determine the detection parameter related to the integrated result including: length parameters of the effective channel, width of the effective channel, constant resistance, constant capacitance and saturation current;
a third determining submodule 123 configured to, when the type of the circuit simulation model is a bipolar junction transistor model, determine the detection parameter related to the integrated result including: constant resistance, constant capacitance and saturation current;
a fourth determining sub-module 124 configured to, when the type of the circuit simulation model is a metal-oxide semiconductor field effect transistor model, determine the detection parameter related to the synthesized result including: the length of the effective channel, the width of the effective channel, the constant resistance, the constant capacitance, and the saturation current.
Therefore, the anomaly detection device for the circuit simulation model provided by the embodiment of the invention determines the detection parameters according to the type of the circuit simulation model, performs anomaly detection on the detection parameters in a simple to complex manner, can quickly detect the anomaly irrelevant to the bias voltage and output the anomaly information, saves the circuit simulation time, and meanwhile, the detection parameters related to the comprehensive result can more comprehensively reflect the anomaly existing in the circuit simulation model, and improves the accuracy of the matrix of the circuit simulation model.
As shown in fig. 7, a schematic structural diagram of an abnormality detection apparatus for a circuit simulation model according to another embodiment of the present invention is provided, and based on the embodiment shown in fig. 5 and in combination with the embodiment shown in fig. 3, the second execution module 130 may include: a first detection submodule 131 and a second detection submodule 132.
A first detection submodule 131 configured to detect whether there is an abnormality related to the bias voltage, based on a value on a diagonal line of the Jacobian matrix, a sum of values of rows and columns, and a value of the Jacobian matrix;
a second detection submodule 132 configured to detect whether there is an abnormality related to the bias voltage based on the values of all the nodes of the right-end item.
Therefore, the anomaly detection device for the circuit simulation model provided by the embodiment of the invention can quickly detect the anomaly related to bias voltage by judging the numerical values in the Jacobian matrix and the numerical values of all nodes of the right end item, the matrix error information is favorable for quickly positioning the filling problem of the Jacobian matrix, the accuracy of the Jacobian matrix is improved, and the solving speed of an equation set is further improved.
As shown in fig. 8, a schematic structural diagram of an abnormality detection apparatus for a circuit simulation model according to another embodiment of the present invention is provided, and based on the embodiment shown in fig. 7 and in combination with the embodiment shown in fig. 4, the second execution module 130 may further include: a fifth determination submodule 133 and a sixth determination submodule 134.
A fifth determining submodule 133 configured to determine linear nodes and non-linear nodes of the circuit simulation model;
a sixth determining submodule 134 configured to determine, for the non-linear node, whether a value in the Jacobian matrix is zero;
the first detection submodule 131 is configured to detect whether there is an abnormality related to the bias voltage for the values on the diagonal of the jacobian matrix of non-zero elements, the sum of the values of each row and each column, and the value of the jacobian matrix.
Therefore, according to the anomaly detection device for the circuit simulation model provided by the embodiment of the invention, the linear nodes and the nonlinear nodes in the circuit simulation model are distinguished, and only the nonlinear nodes are subjected to anomaly detection, so that unnecessary detection times are reduced; on the other hand, the abnormity detection related to the bias voltage is only carried out on the non-zero elements in the Jacobian matrix, the detection frequency can be further reduced, and the detection efficiency can be improved.
In an embodiment, the apparatus may further include: a decision block (not shown).
A judging module configured to judge whether or not abnormality detection has been performed irrespective of the bias voltage, based on a flag of each device in the circuit detection model;
the first execution module 120 executes the abnormality detection unrelated to the bias voltage when the determination module determines that the abnormality detection unrelated to the bias voltage is not executed; skipping when the determining module determines that the abnormality detection unrelated to the bias voltage is performed.
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
It will be understood that the present disclosure is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.
Claims (10)
1. An anomaly detection method for a circuit simulation model, comprising:
starting a simulation flow of the circuit simulation model;
determining a detection parameter related to a synthetic result according to the type of the circuit simulation model, and performing bias-independent anomaly detection according to the detection parameter, wherein the detection parameter related to the synthetic result comprises: finally, parameters for calculating and determining a final detection result;
according to the Jacobian matrix and the right end item of the circuit simulation model, the abnormal detection related to the bias voltage is executed, and the method specifically comprises the following steps: carrying out anomaly detection according to the Jacobian matrix of the non-zero value and carrying out anomaly detection according to the values of all the nodes of the right-end item;
and outputting the result of the abnormality detection.
2. The method of claim 1, wherein determining the detection parameter related to the integrated result based on the type of the circuit simulation model comprises:
determining the type of the circuit simulation model according to the circuit netlist;
when the type of the circuit simulation model is a diode model, determining the detection parameter related to the comprehensive result comprises: length parameters of the effective channel, width of the effective channel, constant resistance, constant capacitance and saturation current;
when the type of the circuit simulation model is a bipolar junction transistor model, determining the detection parameters related to the comprehensive result comprises: constant resistance, constant capacitance and saturation current;
when the type of the circuit simulation model is a metal-oxide semiconductor field effect transistor model, determining detection parameters related to the comprehensive result comprises: the length of the effective channel, the width of the effective channel, the constant resistance, the constant capacitance, and the saturation current.
3. The method of claim 1, wherein performing bias voltage related anomaly detection according to the Jacobian matrix and the right-end term of the circuit simulation model comprises:
detecting whether an abnormality related to the bias voltage exists or not according to a value on a diagonal line of the Jacobian matrix, a sum of values of rows and columns, and a value of the Jacobian matrix;
and detecting whether the abnormity related to the bias voltage exists according to the values of all the nodes of the right end item.
4. The method according to claim 3, wherein before detecting whether there is an anomaly according to the values on the diagonal of the Jacobian matrix, the sum of the values of each row and each column, and the value of the Jacobian matrix, the method further comprises:
determining linear nodes and nonlinear nodes of the circuit simulation model;
determining, for the non-linear node, whether a numerical value in the Jacobian matrix is zero;
detecting whether there is an abnormality related to the bias voltage with respect to a value on a diagonal of the Jacobian matrix of non-zero elements, a sum of values of respective columns and rows, and a value of the Jacobian matrix.
5. The method of claim 1, wherein prior to performing bias-independent anomaly detection on the detected parameters, further comprising:
judging whether abnormal detection unrelated to the bias voltage is performed or not according to the marks of all devices in the circuit detection model;
performing an abnormality detection unrelated to the bias voltage if it is determined that the abnormality detection unrelated to the bias voltage has not been performed; skipping if it is determined that the abnormality detection unrelated to the bias voltage is performed.
6. An abnormality detection device for a circuit simulation model, comprising:
the starting module is configured to start a simulation flow of the circuit simulation model;
a first execution module configured to determine a detection parameter related to a synthetic result according to a type of the circuit simulation model, and execute bias-independent anomaly detection according to the detection parameter, the detection parameter related to the synthetic result including: finally, parameters for calculating and determining a final detection result;
the second execution module is configured to execute the abnormality detection related to the bias voltage according to the Jacobian matrix and the right end item of the circuit simulation model, and specifically comprises: carrying out anomaly detection according to the Jacobian matrix of the non-zero value and carrying out anomaly detection according to the values of all the nodes of the right-end item;
an output module configured to output a result of the anomaly detection.
7. The apparatus of claim 6, wherein the first execution module comprises:
a first determining submodule configured to determine a type of the circuit simulation model from a circuit netlist;
a second determination sub-module configured to, when the type of the circuit simulation model is a diode model, determine a detection parameter related to a synthesis result including: length parameters of the effective channel, width of the effective channel, constant resistance, constant capacitance and saturation current;
a third determining sub-module configured to, when the type of the circuit simulation model is a bipolar junction transistor model, determine a detection parameter related to a synthesized result including: constant resistance, constant capacitance and saturation current;
a fourth determination submodule configured to, when the type of the circuit simulation model is a metal-oxide semiconductor field effect transistor model, determine the detection parameter related to the integrated result including: the length of the effective channel, the width of the effective channel, the constant resistance, the constant capacitance, and the saturation current.
8. The apparatus of claim 6, wherein the second execution module comprises:
a first detection sub-module configured to detect whether there is an abnormality related to the bias voltage based on a value on a diagonal of the Jacobian matrix, a sum of values of respective columns and rows, and a value of the Jacobian matrix;
a second detection submodule configured to detect whether there is an abnormality related to the bias voltage based on values of all the nodes of the right-end item.
9. The apparatus of claim 8, wherein the second execution module further comprises:
a fifth determination submodule configured to determine linear nodes and non-linear nodes of the circuit simulation model;
a sixth determination submodule configured to determine, for the non-linear node, whether a numerical value in the Jacobian matrix is zero;
the first detection submodule is configured to detect whether there is an abnormality related to the bias voltage with respect to a value on a diagonal line of the Jacobian matrix of non-zero elements, a sum of values of respective rows and columns, and a value of the Jacobian matrix.
10. The apparatus of claim 6, further comprising:
a judging module configured to judge whether or not abnormality detection has been performed irrespective of the bias voltage, based on a flag of each device in the circuit detection model;
the first execution module executes the abnormality detection unrelated to the bias voltage when the judgment module judges that the abnormality detection unrelated to the bias voltage is not executed; skipping when the determining module determines that the abnormality detection unrelated to the bias voltage is performed.
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