CN112069755B - Impedance detection method, system, equipment and storage medium of PCB power supply - Google Patents
Impedance detection method, system, equipment and storage medium of PCB power supply Download PDFInfo
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- 238000000034 method Methods 0.000 claims description 22
- 239000003990 capacitor Substances 0.000 claims description 21
- 238000004590 computer program Methods 0.000 claims description 9
- 238000010276 construction Methods 0.000 claims description 8
- 230000007547 defect Effects 0.000 abstract description 6
- 230000000694 effects Effects 0.000 abstract 1
- 238000004364 calculation method Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
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- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/32—Circuit design at the digital level
- G06F30/333—Design for testability [DFT], e.g. scan chain or built-in self-test [BIST]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/32—Circuit design at the digital level
- G06F30/33—Design verification, e.g. functional simulation or model checking
- G06F30/3323—Design verification, e.g. functional simulation or model checking using formal methods, e.g. equivalence checking or property checking
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- G—PHYSICS
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
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Abstract
The application discloses an impedance detection method of a PCB power supply, comprising the following steps: after the simulation preparation operation is completed, determining the equivalent impedance value to the ground of the load chip according to the parameter information of the PCB; constructing a target model based on the equivalent impedance value to the ground, and setting the target model between the power supply output end and the ground; setting simulation frequency and performing simulation to obtain an impedance detection result under the simulation frequency. By applying the scheme, more accurate impedance detection results are obtained, the design defect of the PCB power supply can be determined more accurately, risk design is avoided, and power supply integrity is improved. The application also provides an impedance detection system, equipment and a storage medium of the PCB power supply, and the impedance detection system has corresponding technical effects.
Description
Technical Field
The present invention relates to the field of PCB design technologies, and in particular, to a method, a system, an apparatus, and a storage medium for detecting impedance of a PCB power supply.
Background
The frequency domain impedance is one of the key points of the power integrity design, for example, in practical application, the impedance value of the power system is under the target impedance from the low frequency band to the high frequency band through the arrangement of the decoupling capacitor, so that the power loss can be effectively reduced, and the working stability and efficiency of the system can be improved.
In particular, in point-of-load (point-of-load) power applications in board-level power systems, extreme efficiency is often sought, and in particular, in the case of low-voltage high currents, load variations are amplified and reflected in losses. The simulation is taken as an auxiliary design means, so that the design defect of the PCB power supply can be detected in advance, the risk design can be avoided, and the power supply integrity is improved. At present, some mature simulation modes exist, but the simulation precision still needs to be improved.
In summary, how to effectively improve the simulation accuracy to more accurately detect the impedance of the PCB power supply is a technical problem that needs to be solved by those skilled in the art.
Disclosure of Invention
The invention aims to provide a method, a system, equipment and a storage medium for detecting the impedance of a PCB power supply, so as to effectively improve simulation precision and more accurately detect the impedance of the PCB power supply.
In order to solve the technical problems, the invention provides the following technical scheme:
an impedance detection method of a PCB power supply, comprising:
after the simulation preparation operation is completed, determining the equivalent impedance value to the ground of the load chip according to the parameter information of the PCB;
constructing a target model based on the equivalent impedance value to ground, and setting the target model between a power supply output end and ground;
setting simulation frequency and performing simulation to obtain an impedance detection result under the simulation frequency.
Preferably, the determining the equivalent impedance value to ground of the load chip according to the parameter information of the PCB includes:
according to the parameter information of the PCB, determining parasitic resistance, parasitic inductance and parasitic capacitance of the load chip;
and determining the equivalent impedance value to ground of the load chip based on the determined parasitic resistance, the parasitic inductance and the parasitic capacitance.
Preferably, the determining the parasitic resistance, the parasitic inductance and the parasitic capacitance of the load chip according to the parameter information of the PCB includes:
according toThe parasitic capacitance ESC of the load chip is determined, and the parasitic resistance ESR of the load chip is determined based on ESR=G.J.h+t.d.n.g+loadline, based on +.>Determining the parasitic inductance ESL of the load chip;
wherein epsilon represents the dielectric constant of the PCB board, x represents the total number of layers of the power supply layer, and D i Represents the power layer thickness of the ith layer among the power layers of the x layer, S i Represents the vertical projection area of the ith layer in the power supply layer of the x layers on the load chip, J represents the area of the bonding pad, and h represents the height of the bonding padThe degree, A represents the number of bonding pads, K represents the electrostatic force constant, S represents the thickness of an insulating layer, G represents the solder conductivity, t represents the area of a via hole, N represents the number of via holes on a power supply path of a power supply, d represents the thickness of hole copper, loadline represents a given impedance value of a load chip, mu represents the vacuum permeability, and N represents the number of turns of a coil.
Preferably, the determining, based on the determined parasitic resistance, the parasitic inductance and the parasitic capacitance, a value of equivalent impedance to ground of the load chip includes:
according toDetermining the equivalent impedance value Zf of the load chip to the ground;
where ω represents the circular frequency, j represents the imaginary sign, f=2ρω, f represents the simulation frequency, and// represents the parallel.
Preferably, the constructing the target model based on the equivalent impedance value to ground includes:
constructing a target model composed of a first resistor, a first capacitor and a first inductor based on the equivalent impedance value to ground;
the resistance value of the first resistor is equal to M times of the equivalent impedance value to the ground, M is a preset parameter, and the first end of the first resistor is connected with the first end of the first capacitor and is used as the first end of the target model to be connected with the power output end; the second end of the first capacitor is connected with the first end of the first inductor; the second end of the first inductor is connected with the second end of the first resistor and is used as the second end of the target model to be grounded.
Preferably, after determining the equivalent impedance value to ground of the load chip, the method further comprises:
judging whether the determined equivalent impedance value to the ground is larger than a preset first resistance threshold value or not;
if not, executing the operation of constructing a target model based on the equivalent impedance value to ground;
if yes, the construction of the target model is abandoned, simulation is carried out according to a preset general simulation mode, and an impedance detection result aiming at the PCB power supply is obtained.
An impedance detection system for a PCB power supply, comprising:
the ground equivalent impedance value determining module is used for determining the ground equivalent impedance value of the load chip according to the parameter information of the PCB after the simulation preparation operation is completed;
the target model construction module is used for constructing a target model based on the equivalent impedance value to the ground and setting the target model between the power supply output end and the ground;
and the impedance detection result output module is used for setting simulation frequency and simulating to obtain an impedance detection result under the simulation frequency.
Preferably, the equivalent impedance value to ground determining module is specifically configured to:
after the simulation preparation operation is completed, determining parasitic resistance, parasitic inductance and parasitic capacitance of the load chip according to the parameter information of the PCB;
and determining the equivalent impedance value to ground of the load chip based on the determined parasitic resistance, the parasitic inductance and the parasitic capacitance.
An impedance detection apparatus of a PCB power supply, comprising:
a memory for storing a computer program;
a processor for executing the computer program to implement the impedance detection method of the PCB power supply of any one of the above.
A computer readable storage medium having stored thereon a computer program which when executed by a processor implements the method of impedance detection of a PCB power supply of any of the above.
By applying the technical scheme provided by the embodiment of the invention, the equivalent impedance value to the ground of the load chip is not considered in the traditional simulation scheme, and although the equivalent impedance value to the ground of the load chip is a small amount compared with the given impedance value of the load chip, in a common frequency range, the traditional simulation scheme can obtain a more correct impedance curve, but in the frequency range of less than 100Khz and more than 100Mhz, the error of the traditional scheme is larger. According to the scheme, after the equivalent impedance value to the ground of the load chip is determined according to the parameter information of the PCB, the target model is constructed based on the equivalent impedance value to the ground, and the target model is arranged between the power output end and the ground, namely, the parasitic parameter of the load chip is considered in the scheme of the application, so that more accurate impedance detection results are obtained, the design defect of the PCB power supply can be determined more accurately, risk design is avoided, and the power supply integrity is improved.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flowchart of an impedance detection method for a PCB power supply according to the present invention;
FIG. 2 is a schematic diagram of a target model according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of an impedance detection system of a PCB power supply according to the present invention;
fig. 4 is a schematic structural diagram of an impedance detecting apparatus for a PCB power supply according to the present invention.
Detailed Description
The core of the invention is to provide the impedance detection method of the PCB power supply, which is favorable for obtaining more accurate impedance detection results, and can more accurately determine the design defects of the PCB power supply, thereby avoiding risk design and improving the integrity of the power supply.
In order to better understand the aspects of the present invention, the present invention will be described in further detail with reference to the accompanying drawings and detailed description. It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1, fig. 1 is a flowchart illustrating an implementation of a method for detecting impedance of a PCB power supply according to the present invention, the method for detecting impedance of the PCB power supply may include the following steps:
step S101: after the simulation preparation operation is completed, determining the equivalent impedance value to the ground of the load chip according to the parameter information of the PCB.
Specifically, simulation software may be started, for example, the power si software of the feature is used to execute the scheme of the application, after the simulation software is started, the stack information may be configured according to the information of the PCB, and then the corresponding power output port and load port are enabled according to the actual requirement, so as to complete the simulation preparation operation.
After the simulation preparation operation is completed, the equivalent impedance value to the ground of the load chip is determined according to the parameter information of the PCB.
The specific manner of determining the equivalent impedance value to ground of the load chip may be various, for example, in one specific embodiment of the present invention, two steps may be included:
step one: according to the parameter information of the PCB, determining parasitic resistance, parasitic inductance and parasitic capacitance of the load chip;
step two: and determining the equivalent impedance value to ground of the load chip based on the determined parasitic resistance, parasitic inductance and parasitic capacitance.
In determining the parasitic resistance, parasitic inductance and parasitic capacitance of the load chip, there are also various calculation modes, and in one embodiment of the present invention, considering that factors such as layer replacement and via hole of the PCB affect the equivalent impedance value to ground of the load chip, therefore, in one embodiment of the present invention, the above step one may specifically include:
according toThe parasitic capacitance ESC of the load chip is determined, and the parasitic resistance ESR of the load chip is determined based on ESR=G.J.h+t.d.n.g+loadline, based on +.>Determining the parasitic inductance ESL of the load chip;
wherein epsilon represents the dielectric constant of the PCB board, x represents the total number of layers of the power supply layer, and D i Represents the power layer thickness of the ith layer among the power layers of the x layer, S i The vertical projection area of the ith layer in the power supply layer of the x layers on the load chip is represented by J, the area of a bonding pad is represented by h, the height of the bonding pad is represented by A, the number of bonding pads is represented by K, the electrostatic force constant is represented by S, the thickness of an insulating layer is represented by G, the solder conductivity is represented by t, the area of a via hole is represented by N, the number of via holes on a power supply path of the power supply is represented by d, the thickness of hole copper is represented by loadline, the given impedance value of the load chip is represented by mu, the vacuum permeability is represented by mu, and the number of turns of a coil is represented by N.
The embodiment provides a specific mode for calculating the parasitic resistance, parasitic inductance and parasitic capacitance of the load chip, considers the influence of factors such as a bonding pad, a via hole, a soldering tin material and the like, is further beneficial to more accurately determining the equivalent impedance value of the load chip to the ground, is simpler and more convenient in calculation mode, and is beneficial to implementation of a scheme.
In addition, it should be noted that n represents the number of vias on the power supply path, and for these n vias, the via areas t of these n vias can be considered to be uniform, and the via copper thicknesses d are also uniform. For a pads, the pad areas J of the a pads can be considered uniform, as can the pad heights h. In practical applications, the value of a is usually 1.
The number of turns N of the coil needs to be approximately calculated, and various calculation modes are available. For example, simplyApproximation, i.e. the line segment perpendicular to the wire can be rotated about the rear end of the wire>Thereby the wire is equivalent to a slightly curved arc, and the number of turns N of the coil is calculated according to the proportion of the arc. Of course, other calculation methods are also possible in practical application. loadline represents a given impedance value of the load chip, which can be found in a chip manual, and the remaining parameters can be obtained in the PCB wiring pattern.
After determining the parasitic resistance, the parasitic inductance and the parasitic capacitance, the equivalent impedance value to ground of the load chip may be determined, for example, in an embodiment of the present invention, the step two may specifically include:
according toDetermining the equivalent impedance value Zf of the load chip to the ground;
where ω represents a circle frequency, j represents an imaginary symbol, f=2ρω, and f represents a simulation frequency. The// in the above formula represents parallel connection.
That is, the simulation frequency f is brought into the above equation, and the equivalent impedance value to ground of the load chip at the simulation frequency can be determined.
Step S102: and constructing a target model based on the equivalent impedance value to the ground, and setting the target model between the power supply output end and the ground.
For example, the target model may be formed by a resistor, where the resistance value of the resistor is equal to the equivalent impedance value to ground calculated in step S101, and the resistor is further disposed between the power output terminal and ground, so as to improve the simulation precision, and determine the impedance detection result more accurately.
Further, in one embodiment of the present invention, the conventional simulation scheme is considered to obtain a more accurate impedance curve in the common frequency band of more than 100Khz and less than 100Mhz, but the error is larger in the low frequency band of less than 100Khz and the ultra-high frequency band of more than 100 Mhz. According to the method, the equivalent impedance value of the load chip to the ground is considered, and the target model is constructed based on the equivalent impedance value to the ground, so that more accurate impedance detection results can be obtained, and the accuracy of the detection results can be improved particularly in the frequency range smaller than 100 Khz. However, in the frequency range above 100Mhz, although the accuracy is improved to some extent, there is still some error in the foregoing embodiments, since the impedance of the parasitic capacitance is more dramatically reflected when the frequency is particularly high.
Thus, in one embodiment of the present invention, step S102 may be specifically:
constructing a target model consisting of a first resistor R, a first capacitor C and a first inductor L based on the equivalent impedance value to ground;
the resistance value of the first resistor R is equal to M times of the equivalent impedance value to the ground, M is a preset parameter, and the first end of the first resistor R is connected with the first end of the first capacitor C and is used as the first end of the target model to be connected with the power supply output end; the second end of the first capacitor C is connected with the first end of the first inductor L; the second end of the first inductor L is connected with the second end of the first resistor R and is used as the second end of the target model to be grounded.
In this embodiment, the RLC model shown in fig. 2 is set as the target model between the power output terminal and the ground, and the first capacitor C connected in parallel with the first resistor R and the first inductor L connected in series with the first capacitor C are set, so that in the high-frequency band, the scheme of the present application can also obtain a relatively accurate simulation result.
In this embodiment, the resistance value of the first resistor R is M times the equivalent impedance value to ground, which is set to be M times the equivalent impedance value to ground, for example, 10 times, because the present application needs to set the built target model between the power output terminal and the ground in order to avoid the influence of the parallel connection on the original model being large, in consideration that the calculated equivalent impedance value to ground is generally small, for example, about 10mΩ.
The capacitance value of the first capacitor C can be adjusted according to practical experience, and can be set to be 100pf generally, this value refers to the process of chip packaging and plating, and the calculation method is similar to the method of calculating the equivalent impedance value to ground of the load chip. In addition, since the model added in the simulation is usually an ideal model, the impedance curve of the capacitor is very different from the actual situation, so that a first inductance L connected in series is also provided as compensation in this embodiment. The inductance value of the first inductor L is used to compensate the ideal capacitance set by us, so that no very specific value is required, and it is usually only required to set a value capable of at least 10 times the impedance of the first capacitor, for example, 50nH, at an ultra-high frequency.
Step S103: setting simulation frequency and performing simulation to obtain an impedance detection result under the simulation frequency.
When the simulation frequencies are different, the values of the device parameters in the target model are different, and the obtained impedance detection results are different. The emulation frequency is the switching frequency on the circuit.
In practical application, through the impedance detection results under different simulation frequencies, the design defect of the PCB power supply can be assisted to be analyzed, so that risk design is avoided, and the power supply integrity is improved.
In a specific embodiment of the present invention, after step S101, the method may further include:
judging whether the determined equivalent impedance value to the ground is larger than a preset first resistance threshold value or not;
if not, executing the operation of constructing a target model based on the equivalent impedance value to the ground;
if yes, the construction of the target model is abandoned, simulation is carried out according to a preset general simulation mode, and an impedance detection result aiming at the PCB power supply is obtained.
In this embodiment, the impedance of the PCB power supply obtained in the simulation is typically not more than 30Ω, considering that the determined equivalent impedance value to ground of the load chip is typically not too large, in fact, even if the power supply output is completely open to ground. Therefore, in this embodiment, when the determined equivalent impedance value to ground is greater than the preset first resistance threshold, the staff needs to consider whether there is a calculation error or an information acquisition error of the PCB, and at this time, the embodiment of the present application gives up the construction of the target model and performs simulation according to the preset general simulation mode to obtain the impedance detection result for the PCB power supply. The general simulation mode can be specifically set as any conventional simulation mode. The value of the first resistance threshold may be set and adjusted according to the actual situation, for example, set to 50Ω.
By applying the technical scheme provided by the embodiment of the invention, the equivalent impedance value to the ground of the load chip is not considered in the traditional simulation scheme, and although the equivalent impedance value to the ground of the load chip is a small amount compared with the given impedance value of the load chip, in a common frequency range, the traditional simulation scheme can obtain a more correct impedance curve, but in the frequency range of less than 100Khz and more than 100Mhz, the error of the traditional scheme is larger. According to the scheme, after the equivalent impedance value to the ground of the load chip is determined according to the parameter information of the PCB, the target model is constructed based on the equivalent impedance value to the ground, and the target model is arranged between the power output end and the ground, namely, the parasitic parameter of the load chip is considered in the scheme of the application, so that more accurate impedance detection results are obtained, the design defect of the PCB power supply can be determined more accurately, risk design is avoided, and the power supply integrity is improved.
Corresponding to the above method embodiment, the embodiment of the invention also provides an impedance detection system of the PCB power supply, which can be correspondingly referred to above.
Referring to fig. 3, a schematic structural diagram of an impedance detection system of a PCB power supply according to the present invention may include:
the equivalent impedance value to ground determining module 301 is configured to determine an equivalent impedance value to ground of the load chip according to the parameter information of the PCB after the simulation preparation operation is completed;
the target model construction module 302 is configured to construct a target model based on the equivalent impedance value to ground, and set the target model between the power output terminal and ground;
and the impedance detection result output module 303 is configured to set a simulation frequency and perform simulation to obtain an impedance detection result under the simulation frequency.
In one embodiment of the present invention, the equivalent impedance value to ground determination module 301 is specifically configured to:
after the simulation preparation operation is completed, determining parasitic resistance, parasitic inductance and parasitic capacitance of the load chip according to the parameter information of the PCB;
and determining the equivalent impedance value to ground of the load chip based on the determined parasitic resistance, parasitic inductance and parasitic capacitance.
In one embodiment of the present invention, the equivalent impedance value to ground determination module 301 is specifically configured to:
according toThe parasitic capacitance ESC of the load chip is determined, and the parasitic resistance ESR of the load chip is determined based on ESR=G.J.h+t.d.n.g+loadline, based on +.>Determining the parasitic inductance ESL of the load chip;
wherein epsilon represents the dielectric constant of the PCB board, x represents the total number of layers of the power supply layer, and D i Represents the power layer thickness of the ith layer among the power layers of the x layer, S i The method comprises the steps of representing the vertical projection area of an ith layer in a power layer of an x layer on a load chip, J representing the area of a bonding pad, h representing the height of the bonding pad, A representing the number of bonding pads, K representing an electrostatic force constant, S representing the thickness of an insulating layer, G representing the electrical conductivity of soldering tin, t representing the area of a via hole, N representing the number of via holes on a power supply path of the power supply, d representing the thickness of copper in the hole, loadline representing a given impedance value of the load chip, mu representing the vacuum permeability, and N representing the number of turns of a coil;
according toDetermining the equivalent impedance value Zf of the load chip to the ground;
where ω represents a circle frequency, j represents an imaginary symbol, f=2ρω, and f represents a simulation frequency.
In one embodiment of the present invention, the object model construction module 302 is specifically configured to:
constructing a target model composed of a first resistor, a first capacitor and a first inductor based on the equivalent impedance value to ground;
the first end of the first resistor is connected with the first end of the first capacitor and is used as the first end of the target model to be connected with the power supply output end; the second end of the first capacitor is connected with the first end of the first inductor; the second end of the first inductor is connected with the second end of the first resistor and is used as the second end of the target model to be grounded.
In one embodiment of the present invention, the method further comprises:
the judging module is used for judging whether the determined equivalent impedance value to the ground is larger than a preset first resistance threshold value;
if not, triggering the target model building module 302;
if yes, triggering a traditional simulation module, wherein the traditional simulation module is used for simulating according to a preset general simulation mode to obtain an impedance detection result aiming at the PCB power supply.
Corresponding to the above method and system embodiments, the embodiments of the present invention also provide an impedance detection device for a PCB power supply and a computer readable storage medium, which can be referred to above in correspondence with each other. The computer readable storage medium has a computer program stored thereon, which when executed by a processor, implements the method for impedance detection of a PCB power supply in any of the above embodiments, where the computer readable storage medium includes Random Access Memory (RAM), memory, read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.
Referring to fig. 4, a schematic structural diagram of an impedance detection apparatus for a PCB power supply according to the present invention includes:
a memory 401 for storing a computer program;
a processor 402 for executing a computer program to implement the impedance detection method of the PCB power supply in any of the above embodiments.
It is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative elements and steps are described above generally in terms of functionality in order to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention. The principles and embodiments of the present invention have been described herein with reference to specific examples, but the description of the examples above is only for aiding in understanding the technical solution of the present invention and its core ideas. It should be noted that it will be apparent to those skilled in the art that various modifications and adaptations of the invention can be made without departing from the principles of the invention and these modifications and adaptations are intended to be within the scope of the invention as defined in the following claims.
Claims (5)
1. An impedance detection method of a PCB power supply, comprising:
after the simulation preparation operation is completed, determining the equivalent impedance value to the ground of the load chip according to the parameter information of the PCB;
constructing a target model based on the equivalent impedance value to ground, and setting the target model between a power supply output end and ground;
setting simulation frequency and performing simulation to obtain an impedance detection result under the simulation frequency;
the determining the equivalent impedance value to the ground of the load chip according to the parameter information of the PCB comprises the following steps:
according to the parameter information of the PCB, determining parasitic resistance, parasitic inductance and parasitic capacitance of the load chip;
determining the equivalent impedance value to ground of the load chip based on the determined parasitic resistance, the parasitic inductance and the parasitic capacitance;
the determining, based on the determined parasitic resistance, the parasitic inductance and the parasitic capacitance, a ground equivalent impedance value of a load chip, includes:
according toDetermining the equivalent impedance value Zf of the load chip to the ground;
wherein ω represents a circle frequency, j represents an imaginary symbol, f=2pi ω, f represents a simulation frequency,// represents a parallel connection, ESC represents a parasitic capacitance of the load chip, ESR represents a parasitic resistance of the load chip, and ESL represents a parasitic inductance of the load chip;
the constructing a target model based on the equivalent impedance value to ground comprises the following steps:
constructing a target model composed of a first resistor, a first capacitor and a first inductor based on the equivalent impedance value to ground;
the resistance value of the first resistor is equal to M times of the equivalent impedance value to the ground, M is a preset parameter, and the first end of the first resistor is connected with the first end of the first capacitor and is used as the first end of the target model to be connected with the power output end; the second end of the first capacitor is connected with the first end of the first inductor; the second end of the first inductor is connected with the second end of the first resistor and is used as the second end of the target model to be grounded.
2. The method of impedance detection of a PCB power supply of claim 1, further comprising, after determining the equivalent impedance value to ground of the load chip:
judging whether the determined equivalent impedance value to the ground is larger than a preset first resistance threshold value or not;
if not, executing the operation of constructing a target model based on the equivalent impedance value to ground;
if yes, the construction of the target model is abandoned, simulation is carried out according to a preset general simulation mode, and an impedance detection result aiming at the PCB power supply is obtained.
3. An impedance detection system for a PCB power supply, comprising:
the ground equivalent impedance value determining module is used for determining the ground equivalent impedance value of the load chip according to the parameter information of the PCB after the simulation preparation operation is completed;
the target model construction module is used for constructing a target model based on the equivalent impedance value to the ground and setting the target model between the power supply output end and the ground;
the impedance detection result output module is used for setting simulation frequency and simulating to obtain an impedance detection result under the simulation frequency;
the determining the equivalent impedance value to the ground of the load chip according to the parameter information of the PCB comprises the following steps:
according to the parameter information of the PCB, determining parasitic resistance, parasitic inductance and parasitic capacitance of the load chip;
determining the equivalent impedance value to ground of the load chip based on the determined parasitic resistance, the parasitic inductance and the parasitic capacitance;
the determining, based on the determined parasitic resistance, the parasitic inductance and the parasitic capacitance, a ground equivalent impedance value of a load chip, includes:
according toDetermining the equivalent impedance value Zf of the load chip to the ground;
wherein ω represents a circle frequency, j represents an imaginary symbol, f=2pi ω, f represents a simulation frequency,// represents a parallel connection, ESC represents a parasitic capacitance of the load chip, ESR represents a parasitic resistance of the load chip, and ESL represents a parasitic inductance of the load chip;
the constructing a target model based on the equivalent impedance value to ground comprises the following steps:
constructing a target model composed of a first resistor, a first capacitor and a first inductor based on the equivalent impedance value to ground;
the resistance value of the first resistor is equal to M times of the equivalent impedance value to the ground, M is a preset parameter, and the first end of the first resistor is connected with the first end of the first capacitor and is used as the first end of the target model to be connected with the power output end; the second end of the first capacitor is connected with the first end of the first inductor; the second end of the first inductor is connected with the second end of the first resistor and is used as the second end of the target model to be grounded.
4. An impedance detection apparatus for a PCB power supply, comprising:
a memory for storing a computer program;
a processor for executing the computer program to implement the impedance detection method of a PCB power supply according to claim 1 or 2.
5. A computer readable storage medium, characterized in that the computer readable storage medium has stored thereon a computer program which, when executed by a processor, implements the impedance detection method of a PCB power supply according to claim 1 or 2.
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