CN109669319A - Improve the OPC modification method of polysilicon layer line end dimensional homogeneity - Google Patents
Improve the OPC modification method of polysilicon layer line end dimensional homogeneity Download PDFInfo
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- CN109669319A CN109669319A CN201811557696.2A CN201811557696A CN109669319A CN 109669319 A CN109669319 A CN 109669319A CN 201811557696 A CN201811557696 A CN 201811557696A CN 109669319 A CN109669319 A CN 109669319A
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- polysilicon
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/36—Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
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Abstract
The present invention provides a kind of for the modified OPC method for improving polysilicon layer line end dimensional homogeneity of polysilicon cutting figure layer, comprising: obtains polysilicon layer, polysilicon cutting pattern and reference layer complete design domain；Targeted graphical is divided into first kind targeted graphical and the second class targeted graphical；First size is shunk on the first kind targeted graphical both sides vertical with polysilicon lines respectively inwards；Mark the line end side of polysilicon cutting pattern, when the distance of the opposite line end Bian Zhiqi polysilicon graphics is greater than the second size, the line end side of polysilicon cutting pattern is carried out to extend third size, when the distance of the opposite line end Bian Zhiqi polysilicon graphics is less than or equal to the second size, if line end side E extension elongation is less than the 4th size, then polysilicon cutting pattern is widened, widens the 5th size.The processing of OPC subsequent correction based on model is carried out to revised polysilicon layer cutting pattern, obtains mask figure.The present invention can optimize pattern after polysilicon graphics line end etching, improve polysilicon layer line end dimensional homogeneity.
Description
Technical field
The present invention relates to integrated circuit fields, more for the modified energy improvement of polysilicon cutting figure layer more particularly to one kind
OPC (optical proximity correction) method of crystal silicon layer line end dimensional homogeneity.
Background technique
With the lasting diminution of integrated circuit feature size, the design size of semiconductor devices is more and more accurate, and optics faces
Nearly effect (Optical Proximity Effect) leads to the offset issue of figure on litho pattern and mask on silicon wafer
It is increasingly severe, (Optical Proximity Correction) can be corrected by optical approach effect as time resolution is added
Rate secondary graphics (SRAF, Sub Resolution Assist Feature) Lai Tigao line width uniformity (CDU, Critical
Dimension Uniformity), increase lithographic process window (PW, Process Window), so that it is guaranteed that on final silicon wafer
The consistency of figure and design configuration.But in 32nm and with lower node, with the reduction of grid size, the contraction of grid line end will
Become more serious, the correction amount of figure, which becomes larger, on light shield will lead to the overlapping of gate patterns between adjacent, and optics is caused to close on
The failure of effect modification method.And as the complexity of layout patterns is higher and higher, the limitation of photoetching resolution and OPC model are pre-
The deficiency for the property surveyed causes OPC amendment to cannot be considered in terms of all hot issues, ever-changing domain is difficult exhaustive.
Therefore, for gate patterns, in 28nm and to use double-pattern technology in lower node, by adding polycrystalline
Silicon layer cutting pattern solves the deficiency of polysilicon layer line end process window, is effectively prevented from the blockage effect of grid line end, improves
The problems such as short circuit of polysilicon layer line end and corners, so that the performance of semiconductor devices is more excellent.However, since line end is cut
Optical approach effect of the graph layer in exposure process itself, it is not straight that the polysilicon layer after line end cutting still has line end
Problem, it is inhomogenous so as to cause end-cap length dimension, product defects are caused, product yield is influenced.
Summary of the invention
The technical problem to be solved in the present invention is to provide one kind to cut figure layer for polysilicon, can improve polysilicon after etching
Line end pattern, and improve the OPC modification method of polysilicon layer line end dimensional homogeneity.
In order to solve the above technical problems, the present invention, which provides one kind, cuts the modified OPC (optical adjacent of figure layer for polysilicon
Effect correction) method, comprising the following steps:
1) polysilicon layer, polysilicon cutting pattern and reference layer complete design domain are obtained；
2) targeted graphical T is chosen, is drawn targeted graphical according to the number that polysilicon cutting pattern cuts to polysilicon graphics
It is divided into first kind targeted graphical A and the second class targeted graphical B；
3) first kind targeted graphical A is handled, and the first kind targeted graphical both sides vertical with polysilicon lines are received respectively inwards
Contracting first size W1；
4) the second class targeted graphical handles B, the line end side E of polysilicon cutting pattern is marked, when the line end side is right to its
When the distance of face polysilicon graphics is greater than the second size S, the line end side of polysilicon cutting pattern is extended, extends third ruler
Very little X, when the distance of the opposite line end Bian Zhiqi polysilicon graphics is less than or equal to the second size S, if the line end side E stretches out
Length then widens polysilicon cutting pattern less than the 4th size L, widens the 5th size W2；
5) processing of the OPC subsequent correction based on model is carried out to revised polysilicon layer cutting pattern, obtains mask figure
Shape.
Be further improved it is described improve polysilicon layer line end dimensional homogeneity OPC modification method, targeted graphical use with
Under type is chosen: choosing polysilicon cutting pattern and removes its part Chong Die with polysilicon figure layer, is labeled as targeted graphical T.
It is further improved the OPC modification method for improving polysilicon layer line end dimensional homogeneity, first object figure A is adopted
It chooses with the following methods: choosing the targeted graphical for touching two polysilicon lines in targeted graphical T labeled as first kind target figure
Shape A.
It is further improved the OPC modification method for improving polysilicon layer line end dimensional homogeneity, the second targeted graphical B is adopted
It chooses with the following methods: choosing the targeted graphical for only touching a polysilicon lines in targeted graphical T labeled as the second target figure
Shape B.
Be further improved it is described improve polysilicon layer line end dimensional homogeneity OPC modification method, the first size~
5th size is determined by the design rule and actual production technique of the semiconductor devices.
It is further improved the OPC modification method for improving polysilicon layer line end dimensional homogeneity, the reference layer includes
Active area and contact hole.
It is further improved the OPC modification method for improving polysilicon layer line end dimensional homogeneity, the first size W1
Range is 1nm~10nm.
It is further improved the OPC modification method for improving polysilicon layer line end dimensional homogeneity, the second size S model
Enclosing is 5nm~40nm.
It is further improved the OPC modification method for improving polysilicon layer line end dimensional homogeneity, the third size X model
Enclosing is 1nm~70nm.
It is further improved the OPC modification method for improving polysilicon layer line end dimensional homogeneity, the 4th size L model
Enclosing is 30nm~80nm.
It is further improved the OPC modification method for improving polysilicon layer line end dimensional homogeneity, the 5th size W2
Range is 1nm~10nm.
It is further improved the OPC modification method for improving polysilicon layer line end dimensional homogeneity, each line width and each
Size, which is all satisfied mask, can make minimum dimension.
The present invention obtains polysilicon layer, polysilicon cutting pattern and refers to layer pattern, chooses to polysilicon cutting pattern
Targeted graphical, and targeted graphical is divided into first kind targeted graphical A and the second class targeted graphical B, by first kind targeted graphical
First size W1 is shunk on the both sides vertical with polysilicon lines respectively inwards, the line end side E of polysilicon cutting pattern is marked, when described
When the distance of the opposite line end Bian Zhiqi polysilicon graphics is greater than the second size S, the line end side of polysilicon cutting pattern is prolonged
It is long, extend third size X, when the distance of the opposite line end Bian Zhiqi polysilicon graphics is less than or equal to the second size S, if institute
Line end side E extension elongation is stated less than the 4th size L, then polysilicon cutting pattern is widened, widens the 5th size W2, to repairing
Polysilicon layer cutting pattern after just carries out the processing of the OPC subsequent correction based on model, obtains mask figure.The present invention by pair
Polysilicon cutting figure layer carries out extension and the widened operation of line end, can optimize pattern after polysilicon graphics line end etching, improve more
Crystal silicon layer line end dimensional homogeneity.
Detailed description of the invention
Present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments:
Fig. 1 is the first implementation diagram of the invention.
Description of symbols
First kind targeted graphical A
Second class targeted graphical B
Polysilicon layer 1
Polysilicon cutting pattern 2
Specific embodiment
In order to keep the contents of the present invention more clear and easy to understand, combined with specific embodiments below with attached drawing to the contents of the present invention
It is described in detail, but the present invention is not limited to given examples.
As shown in Figure 1, the present invention provides following by taking 28nm technology node and mature immersion lithography process conditions as an example
Embodiment.
The present invention provide it is a kind of for polysilicon cutting figure layer amendment improve polysilicon layer line end dimensional homogeneity OPC repair
Correction method one applies example, comprising the following steps:
1) polysilicon layer, polysilicon cutting pattern and reference layer complete design domain are obtained；
Wherein, the reference layer includes at least active area and contact hole, and each line width and each size are all satisfied mask
Minimum dimension can be made；
2) number that polysilicon graphics are cut to according to polysilicon cutting pattern chooses target figure to polysilicon cutting pattern
Shape；
The targeted graphical that two polysilicon lines are touched in targeted graphical T is chosen labeled as first kind targeted graphical A；
The targeted graphical that a polysilicon lines are only touched in targeted graphical T is chosen labeled as the second targeted graphical B；
3) first kind targeted graphical A is handled, and the first kind targeted graphical both sides vertical with polysilicon lines are received respectively inwards
Contracting first size W1；
4) the second class targeted graphical handles B, the line end side E of polysilicon cutting pattern is marked, when the line end side is right to its
When the distance of face polysilicon graphics is greater than the second size S, the line end side of polysilicon cutting pattern is extended, extends third ruler
Very little X, when the distance of the opposite line end Bian Zhiqi polysilicon graphics is less than or equal to the second size S, if the line end side E stretches out
Length then widens polysilicon cutting pattern less than the 4th size L, widens the 5th size W2；
Wherein, the first size~the 5th size is determined by the design rule and actual production technique of the semiconductor devices
It is fixed.
It is preferred that the first size W1 range is 1nm~10nm, the present embodiment using first size W1 be 1nm, 3nm or
5nm。
It is preferred that the second size S range is 5nm~40nm, the present embodiment using the second size S be 10nm, 20nm or
30nm。
It is preferred that the third size X range is 1nm~70nm, the present embodiment using third size X be 15nm, 35nm or
60nm。
It is preferred that the 4th size L range is 30nm~80nm, the present embodiment using the 4th size L be 30nm, 40nm or
60nm。
It is preferred that the 5th size W2 range is 1nm~10nm, the present embodiment using the 5th size W2 be 3nm, 5nm,
7nm。
It is further improved the OPC modification method for improving polysilicon layer line end dimensional homogeneity, each line width and each
Size, which is all satisfied mask, can make minimum dimension.
Above by specific embodiment and embodiment, invention is explained in detail, but these are not composition pair
Limitation of the invention.Without departing from the principles of the present invention, those skilled in the art can also make many deformations and change
Into these also should be regarded as protection scope of the present invention.
Claims (12)
1. a kind of OPC modification method for improving polysilicon layer line end dimensional homogeneity, which comprises the following steps:
1) polysilicon layer, polysilicon cutting pattern and reference layer complete design domain are obtained；
2) targeted graphical (T) is chosen, is divided targeted graphical according to the number that polysilicon cutting pattern cuts to polysilicon graphics
For first kind targeted graphical (A) and the second class targeted graphical (B)；
3) first kind targeted graphical (A) is handled, and first kind targeted graphical (A) both sides vertical with polysilicon lines are received respectively inwards
Contracting first size (W1)；
4) the second class targeted graphical processing (B) marks the line end side (E) of polysilicon cutting pattern, when the line end side is right to its
When the distance of face polysilicon graphics is greater than the second size (S), the line end side of polysilicon cutting pattern is extended, extends third
Size (X), when the distance of the opposite line end Bian Zhiqi polysilicon graphics is less than or equal to the second size (S), if the line end
Side (E) extension elongation then widens polysilicon cutting pattern less than the 4th size (L), widens the 5th size (W2)；
5) processing of the OPC subsequent correction based on model is carried out to revised polysilicon layer cutting pattern, obtains mask figure.
2. improving the OPC modification method of polysilicon layer line end dimensional homogeneity as described in claim 1, it is characterised in that: target
Figure is chosen in the following ways: choosing polysilicon cutting pattern and removes its part Chong Die with polysilicon figure layer, is labeled as mesh
Shape of marking on a map (T).
3. improving the OPC modification method of polysilicon layer line end dimensional homogeneity as claimed in claim 2, it is characterised in that: first
Targeted graphical (A) is chosen in the following ways: choosing the targeted graphical label that two polysilicon lines are touched in targeted graphical (T)
For first kind targeted graphical (A).
4. improving the OPC modification method of polysilicon layer line end dimensional homogeneity as claimed in claim 2, it is characterised in that: second
Targeted graphical (B) is chosen in the following ways: choosing the targeted graphical mark that a polysilicon lines are only touched in targeted graphical (T)
It is denoted as the second targeted graphical (B).
5. improving the OPC modification method of polysilicon layer line end dimensional homogeneity as described in claim 1, it is characterised in that: described
First size~the 5th size is determined by the design rule and actual production technique of the semiconductor devices.
6. improving the OPC modification method of polysilicon layer line end dimensional homogeneity as described in claim 1, it is characterised in that: described
Reference layer includes active area and contact hole.
7. improving the OPC modification method of polysilicon layer line end dimensional homogeneity as described in claim 1, it is characterised in that: described
First size (W1) range is 1nm~10nm.
8. improving the OPC modification method of polysilicon layer line end dimensional homogeneity as described in claim 1, it is characterised in that: described
Second size (S) range is 5nm~40nm.
9. improving the OPC modification method of polysilicon layer line end dimensional homogeneity as described in claim 1, it is characterised in that: described
Third size (X) range is 1nm~70nm.
10. improving the OPC modification method of polysilicon layer line end dimensional homogeneity as described in claim 1, it is characterised in that: described
4th size (L) range is 30nm~80nm.
11. improving the OPC modification method of polysilicon layer line end dimensional homogeneity as described in claim 1, it is characterised in that: described
5th size (W2) range is 1nm~10nm.
12. improving the OPC modification method of polysilicon layer line end dimensional homogeneity as described in claim 1-11, it is characterised in that:
Each line width and each size, which are all satisfied mask, can make minimum dimension.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811557696.2A CN109669319B (en) | 2018-12-19 | 2018-12-19 | OPC correction method for improving line end size uniformity of polycrystalline silicon layer |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811557696.2A CN109669319B (en) | 2018-12-19 | 2018-12-19 | OPC correction method for improving line end size uniformity of polycrystalline silicon layer |
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| CN109669319A true CN109669319A (en) | 2019-04-23 |
| CN109669319B CN109669319B (en) | 2022-06-14 |
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Cited By (5)
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| CN111443568A (en) * | 2020-03-19 | 2020-07-24 | 上海华力集成电路制造有限公司 | Polycrystalline silicon layer graph for screening whether source and drain are wrapped or not and OPC (optical proximity correction) method |
| CN111596528A (en) * | 2020-05-25 | 2020-08-28 | 上海华力集成电路制造有限公司 | Polycrystalline silicon cutting pattern adding method |
| CN111752088A (en) * | 2020-06-22 | 2020-10-09 | 上海华力微电子有限公司 | Method for unifying sizes of grid graphs, storage medium and computer equipment |
| CN112987487A (en) * | 2021-02-22 | 2021-06-18 | 上海华力集成电路制造有限公司 | OPC correction method for graph structure with different graph density ends |
| CN113075856A (en) * | 2020-01-06 | 2021-07-06 | 中芯国际集成电路制造(上海)有限公司 | Mask pattern, mask and method for forming semiconductor structure |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113075856A (en) * | 2020-01-06 | 2021-07-06 | 中芯国际集成电路制造(上海)有限公司 | Mask pattern, mask and method for forming semiconductor structure |
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| CN112987487A (en) * | 2021-02-22 | 2021-06-18 | 上海华力集成电路制造有限公司 | OPC correction method for graph structure with different graph density ends |
| CN112987487B (en) * | 2021-02-22 | 2024-03-08 | 上海华力集成电路制造有限公司 | OPC correction method for graph structure with different graph density ends |
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