CN109660231A - A kind of high-precision low-power consumption clock generation method - Google Patents

A kind of high-precision low-power consumption clock generation method Download PDF

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Publication number
CN109660231A
CN109660231A CN201811548582.1A CN201811548582A CN109660231A CN 109660231 A CN109660231 A CN 109660231A CN 201811548582 A CN201811548582 A CN 201811548582A CN 109660231 A CN109660231 A CN 109660231A
Authority
CN
China
Prior art keywords
clock
low
power consumption
frequency
high precision
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201811548582.1A
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Chinese (zh)
Inventor
龚红旗
伍华军
高林
曾世尧
魏裕
任坤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chengdu Chiffo Electronics Instruments Co Ltd
Original Assignee
Chengdu Chiffo Electronics Instruments Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chengdu Chiffo Electronics Instruments Co Ltd filed Critical Chengdu Chiffo Electronics Instruments Co Ltd
Priority to CN201811548582.1A priority Critical patent/CN109660231A/en
Publication of CN109660231A publication Critical patent/CN109660231A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01Details
    • H03K3/012Modifications of generator to improve response time or to decrease power consumption
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/06Clock generators producing several clock signals
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals

Abstract

The invention discloses a kind of high-precision low-power consumption clock generation methods, comprising the following steps: S1, note high precision clock frequency are F1, low accuracy clock frequency is F2, define identical time T;S2, using high precision clock timing T, the clock number of generation is N1=T/F1;S3, using low accuracy clock timing T, the clock number of generation is N2=T/F2;S4, N1/F1=N2/F2 is obtained using N1=T/F1, N2=T/F2, to calculate F2=(N2*F1)/N1;S5, using F2 as clock frequency, low frequency clock circuit is timed.High precision and low-power consumption can be achieved the purpose that using the clock circuit that method of the invention generates, and without adding external devices in whole process, it is easy to operate, using convenient, at low cost, it can be widely applied on various single-chip microcontrollers.

Description

A kind of high-precision low-power consumption clock generation method
Technical field
The invention belongs to singlechip technology field, in particular to a kind of high-precision low-power consumption clock generation method.
Background technique
Single-chip microcontroller internal clocking is generally divided into high-speed, high precision clock and the low accuracy clock of low speed.When using high-speed, high precision Power consumption is high when clock, is generally used to do single-chip microcontroller master clock or timing;And power consumption is very low when using low speed low accuracy clock, generally Use is monitored for doing system.When some system should high precision clock require power consumption very low again when, become contradiction.
Summary of the invention
It is an object of the invention to overcome the deficiencies of the prior art and provide one kind can generate high precision and low-power consumption when Clock, and without adding external devices in whole process, using convenient, high-precision low-power consumption clock generation method at low cost.
The purpose of the present invention is achieved through the following technical solutions: a kind of high-precision low-power consumption clock generation method, The following steps are included:
S1, note high precision clock frequency are F1, low accuracy clock frequency is F2, define identical time T;
S2, using high precision clock timing T, the clock number of generation is N1=T/F1;
S3, using low accuracy clock timing T, the clock number of generation is N2=T/F2;
S4, N1/F1=N2/F2 is obtained using N1=T/F1, N2=T/F2, so that F2=(N2*F1)/N1 is calculated, In, N2, F1, N1 are known parameters;
S5, using clock frequency F2 obtained in step S4 as clock frequency, low frequency clock circuit is timed, Obtain the clock of high precision low-power consumption.
The beneficial effects of the present invention are: high precision and low function can be reached using the clock circuit that method of the invention generates The purpose of consumption, and without adding external devices in whole process, it is easy to operate, using convenient, at low cost, it can be widely applied In on various single-chip microcontrollers.
Detailed description of the invention
Fig. 1 is the flow chart of high-precision low-power consumption clock generation method of the invention.
Specific embodiment
Technical solution of the present invention is further illustrated with reference to the accompanying drawing.
As shown in Figure 1, a kind of high-precision low-power consumption clock generation method, comprising the following steps:
S1, note high precision clock frequency are F1, low accuracy clock frequency is F2, define identical time T;
S2, using high precision clock timing T, the clock number of generation is N1=T/F1;
S3, using low accuracy clock timing T, the clock number of generation is N2=T/F2;
S4, N1/F1=N2/F2 is obtained using N1=T/F1, N2=T/F2, so that F2=(N2*F1)/N1 is calculated, In, N2, F1, N1 are known parameters;
S5, using clock frequency F2 obtained in step S4 as clock frequency, low frequency clock circuit is timed, Obtain the clock of high precision low-power consumption.
Those of ordinary skill in the art will understand that the embodiments described herein, which is to help reader, understands this hair Bright principle, it should be understood that protection scope of the present invention is not limited to such specific embodiments and embodiments.This field Those of ordinary skill disclosed the technical disclosures can make according to the present invention and various not depart from the other each of essence of the invention The specific variations and combinations of kind, these variations and combinations are still within the scope of the present invention.

Claims (1)

1. a kind of high-precision low-power consumption clock generation method, which comprises the following steps:
S1, note high precision clock frequency are F1, low accuracy clock frequency is F2, define identical time T;
S2, using high precision clock timing T, the clock number of generation is N1=T/F1;
S3, using low accuracy clock timing T, the clock number of generation is N2=T/F2;
S4, N1/F1=N2/F2 is obtained using N1=T/F1, N2=T/F2, to calculate F2=(N2*F1)/N1, wherein N2, F1, N1 are known parameters;
S5, using clock frequency F2 obtained in step S4 as clock frequency, low frequency clock circuit is timed, is obtained The clock of high precision low-power consumption.
CN201811548582.1A 2018-12-18 2018-12-18 A kind of high-precision low-power consumption clock generation method Pending CN109660231A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201811548582.1A CN109660231A (en) 2018-12-18 2018-12-18 A kind of high-precision low-power consumption clock generation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201811548582.1A CN109660231A (en) 2018-12-18 2018-12-18 A kind of high-precision low-power consumption clock generation method

Publications (1)

Publication Number Publication Date
CN109660231A true CN109660231A (en) 2019-04-19

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201811548582.1A Pending CN109660231A (en) 2018-12-18 2018-12-18 A kind of high-precision low-power consumption clock generation method

Country Status (1)

Country Link
CN (1) CN109660231A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110568750A (en) * 2019-09-04 2019-12-13 西安矽力杰半导体技术有限公司 Timing circuit and timing method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1236531A (en) * 1996-09-06 1999-11-24 艾利森电话股份有限公司 Method and apparatus for generating timing signals in a radiocommunication unit
CN101072029A (en) * 2006-05-12 2007-11-14 捷顶微电子(上海)有限公司 Multiple precision clock generating circuit on single chip and its realizing method

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1236531A (en) * 1996-09-06 1999-11-24 艾利森电话股份有限公司 Method and apparatus for generating timing signals in a radiocommunication unit
CN101072029A (en) * 2006-05-12 2007-11-14 捷顶微电子(上海)有限公司 Multiple precision clock generating circuit on single chip and its realizing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110568750A (en) * 2019-09-04 2019-12-13 西安矽力杰半导体技术有限公司 Timing circuit and timing method

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Application publication date: 20190419