CN109579795A - Big picture remote sensing images real time processing system for star loaded camera - Google Patents
Big picture remote sensing images real time processing system for star loaded camera Download PDFInfo
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Abstract
The invention discloses a kind of big picture remote sensing images real time processing system for star loaded camera, system hardware composition includes data input/output module, control module, data processing module and memory module.Control module is respectively connected with data input/output module and data processing module, and control module is mainly made of piece of CPLD XC95288 and two dual-port SRAMs (DPSRAM)；Data input/output module includes two panels TLK2711 high speed serialization transceiver, is connect with star loaded camera data-interface；Data processing module mainly includes 4 ADSP-TS201 digital signal processors (DSP)；Memory module includes the program storage being made of the two panels SDRAM data buffer constituted and a piece of non-volatile Flash.The present invention can be realized the real-time processing of the big picture remote sensing images to star loaded camera output, and can provide support for the micromation of image processing system, Embedded Practical Project application on star.
Description
Technical field
The present invention relates to space remote sensing technical field of image processing, more particularly, to a kind of for the big of star loaded camera
Picture remote sensing images real time processing system.
Background technique
With electronic science and technology and sensor science and technology be constantly progressive, on the star of big picture remote sensing images high speed/
Processing is increasingly becoming the research and development direction in space remote sensing field in real time.It is pre- that current on-board processing task is concentrated mainly on image
Processing, mass data processing, target's feature-extraction etc., data transfer bandwidth is limited between by star-ground, and big picture image exists
The lossy compression of 3:1-8:1 compression ratio is carried out as passback ground is previous, ground decompressed image is right there are a degree of distortion
It is extremely difficult that compressed distorted image carries out restoration disposal.
With significantly improving for remote sensing image resolving power, data acquired amount accelerated expansion, remote sensing images are answered at the same time
It is also continuously increased with scale and number of users, therefore more stringent requirements are proposed for speed to remote sensing image processing and effect.Greatly
It is huge to be mainly reflected in uncompressed big picture remote sensing image data amount for real-time processing technique difficult point on the star of picture remote sensing images
Greatly, it realizes and handles the program for not only needing to optimize in real time, it is also necessary to be able to bear the hardware system that huge data volume passes through.
Therefore it provides a kind of big picture remote sensing images real time processing system for star loaded camera, it can be effectively to big
The remote sensing images of picture carry out the processing of real time high-speed, are this field technical problems urgently to be resolved.
Summary of the invention
In view of this, the present invention provides a kind of big picture remote sensing images real time processing system for star loaded camera, solution
Real time high-speed of having determined handles the technical issues of big picture remote sensing images.
To solve the above-mentioned problems, the present invention provides a kind of big real-time processing system of picture remote sensing images for star loaded camera
System, comprising: data input/output module, control module, data processing module and memory module；
The control module is respectively connected with the data input/output module and the data processing module, described
Control module include piece of CPLD XC95288 and two panels DPSRAM, the CPLD XC95288 respectively with DPSRAM described in two panels
Read-write Catrol logical signal be connected, DPSRAM described in two panels is respectively input terminal DPSRAM and output end DPSRAM；
The CPLD XC95288 is used to send write control signal, the input terminal to the input terminal DPSRAM
DPSRAM receives image data to be processed after receiving said write control signal, and the CPLD XC95288 is also used to control institute
It states data processing module and reads the image data to be processed；
The CPLD XC95288, which is also used to send to the output end DPSRAM, writes out control signal, the output end
It is write out described in DPSRAM reception and image data after processing is sent to the data input/output module after controlling signal；
The data input/output module includes two TLK2711 high speed serialization transceivers, two TLK2711 high
Fast serial transceiver is respectively input terminal TLK2711 high speed serialization transceiver and output end TLK2711 high speed serialization transceiver；
The input terminal TLK2711 high speed serialization transceiver is connected with the input terminal DPSRAM, for receiving number
The data image signal is converted to parallel TTL digital picture by serial LVDS data image signal format and believed by picture signal
Number format, and extracted valid data generates the image data to be processed, the image data to be processed is sent to described defeated
Enter to hold DPSRAM；
The output end TLK2711 high speed serialization transceiver is connected with the output end DPSRAM, described for receiving
Image data after the processing that output end DPSRAM is sent, image data after the processing is believed by parallel TTL digital picture
Number format is converted to serial LVDS data image signal and exports；
The data processing module is respectively connected with the control module and the memory module, for read it is described to
Image data is handled, and obtains image data after the processing after handling the image data to be processed, wherein
The data processing module include 4 ADSP-TS201 DSP, every 1 ADSP-TS201 DSP and other 3
A set of point-to-point data-link connected entirely is formed using link port between a ADSP-TS201 DSP, is realized described in 4
The connection of loose coupling two-by-two between ADSP-TS201 DSP, while 4 ADSP-TS201 DSP are by sharing one 32
External bus realize close coupling interconnection, 4 ADSP-TS201 DSP are in the address range of 32 unified addressing
Possess the shared memory space of respective memory headroom and broadcast access；
The memory module includes two panels SDRAM and a piece of Flash chip, wherein the SDRAM is 4 ADSP-
The memory extended on the external bus of TS201 DSP, the Flash chip are the program designation chip in the processing system
And external extended menory.
Optionally, further includes: peripheral circuit module；
The peripheral circuit module includes power supply module and voltage monitoring module；
The data input/output module, the control module, the data processing module and the memory module connect
It is connected to the power supply module；
The voltage monitoring module respectively with the data input/output module, the control module, the data processing
Module is connected with the memory module, and the voltage monitoring module is used to monitor in real time the operating voltage of modules.
Optionally, the peripheral circuit module further includes watchdog reset module, the watchdog reset module with it is described
Data processing module is connected.
Optionally, the CPLD XC95288 is also used to receive control instruction and carries out analysis to the control instruction and sentences
Fixed, when determining the control instruction to carry out image processing commands, the CPLD XC95288 controls the input terminal
The image data to be processed is sent to the data processing module by DPSRAM；Wherein,
The input terminal DPSRAM is successively sent out by data/address bus to 4 respective link ports of ADSP-TS201 DSP
Send the image data to be processed.
Optionally, the CPLD XC95288 is also used to receive control instruction, and carries out analysis to the control instruction and sentence
Fixed, when determining that the control instruction instructs for direct mode operation, the CPLD XC95288 controls the input terminal DPSRAM and holds
Row image data directly enters directly to go out；Wherein,
The input terminal DPSRAM is connected with the output end TLK2711 high speed serialization transceiver, the input terminal
The image data to be processed is sent to the output end TLK2711 high speed serialization transceiver by DPSRAM；
The output end TLK2711 high speed serialization transceiver is by the image data to be processed by parallel TTL digital picture
Signal format is converted to serial LVDS data image signal and exports.
Optionally, the output end DPSRAM is also used to receive image data after the processing, and will scheme after the processing
As data carry out caching merging；
The output end DPSRAM after by the processing image data caching merge after, according to the CPLD XC95288
Control logic, image data after the processing is sent to the output end TLK2711 high speed serialization transceiver.
Optionally, the clock frequency of SDRAM described in two panels is all larger than 80MHz, and the bit wide of SDRAM described in two panels is
640MBps, the capacity of two SDRAM are 512Mbits.
Optionally, the bit wide of the Flash chip is 8bit, capacity 8Mbits.
Compared with prior art, provided by the present invention for the big picture remote sensing images real time processing system of star loaded camera,
At least realize it is following the utility model has the advantages that
(1) present invention is realized by data/address bus to ADSP- using high-performance CPLD XC95288 by DPSRAM
TS201 sends or receives image data from ADSP-TS201, and hardware realization is simple, high reliablity, and 4 ADSP-TS201's is single
Link port can provide the data transmission bauds of unidirectional 500Mbytes/s, fully met big picture remote sensing images and located in real time
The image data transmission demand of reason.And it is interconnected between 4 ADSP-TS201 using link port, while passing through multiprocessor
Bus interconnection provides connection type abundant for the interaction of intermediate processing data.
(2) present invention selects the control module of CPLD XC95288 and two DPSRAM as system, CPLD XC95288
Can be according to the digital integrated electronic circuit of user demand voluntarily constitutive logic function, flexible in programming, integrated level be high, the development cycle
It is short, the scope of application is wide, manufacturing cost is low, for all kinds of remote sensing images in real time handle using have good expansibility.CPLD
XC95288 provide control signal, and DPSRAM be only used for data transmission, control module it is clear in structure, have it is very strong can be more
Change and controllability.
(3) present invention is serially believed using TLK2711 as receiver and transmitter in data input/output module
Conversion number between parallel signal, and the indirect control module using in system carries out the conversion operation of data signal format.
TLK2711 is capable of providing the data throughout of highest 2.7Gbps, can satisfy the figure of big picture remote sensing images real time processing system
As data input and output demand.
(4) present invention converts the input and output of image data, format, distribution merges and the functions such as timing control are merged into
One data input/output module formed with TLK2711 high speed serialization transceiver and one are processing control core with CPLD
Control module in, realize the miniaturized design to hardware system, have significant extending application and application value.
Certainly, implementing any of the products of the present invention specific needs while must not reach all the above technical effect.
By referring to the drawings to the detailed description of exemplary embodiment of the present invention, other feature of the invention and its
Advantage will become apparent.
Detailed description of the invention
It is combined in the description and the attached drawing for constituting part of specification shows the embodiment of the present invention, and even
With its explanation together principle for explaining the present invention.
Fig. 1 is the knot for the big picture remote sensing images real time processing system for star loaded camera that the embodiment of the present invention 1 provides
Structure block diagram；
Fig. 2 is the work for the big picture remote sensing images real time processing system for star loaded camera that the embodiment of the present invention 2 provides
Make flow chart；
Fig. 3 is the knot for the big picture remote sensing images real time processing system for star loaded camera that the embodiment of the present invention 3 provides
Structure block diagram.
Specific embodiment
Carry out the various exemplary embodiments of detailed description of the present invention now with reference to attached drawing.It should also be noted that unless in addition having
Body explanation, the unlimited system of component and the positioned opposite of step, numerical expression and the numerical value otherwise illustrated in these embodiments is originally
The range of invention.
Be to the description only actually of at least one exemplary embodiment below it is illustrative, never as to the present invention
And its application or any restrictions used.
Technology, method and apparatus known to person of ordinary skill in the relevant may be not discussed in detail, but suitable
In the case of, the technology, method and apparatus should be considered as part of specification.
It is shown here and discuss all examples in, any occurrence should be construed as merely illustratively, without
It is as limitation.Therefore, other examples of exemplary embodiment can have different values.
It should also be noted that similar label and letter indicate similar terms in following attached drawing, therefore, once a certain Xiang Yi
It is defined in a attached drawing, then in subsequent attached drawing does not need that it is further discussed.
Embodiment 1
The present invention provides a kind of big picture remote sensing images real time processing system for star loaded camera, and Fig. 1 is that the present invention is real
The structural block diagram of the big picture remote sensing images real time processing system for star loaded camera of the offer of example 1 is provided.As shown in Figure 1, being used for
The big picture remote sensing images real time processing system of star loaded camera, uses ADSP-TS201 floating-point high-speed dsp for processing core, constitutes
The parallel processing system (PPS) that close coupling is combined with loose coupling has selected high speed TLK2711 serial transceiver to come and star loaded camera chain
It connects, the input and output to realize real time data is buffered in conjunction with dual-port SRAM (DPSRAM).Include: data input/output module 10,
Control module 20, data processing module 30 and memory module 40.Wherein, DSP is Digital Signal Processing,
Digital signal processor.
The control module 20 is respectively connected with the data input/output module 10 and the data processing module 30
Connect, the control module 20 include piece of CPLD XC95288 and two panels DPSRAM, the CPLD XC95288 respectively with two panels
The Read-write Catrol logical signal of the DPSRAM is connected.DPSRAM described in two panels is respectively input terminal DPSRAM and output end
DPSRAM.In the present invention, processing and control core of the high-performance complex programmable logic device (CPLD) XC95288 as system,
Cooperate the control module of two panels DPSRAM composition system simultaneously.The continous way wire structures of CPLD XC95288 prolong its timing
It is uniform and predictable late, it can be realized high speed and real-tune TT & C.The control module mainly realizes Instruction decoding control, picture number
According to transmission, piecemeal and distribution control, image data output control etc..
The CPLD XC95288 is used to send write control signal, the input terminal to the input terminal DPSRAM
DPSRAM receives image data to be processed after receiving said write control signal, and the CPLD XC95288 is also used to control institute
It states data processing module and reads the image data to be processed.Wherein, the CPLD XC95288 control star loaded camera passes through defeated
The digital image stream for entering to hold TLK2711 interface to be sent into enters the input terminal DPSRAM, (or reaches preset writing full DPSRAM
Quantity) after, the image data that starting DSP is read in the input terminal DPSRAM is handled.
The CPLD XC95288, which is also used to send to the output end DPSRAM, writes out control signal, the output end
After DPSRAM writes out control signal described in the reception, image data after processing is sent to the data input/output module 10,
That is data transmitter of the output end DPSRAM as system, for exporting through system treated image data information.Work as data
After processing module completes data processing, the CPLD XC95288 sends data to the output end DPSRAM and writes out control letter
Number, after writing full DPSRAM (or reaching preset quantity), by treated, image data is sent to starting output end TLK2711
Subsequent compression processing function unit on star.
The data input/output module 20 includes two TLK2711 high speed serialization transceivers.Two TLK2711
High speed serialization transceiver is respectively input terminal TLK2711 high speed serialization transceiver and output end TLK2711 high speed serialization transceiver.
TLK2711 high speed serialization transceiver is as high-speed transmission link interface chip, the data bit width with 16bit, reference clock frequency
Rate range is between 80MHz~135MHz, therefore its output data rate can achieve 1.6~2.7Gbps, can satisfy big picture
The data input and output demand of remote sensing images.
The input terminal TLK2711 high speed serialization transceiver is connected with the input terminal DPSRAM, for receiving number
The data image signal is converted to parallel TTL digital picture by serial LVDS data image signal format and believed by picture signal
Number format, and extracted valid data generates the image data to be processed, the image data to be processed is sent to described defeated
Enter to hold DPSRAM.Data sink of the input terminal TLK2711 high speed serialization transceiver as system, the input terminal
The output interface of TLK2711 high speed serialization transceiver is connected with the Data Input Interface of the input terminal DPSRAM.
The output end TLK2711 high speed serialization transceiver is connected with the output end DPSRAM, described for receiving
Image data after the processing that output end DPSRAM is sent, image data after the processing is believed by parallel TTL digital picture
Number format is converted to serial LVDS data image signal and exports.The output end TLK2711 high speed serialization transceiver is as system
System data transmitter.The Data Input Interface of the output end DPSRAM is connected with data/address bus, the output end DPSRAM's
Data output interface is connected with the input interface of the output end TLK2711 high speed serialization transceiver.
The data processing module 30 is respectively connected with the control module 20 and the memory module 40, for receiving
The image data to be processed, and image data after the processing is obtained after handling the image data to be processed,
In,
The data processing module 30 includes 4 ADSP-TS201 DSP, every 1 ADSP-TS201 DSP and other
A set of point-to-point data-link connected entirely is formed using link port between 3 ADSP-TS201 DSP, is realized described in 4
The connection of loose coupling two-by-two between ADSP-TS201 DSP, is capable of providing the unidirectional 500Mbytes/s of single port.Simultaneously described in 4
ADSP-TS201 DSP realizes close coupling interconnection by sharing one 32 external bus；ADSP-TS201 described in 4
DSP possesses the shared memory space of respective memory headroom and broadcast access in the address range of 32 unified addressing；
Data processing module 30 provided by the invention can use the intermediate data of various ways switching part image procossing.
Wherein, the interaction between the CPLD XC95288 and the data processing module includes: CPLD XC95288 sense
Know the FLAG state (DSP idle if) of DSP → generate IRQ → DSP receive data → FLAG mouth line changes → cancel IRQ →
The address at the CPLD control end DPRAM returns 0 → preparation to access next time.It should be noted that FLAG only represents flag bit in attached drawing
It sets, is i.e. can be realized and communicate between CPLD XC95288 and DSP.IRQ represents interrupt requests in attached drawing, i.e. CPLD XC95288 is logical
It crosses generation or revocation is interrupted, realization makes DSP receive or stop receiving data.
The i.e. described CPLD XC95288 judges the working condition of DSP by the communication between DSP, when DSP is in the free time
When state, the CPLD XC95288 can control signal DPSRAM to DSP send image data to be processed.
Using ADSP-TS201DSP as image procossing core in the present invention, it is suitable for large buffer memory, high-performance, height
The signal processing or image procossing of speed.Each ADSP-TS201 DSP has four groups of link ports, is received using one group of link port
With transmission image data, the mediant of other two groups of link ports and the processing of another two ADSP-TS201 DSP swap image is utilized
According to remaining one group of link port can be connected with the other application extension of system.4 ADSP-TS201 as shown in Figure 1
DSP is respectively DSP1, DSP2, DSP3 and DSP4, and each ADSP-TS201DSP all illustrates three groups of link ports L1, L2 and L3, the
Four groups of link ports do not mark in structure chart.
The memory module 40 includes two panels SDRAM and a piece of Flash chip, wherein the SDRAM is described in 4
The memory extended on the external bus of ADSP-TS201 DSP, the Flash chip are the program designation chip in system, and
External extended menory function is provided.The inside DRAM of ADSP-TS201 DSP is only 24Mbit, and ROM in non-integration slice, is needed
It will be in its external extended menory for storing application program and data.It can be set in the present invention respectively by two ADSP-
TS201 DSP shares a SDRAM, and optionally, the clock frequency of the SDRAM is greater than 80MHz.ADSP-TS201 DSP has piece
Interior integrated sdram controller can provide all control signals of access SDRAM, and the external data of ADSP-TS201 is total
Line is 64bit, can connect the SDRAM of each 32bit of two panels, so that the data storage rate of SDRAM reaches 640MBps, memory capacity
Up to 512Mbits.A piece of Flash chip can not only be used as program designation chip, additionally it is possible to as external memory.Optionally,
The bit wide of the Flash chip is 8bit, capacity 8Mbits.
It, can be by big picture remote sensing provided by the present invention for the big picture remote sensing images real time processing system of star loaded camera
Image carries out piecemeal respectively by 4 ADSP-TS201 DSP come decentralized processing, and link port is utilized between 4 ADSP-TS201 DSP
Interconnection, while being interconnected by multiprocessor bus, whole system is provided simultaneously with loose coupling and tightly coupled feature, 4 ADSP-
TS201 DSP can share intermediate processing data, export, can drop after then merging the processing result of each digital processing unit
Low data flow control difficulty keeps the good scalability of system, realizes the real-time processing of big picture remote sensing images.The present invention with
The data input/output module of TLK2711 high speed serialization transceiver composition, and using high-performance CPLD XC95288 as system
Control core can be realized the functions such as the format conversion, data distribution merging and timing control of image data input/output, can
The miniaturized design for realizing image processing system is conducive to the Practical Project of big picture remote sensing images real time high-speed processing on star
Using.In addition, need to expend a large amount of internal resource if directlying adopt CPLD XC95288 and DPSRAM and carrying out solution string operation,
And the conversion between data-signal is realized in the present invention using TLK2711 high speed serialization transceiver, be conducive to save control mould
The internal resource of block improves the speed of service of system.
Embodiment 2
The embodiment of the present invention 2 provides a kind of big picture remote sensing images real time processing system for star loaded camera, and Fig. 2 is this
The work flow diagram for the big picture remote sensing images real time processing system for star loaded camera that inventive embodiments 2 provide.Such as Fig. 2 institute
Show,
Firstly, the reception of the input terminal TLK2711 high speed serialization transceiver in the data input/output module 20
End receives the image digital signal that remote sensing images acquisition system (i.e. star loaded camera) is sent, wherein image digital signal is usually 4
The serial LVDS data image signal in road, input terminal TLK2711 high speed serialization transceiver turn the serial LVDS data image signal in 4 roads
It is changed to the parallel TTL data image signal in 20 tunnels, high 10bit valid data is then taken to obtain the image data to be processed, by institute
It states image data to be processed and is sent to input terminal DPSRAM.
Then, the CPLD XC95288 receives control instruction (being issued by system user), and to the control instruction
Carry out analysis judgement.
When determining that the control instruction instructs for image processing mode, the CPLD XC95288 controls the input terminal
Image data to be processed is sent to the data processing module 30 by DPSRAM, by data/address bus to 4 ADSP-
The respective link port of TS201 DSP successively sends the image data to be processed.Data transmission uses double data rate (DDR) LVDS signal
Transmission.4 ADSP-TS201 DSP respectively handle image data, while also carrying out data friendship between 4 ADSP-TS201 DSP
It changes, after the image procossing for completing image block, is still passed back using double data rate (DDR) LVDS signal format link port to data/address bus
Processing result gives output end DPSRAM, output end DPSRAM output system after image data formats after to processing
Processing result.
Optionally, the output end DPSRAM is also used to receive image data after the processing, and will scheme after the processing
As data carry out caching merging；According to the control logic of the CPLD XC95288, image data after the processing is sent to
The output end TLK2711 high speed serialization transceiver.
When determining that the control instruction instructs for direct mode operation, the CPLD XC95288 controls the input terminal
DPSRAM executes directly entering directly out for image data；The access enable signal of the input terminal DPSRAM is by the CPLD at this time
XC95288 is enabled.The input terminal DPSRAM is connected with the output end TLK2711 high speed serialization transceiver, the input
Hold DPSRAM that the image data to be processed is sent to the output end TLK2711 high speed serialization transceiver；The output end
TLK2711 high speed serialization transceiver is converted to the image data to be processed by the parallel TTL data image signal format in 20 tunnels
The serial LVDS data image signal in 4 roads simultaneously exports.
Embodiment 3
The embodiment of the present invention 3 provides a kind of big picture remote sensing images real time processing system for star loaded camera, and Fig. 3 is this
The structural block diagram for the big picture remote sensing images real time processing system for star loaded camera that inventive embodiments 3 provide.Such as Fig. 3 institute
Show, big picture remote sensing images real time processing system includes: data input/output module 10, control module 20, data processing module
30, memory module 40 and peripheral circuit module 50；
The peripheral circuit module 50 includes power supply module 501 and voltage monitoring module 502；
The data input/output module 10, the control module 20, the data processing module 30 and the storage mould
Block 40 is all connected to the power supply module 501.The power supply module 501 includes that 1 PTH05010W power module mentions
It further include that 1 PTH05000 power module provides 2.5V, 1.6V, 3.3V voltage for 1.2V voltage and up to the output electric current of 15A
With the output electric current up to 6A.The power consumption of whole system is mainly from 4 ADSP-TS201 DSP.In view of system is in worst
Maximum power dissipation and maximum current demand when state, in conjunction with the voltage requirements of each module, only choosing two power modules is system
Power supply, can sufficiently meet system power supply demand.
The voltage monitoring module respectively with the data input/output module 10, the control module 20, the data
Processing module 30 is connected with the memory module 40, and the voltage monitoring module 502 is used to monitor in real time the work of modules
Make voltage.Voltage monitoring module in the present invention, for guaranteeing that system enters normal operating conditions, while when system occurs abnormal
It plays a protective role, which has based on MAX708 chip and monitor 30 operating voltage of data processing module and system
The function of voltage.
The peripheral circuit module 50 further includes watchdog reset module 503, the watchdog reset module 503 with it is described
Data processing module 30 is connected.House dog can select ADM706R in the optional module, can either complete house dog and appoint
Business, and can be that the data processing module 30 provides good reset signal under the driving of external signal.ADSP- can be used
In addition feeding-dog signal of the FLAG pin of TS201 as house dog can be arranged in systems described in a key conduct
The initial signal input switch of data processing module 30.
Through the foregoing embodiment it is found that the big real-time processing system of picture remote sensing images provided by the present invention for star loaded camera
System, at least realize it is following the utility model has the advantages that
(1) present invention is realized by data/address bus to ADSP- using high-performance CPLD XC95288 by DPSRAM
TS201 sends or receives image data from ADSP-TS201, and hardware realization is simple, high reliablity, 4 ADSP-TS201 DSP's
Single link port can provide the data transmission bauds of unidirectional 500Mbytes/s, fully met big picture remote sensing images into
The image data transmission demand that row is handled in real time.And it is interconnected between 4 ADSP-TS201 using link port, is passed through simultaneously
Multiprocessor bus interconnection, provides connection type abundant for the interaction of intermediate processing data.
(2) present invention selects the control module of CPLD XC95288 and two DPSRAM as system, CPLD XC95288
Can be according to the digital integrated electronic circuit of user demand voluntarily constitutive logic function, flexible in programming, integrated level be high, the development cycle
It is short, the scope of application is wide, manufacturing cost is low, for all kinds of remote sensing images in real time handle using have good expansibility.CPLD
XC95288 provide control signal, and DPSRAM be only used for data transmission, control module it is clear in structure, have it is very strong can be more
Change and controllability.
(3) present invention is serially believed using TLK2711 as receiver and transmitter in data input/output module
Conversion number between parallel signal, and the indirect control module using in system carries out the conversion operation of data signal format.
TLK2711 is capable of providing the data throughout of highest 2.7Gbps, can satisfy the figure of big picture remote sensing images real time processing system
As data input and output demand.
(4) present invention converts the input and output of image data, format, distribution merges and the functions such as timing control are merged into
One data input/output module formed with TLK2711 high speed serialization transceiver and one are processing control core with CPLD
Control module in, realize the miniaturized design to hardware system, have significant extending application and application value.
Although some specific embodiments of the invention are described in detail by example, the skill of this field
Art personnel it should be understood that example above merely to being illustrated, the range being not intended to be limiting of the invention.The skill of this field
Art personnel are it should be understood that can without departing from the scope and spirit of the present invention modify to above embodiments.This hair
Bright range is defined by the following claims.
Claims (8)
1. a kind of big picture remote sensing images real time processing system for star loaded camera characterized by comprising data input/
Output module, control module, data processing module and memory module；
The control module is respectively connected with the data input/output module and the data processing module, the control
Module includes piece of CPLD XC95288 and two panels DPSRAM, the CPLD XC95288 reading with DPSRAM described in two panels respectively
Write control logic signal is connected, and DPSRAM described in two panels is respectively input terminal DPSRAM and output end DPSRAM；
The CPLD XC95288 is used to send write control signal to the input terminal DPSRAM, and the input terminal DPSRAM connects
Image data to be processed is received after receiving said write control signal, the CPLD XC95288 is also used to control at the data
It manages module and reads the image data to be processed；
The CPLD XC95288, which is also used to send to the output end DPSRAM, writes out control signal, the output end DPSRAM
It is write out described in reception and image data after processing is sent to the data input/output module after controlling signal；
The data input/output module includes two TLK2711 high speed serialization transceivers, and two TLK2711 high speeds are gone here and there
Row transceiver is respectively input terminal TLK2711 high speed serialization transceiver and output end TLK2711 high speed serialization transceiver；
The input terminal TLK2711 high speed serialization transceiver is connected with the input terminal DPSRAM, for receiving digital picture
The data image signal is converted to parallel TTL data image signal lattice by serial LVDS data image signal format by signal
Formula, and extracted valid data generates the image data to be processed, and the image data to be processed is sent to the input terminal
DPSRAM；
The output end TLK2711 high speed serialization transceiver is connected with the output end DPSRAM, for receiving the output
Image data after the processing for holding DPSRAM to send, by image data after the processing by parallel TTL data image signal lattice
Formula is converted to serial LVDS data image signal and exports；
The data processing module is respectively connected with the control module and the memory module, described to be processed for reading
Image data, and image data after the processing is obtained after handling the image data to be processed, wherein
The data processing module include 4 ADSP-TS201DSP, every 1 ADSP-TS201DSP with other 3 described in
A set of point-to-point data-link connected entirely is formed using link port between ADSP-TS201DSP, realizes 4 ADSP-
The connection of loose coupling two-by-two between TS201DSP, while 4 ADSP-TS201DSP are total by the outside for sharing one 32
Line realizes close coupling interconnection, and 4 ADSP-TS201DSP possess respective in the address range of 32 unified addressing
The shared memory space of memory headroom and broadcast access；
The memory module includes two panels SDRAM and a piece of Flash chip, wherein the SDRAM is 4 ADSP-
The memory extended on the external bus of TS201DSP, the Flash chip are the program designation chip in the processing system
And external extended menory.
2. the big picture remote sensing images real time processing system according to claim 1 for star loaded camera, which is characterized in that
Further include: peripheral circuit module；
The peripheral circuit module includes power supply module and voltage monitoring module；
The data input/output module, the control module, the data processing module and the memory module are all connected to
The power supply module；
The voltage monitoring module respectively with the data input/output module, the control module, the data processing module
It is connected with the memory module, the voltage monitoring module is used to monitor in real time the operating voltage of modules.
3. the big picture remote sensing images real time processing system according to claim 2 for star loaded camera, which is characterized in that
The peripheral circuit module further includes watchdog reset module, the watchdog reset module and the data processing module
It is connected.
4. the big picture remote sensing images real time processing system according to claim 1 for star loaded camera, which is characterized in that
The CPLD XC95288 is also used to receive control instruction and carries out analysis judgement to the control instruction, described in judgement
Control instruction is when carrying out image processing commands, and the CPLD XC95288 controls the input terminal DPSRAM will be described to be processed
Image data is sent to the data processing module；Wherein,
The input terminal DPSRAM successively sends institute to 4 respective link ports of ADSP-TS201DSP by data/address bus
State image data to be processed.
5. the big picture remote sensing images real time processing system according to claim 1 for star loaded camera, which is characterized in that
The CPLD XC95288 is also used to receive control instruction, and carries out analysis judgement to the control instruction, when judgement institute
When to state control instruction be direct mode operation instruction, the CPLD XC95288 controls the input terminal DPSRAM and executes image data
Directly enter directly to go out；Wherein,
The input terminal DPSRAM is connected with the output end TLK2711 high speed serialization transceiver, the input terminal DPSRAM
The image data to be processed is sent to the output end TLK2711 high speed serialization transceiver；
The output end TLK2711 high speed serialization transceiver is by the image data to be processed by parallel TTL data image signal
Format is converted to serial LVDS data image signal and exports.
6. the big picture remote sensing images real time processing system according to claim 1 for star loaded camera, which is characterized in that
The output end DPSRAM is also used to receive image data after the processing, and image data after the processing is delayed
Deposit merging；
The output end DPSRAM after by the processing image data caching merge after, according to the control of the CPLD XC95288
Image data after the processing is sent to the output end TLK2711 high speed serialization transceiver by logic processed.
7. the big picture remote sensing images real time processing system according to claim 1 for star loaded camera, which is characterized in that
The clock frequency of SDRAM described in two panels is all larger than 80MHz, and the bit wide of SDRAM described in two panels is 640MBps, two institutes
The capacity for stating SDRAM is 512Mbits.
8. the big picture remote sensing images real time processing system according to claim 1 for star loaded camera, which is characterized in that
The bit wide of the Flash chip is 8bit, capacity 8Mbits.
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