CN109565934A - 下层凹槽组件放置 - Google Patents
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Abstract
为球栅阵列下方的组件放置提供下层凹槽,允许更接近解耦电容器和其他组件。组件的下层凹槽放置有助于最小化涉及表面安装组件的可靠性问题,并且提供组件的更靠近的接近放置。组件的下层凹槽放置针对克服本领域中已知的更远的组件放置的寄生电感尤其有用。
Description
技术领域
本发明涉及球栅阵列,并且具体地涉及紧邻的组件放置,包括解耦组件。
背景技术
随着诸如球栅阵列(BGA)封装的电子集成电路(EIC)封装的密度、接口连接密度、以及时钟速度的增加,针对电解耦BGA器件的要求变得更加严格。将这些解耦电容器尽可能靠近BGA焊盘放置是有优势的。表面安装(surface-mount)解耦电容器的典型放置是靠近电子电路板同侧上的BGA器件,或者在电子电路板的对侧上,通过穿过电路板的通孔而被连接。由于布线引线的长度以及穿过通孔本身的导电路径的长度,这两种技术会引入寄生电感。
提供最大化接近度的组件放置的一种方法是将解耦电容器放置在在栅格阵列中的BGA本身的底部上,如美国专利US8806420“In-Grid On-Device Decoupling for BGA”以及美国专利US8863071“De-Pop On-Device Decoupling for BGA”中描述的,其全部内容通过引用而被并入本文。伴随该方法而出现的困难是,与简单的提供BGA本身相比,BGA制造者可能不愿意承担将组件放置在BGA上伴随的责任和测试方式。
因此,继续需要将小型组件放置在靠近球栅阵列附近的备选方法。
发明内容
各种示例性实施例的简要概述在下文中被呈现。在以下概述中可以进行一些简化和省略,其旨在突出和介绍各种示例性实施例的一些方面,而不是限制本发明的范围。适于允许本领域普通技术人员制造和使用本发明构思的优选示例性实施例的具体实施方式将在后面的部分中。
根据本发明的方面,提供了通孔印刷电路板(PCB),该通孔印刷电路板具有:在PCB的一侧上的球栅阵列(BGA)焊盘的BGA,该球栅阵列以紧密间距的网格图案被布置;铣削的凹槽,该铣削的凹槽在PCB中的PCB的相同侧上、邻近并且在BGA焊盘的球栅阵列的BGA焊盘中的第一BGA焊盘与第二BGA焊盘之间;该凹槽的被确定大小以包含表面安装组件(SMC);在铣削的凹槽的底部的第一对分离导电焊盘,每个焊盘被分别地导电地耦合到第一BGA焊盘和第二BGA焊盘。
在本发明的该方面的一些实施例中,第二对分离的导电焊盘围绕铣削的凹槽的开口,每个焊盘被分别地耦合到第一BGA焊盘和第二BGA焊盘。
在本发明的该方面的一些实施例中,紧密间距的网格图案具有1mm的间距。在这些实施例中的一些实施例中,SMC具有行业标称的0201大小;并且第一BGA焊盘和第二BGA焊盘相对于网格图案被成对角地设置。在这些实施例中的其他实施例中,SMC具有行业标称的01005大小;并且第一BGA焊盘和第二BGA焊盘相对于网格图案被成对角地设置。
在本发明的该方面的一些实施例中,BGA焊盘的球栅阵列的至少一个BGA焊盘已经被移除;并且铣削的凹槽被定为在阵列网格中的该至少一个BGA已经被移除处。在这些实施例中的一些实施例中,SMC具有行业标称01005大小,在一些行业标称0201大小中,在一些行业标称0402的大小中,在一些行业标称0603的大小中。
在本发明的该方面的一些实施例中,细小的凹槽由激光铣削。
根据本发明的另一方面,提供了制造多层PCB的方法,其中该PCB具有以网格图案被布置的、在PCB的一侧上的BGA焊盘的球栅阵列(BGA);该方法包括以下步骤:在PCB中的PCB的相同侧上、邻近并且在BGA焊盘的球栅阵列的第一BGA焊盘与第二BGA焊盘之间铣削凹槽,凹槽的底部具有在铣削的凹槽的底部处布置的第一对分离的导电焊盘,每个焊盘被分别地导电地耦合到第一BGA焊盘和第二BGA焊盘;对凹槽的确定大小以包含表面安装组件(SMC);将焊膏放置在所述第一对分离的导电焊盘中;将焊膏放置在BGA焊盘的球栅阵列(BGA)上;将SMC放置在凹槽内;将BGA组件放置在SMC上方;回流焊接SMC组件和BGA组件。
在本发明的该方面的一些实施例中,铣削由激光执行。
在本发明的该方面的一些实施例中,存在多层PCB将第二对分离的导电焊盘围绕在铣削的凹槽的开口的进一步步骤,每个焊盘被分别地导电地耦合到与凹槽的相同端处的相应的导电焊盘相同的、第一BGA焊盘和第二BGA焊盘;以及,在将SMC放置在凹槽内的步骤之前,将焊膏放置在第二对分离的导电焊盘上。
在本发明的该方面的一些实施例中,SMC是电容器。
在本发明的该方面的一些实施例中,第一BGA焊盘和第二BGA焊盘相对于网格图形被成对角地设置。
在本发明的该方面的一些实施例中,BGA焊盘的球栅阵列的至少一个BGA焊盘已经被移除;以及,凹槽的铣削被定位在阵列网格中的至少一个BGA已经被移除处。
根据本发明的又一方面,提供了被实现在计算设备上的计算机辅助设计工具,该计算设备用于容纳多层印刷电路板(PCB),其中PCB具有:在PCB的一侧上的球栅阵列(BGA)焊盘的BGA,该球栅阵列以紧密间距的网格图案被布置,该网格图案具有:被配置为在印刷电路板(PCB)上选择用于连接到两个引线组件的两个相邻BGA焊盘的设计工具模式;被配置为标识在两个BGA焊盘之间的凹槽的放置的设计工具模式,该凹槽用于包含表面安装组件(SMC);被配置为标识PCB的内层上的分离子组件焊盘的放置、以便定义凹槽的底部的设计工具模式;以及,被配置为将分离的组件焊盘导电地连接到两个BGA焊盘的相应BGA焊盘的设计工具模式。
在本发明的该方面的一些实施例中,设计工具进一步具有:被配置为标识围绕铣削凹槽的开口的第二对分离的导电焊盘的放置的设计工具模式;以及,被配置为将第二对分别地连接到与凹槽的相同端处的相应导电焊盘相同的、第一BGA焊盘和第二BGA焊盘。
在本发明的该方面的一些实施例中,设计工具进一步具有,被配置为标识从BGA焊盘的球栅阵列移除至少一个BGA焊盘,并且将凹槽设置在BGA焊盘已经被移除处的阵列网格中的设计工具模式。
附图说明
为了更好的理解各种示例性实施例,参考附图,其中:
图1a示出了根据本发明的实施例的细间距通孔多层电路板的部分的横截面视图;
图1b示出了图1的细间距通孔多层电路板的激光蚀刻部分的横截面视图;
图1c示出了图1的细间距通孔多层电路版的激光蚀刻的另外部分的横截面视图;
图2a示出了被施加在其内并且邻近图1的细间距通孔多层电路版的激光蚀刻的凹槽的焊膏的横截面视图;
图2b示出了被放置在图2a的细间距通孔多层电路版的激光蚀刻的凹槽内的表面安装组件的横截面视图;
图2c示出了被放置在图2b的细间距通孔多层电路版的激光蚀刻的凹槽的上方的BGA组件的横截面视图;
图3a示出了根据本发明的实施例的其上安装有表面安装组件的细间距通孔多层电路板的顶层上的铜接地图案的俯视图;
图3b示出了根据本发明的实施例的细间距通孔多层电路板的内层上的铜结构图案的俯视图;
图3c示出了根据本发明的实施例的相对于BGA接地焊盘对的、细间距通孔多层电路板的顶层的铜接地图案的俯视图;
图4示出了根据本发明的实施例的相对于BGA接地焊盘的网格的、细间距通孔多层电路板的顶层的铜接地图案的俯视图;
图5示出了根据本发明的实施例的方法步骤系列的流程图。
为了便于理解,类似的附图标记被用于表示具有基本相同或相似结构和/或基本相同或相似功能的元件。
具体实施方式
实施方式和附图仅图示了本发明的原理。因此,应当理解,本领域技术人员将能够设计各种布置,这些布置尽管未在本文中被明确描述或示出,但实施了本发明的原理并且被包括在其范围内。此外,本文阐述的所有示例原理性地旨在仅用于教学目的来帮助读者理解本发明的原理和发明人为进一步领域而提供的概念,并且应被解释不限于这些特定阐述的示例和条件。附加地,如本文所用的术语“或者”指代非排他性的(即,和/或),或者除非另有指示(例如,“或者(or else)”或“在备选中”)。另外,本文描述的各种实施例不一定是相互排斥的,如一些实施例可以与一个或多个其他实施例被组合一形成新的实施例。
现在参考附图,其中相同标记指代相同组件或步骤,公开了各种示例性实施例的广泛方面。
参考图1A,可以看到细间距通孔多层电路板的横截面视图。焊盘101a和焊盘101b在印刷电路板的顶层,并且在图3A和图3C中被进一步详细示出。绝缘树脂层将多层板的导电部分分离。导电迹线103表示第一信号层上的迹线,同时导电区域105a和导电区域105b(将在图3B中被进一步详细图示)位于第二信号层。导电区域105a和导电区域105b承担两个角色。首先,他们将最终充当用于表面安装组件的焊接点,并且其次他们将充当用于将会结合图1B描述的用于激光钻孔的停止层。
参考图1B,可以看到图1A的细间距通孔多层电路板的部分的横截面视图,其中激光器116使用其波束118来在电路板中挖掘腔119。通常为铜的导电区域105a充当用于激光波束118的尺寸“停止”,设置挖掘的凹槽的深度。波束118使导电区域105a上方的绝缘树脂层蒸发,留下可用作组件焊盘(如下文将描述的)的区域。
参考图1C,可以看到图1B的细间距通孔多层电路板的部分的横截面视图,其中激光器继续进一步挖掘。可以看到波束128挖掘到进一步的深度129,其中导电部分107充当用于波束的“停止”。导电部分107通常是多层电路板内的功率或接地平面的一部分。在导电区域105a与导电区域105b之间的进一步的深度部分在这些区域随后被用作组件焊盘时,将充当这些导电区域之间的绝缘间隙。
参考图2A,可以看到图1C的细间距通孔多层电路板的部分的横截面试图,其中激光器具有已经完成挖掘。焊膏量231已经被放置在导电焊盘区域201a和导电焊盘区域201b上的印刷电路板上。
在图2B中,表面安装组件243已经被嵌入到凹槽中,使焊膏分布到导电区域焊盘205a和导电区域焊盘205b上。通常,该组件将是解耦电容器。其他类型的表面安装组件可以备选地被放置在凹槽中,包括诸如电阻器和二极管的两端口设备。
参考图2C,可以看到被放置在图2B中描绘的细间距通孔多层电路板的一部分上的球栅阵列的横截面视图。BGA的底部部分255具有焊球259a和焊球259b,焊球259a和焊球259b被放置到焊膏的相应部分中。随后的回流焊接操作将BGA和表面安装组件两者固定到印刷电路板上的他们的相应接触焊盘上。
现在参考图3A至图3C,可以看到通常为铜的导电接地图案的俯视图,其对应于先前附图。在图3A中,可以看到多层电路板的顶层上的大体为U形的导电焊盘301a和导电焊盘301b。这些焊盘分别对应于图1A的导电横截面101a和101b,并且围绕表面安装组件343被放置在其中的凹槽。
在图3B中,可以看到导电焊盘,其中组件343的底部被最终焊接。这些导电焊盘分别对应于图1的导电横截面105a和导电横截面105b,并且如前所述,还充当用于激光铣削过程的“停止”,以定义这些区域中的凹槽的底部。
现在参考图3C,可以看到印刷电路板组件焊盘309a和309b,其包括BGA组件被焊接到的焊盘网格的一部分。这些组件焊盘309a和309b被分别导电地连接到U形导电焊盘301a和301b。同样,印刷电路板通孔连接还将内层导电焊盘305a和305b相应地连接到组件焊盘309a和309b,在完成回流焊接操作时,通孔在组件焊盘与表面安装元件343之间提供一定程度的附加可靠性。
现在参考图4,可以看到在印刷电路板组件焊盘409a至409d内的本发明的实施例的俯视图,BGA将被焊接到该印刷电路板组件焊盘409a至409d。在该实施例中,BGA网格是具有1mm间距的规则网格,允许用于尺寸为标称行业大小“0201”的U形导电焊盘401a和401b、凹槽、以及表面安装组件443的足够空间。诸如标称行业大小“01005”的更小组件可以同样地以具有U形导电焊盘和凹槽的适当尺寸调整的类似配置而被设置。
根据本发明的另一实施例,通过U型导电焊盘和凹槽的适当尺寸调整,以及通过减少某些BGA组件焊盘(以及该BGA组件上对应的球),诸如标称行业大小“0402”和“0603”的更大组件大小也可以被放置在BGA网格图案内。同样,通过减少某些BGA组件焊盘和该BGA组件上的对应球,本发明的实施例可以被实现在除1mm间距之外的规则网格上,例如具有0.8mm间距的那些网格。备选地,本发明的实施例还可以被实现在非规则网格上,提供适于将被定位在组件上方的球栅阵列的组件放置的灵活性。
参考图5,可以看到根据本发明的实施例的方法的步骤的流程图500。该方法开始于步骤501。在步骤503处,提供细间距通孔多层电路板,该电路板具有其适于被放置表面安装组件的组件焊盘和导电连接。在步骤505,激光铣削操作雕刻用于表面安装组件的合适凹槽,该表面安装组件位于相应的球栅阵列组件的下方。如前所述,内部导电焊盘已经被放置以充当用于激光铣削操作的“停止”。在步骤507处,焊膏被施加到电路板,并且在步骤509处,表面安装组件被放置使得表面安装组件的合适导电焊盘和导电球接触焊膏。在步骤511处,焊接回流操作被执行,回流焊膏并且导电附接表面安装组件。然后,该方法在步骤513处终止。
在示例性实施例中,计算机辅助设计工具允许对顶层和内层两者上的导电组件焊盘的选择基本上自动化。计算机辅助设计工具可以自动标识导电焊盘的适当间隔和形状,以将标准组件放置在相应的BGA网格内,以用于附接到定义的凹槽内的板上。计算机辅助设计工具还可以提供控制机器来制造修改的电路板的指令。指令可以被导出到机器、或者设计工具可以直接控制机器。
因此,已经公开了将表面安装组件放置在相应凹槽中的球栅阵列下方的方法,因此提供将小型组件放置在球栅阵列附近内的备选方法。
尽管附图和描述可以描绘示例性实施例中的不同元件的规则圆形或矩形形状,但是应当理解备选形状可以被使用,诸如不完美的多边形和圆形形状。这些备选形状可以基本上类似于区域和轮廓中描绘的形状。
尽管各种示例性实施例已经具体参考其某些示例性方面而被描述,但是应当理解本发明能够具有其他实施例,并且其细节能够在各种明显的方面进行修改。如对本领域技术人员明显的是,变型和修改可以被实现、同时保持在本发明的精神和范围内。相应地,前述公开、实施方式、以及附图仅用于说明性目的,并且不以任何方式限制本发明,本发明仅由权利要求来定义。
Claims (10)
1.一种通孔印刷电路板(PCB),包括:
在所述PCB的一侧的球栅阵列(BGA)焊盘的BGA,所述球栅阵列以紧密间距的网格图案被布置;
铣削的凹槽,所述铣削的凹槽在所述PCB中的所述PCB的相同的所述侧上、邻近并且在所述BGA焊盘的球栅阵列的所述BGA焊盘中的第一BGA焊盘与第二BGA焊盘之间;
所述凹槽被确定大小以包含表面安装组件(SMC);
在所述铣削的凹槽的底部的第一对分离导电焊盘,每个焊盘被分别导电地耦合到所述第一BGA焊盘和所述第二BGA焊盘。
2.根据权利要求1所述的PCB,其中
第二对分离的导电焊盘围绕所述铣削的凹槽的开口,每个焊盘被分别导电地耦合到所述第一BGA焊盘和所述第二BGA焊盘。
3.根据权利要求1和2中任一项所述的PCB,其中
所述紧密间距的网格图案具有1mm的间距。
4.根据权利要求3所述的PCB,其中
所述SMC具有行业标称的0201大小和行业标称的01005大小中的一个;以及
所述第一BGA焊盘和所述第二BGA焊盘相对于所述网格图案被成对角地设置。
5.根据权利要求1至4中任一项所述的PCB,其中
所述BGA焊盘的球栅阵列的至少一个BGA焊盘已经被移除;以及
所述铣削的凹槽被定位在所述阵列网格中的所述至少一个BGA已经被移除处。
6.一种制造多层PCB的方法,其中所述PCB具有以网格图案被布置的、在所述PCB的一侧上的球栅阵列(BGA)焊盘的BGA;所述方法包括以下步骤:
在所述PCB中的所述PCB的相同的所述侧上、邻近并且在所述BGA焊盘的球栅阵列的所述BGA焊盘中的第一BGA焊盘与第二BGA焊盘之间铣削凹槽,所述凹槽的底部具有在所述铣削的凹槽的底部布置的第一对分离的导电焊盘,每个焊盘被分别导电地耦合到所述第一BGA焊盘和所述第二BGA焊盘;
对所述凹槽确定大小以包含表面安装组件(SMC);
将焊膏放置在所述第一对分离的导电焊盘中;
将焊膏放置在所述BGA焊盘的球栅阵列(BGA)上;
将SMC放置在所述凹槽内;
将BGA组件放置在所述SMC上方;
回流焊接所述SMC组件和所述BGA组件。
7.根据权利要求6所述的方法,其中
所述多层PCB具有围绕所述铣削的焊盘的开口的第二对分离的导电焊盘,每个焊盘被分别导电地耦合到与所述凹槽的相同端处的分别的导电焊盘相同的、所述第一BGA焊盘和所述第二BGA焊盘;以及
在将SMC放置在所述凹槽内的所述步骤之前,将焊膏放置在所述第二对分离的导电焊盘上。
8.根据权利要求6和7中任一项所述的方法,其中
所述第一BGA焊盘和所述第二BGA焊盘相对于所述网格图案被成对角地设置。
9.根据权利要求6至8中任一项所述的方法,其中
所述BGA焊盘的球栅阵列的至少一个BGA焊盘已经被移除;以及
所述凹槽的所述铣削被定位在所述阵列网格中的所述至少一个BGA已经被移除处。
10.根据权利要求6至9中任一项所述的方法,其中所述铣削由激光执行。
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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TWI820697B (zh) * | 2022-03-23 | 2023-11-01 | 日商鎧俠股份有限公司 | 電子裝置 |
Also Published As
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KR20190028760A (ko) | 2019-03-19 |
US20180020547A1 (en) | 2018-01-18 |
EP3485709A1 (en) | 2019-05-22 |
WO2018011633A1 (en) | 2018-01-18 |
JP2019525464A (ja) | 2019-09-05 |
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