CN109545839B - 一种双向耐压vdmos器件 - Google Patents

一种双向耐压vdmos器件 Download PDF

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CN109545839B
CN109545839B CN201811343651.5A CN201811343651A CN109545839B CN 109545839 B CN109545839 B CN 109545839B CN 201811343651 A CN201811343651 A CN 201811343651A CN 109545839 B CN109545839 B CN 109545839B
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刘斯扬
钊雪会
徐浩
童鑫
孙伟锋
陆生礼
时龙兴
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Southeast University
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Abstract

一种双向耐压VDMOS器件，包括：N型漏极，其上设有第一N型外延层，在第一N型外延层内设有第一P型体区，在第一P型体区两侧设有第二P型体区，其上设有第二N型外延层，在第二N型外延层上设有重掺杂N型源极，其上连接有源极金属层，在第一N型外延层、第二P型体区、第二N型外延层及N型源极内设有栅极沟槽，栅极沟槽起始于N型源极，止于第一N型外延层内，栅极沟槽底部及侧壁设有栅极氧化层，内部设有栅极多晶硅，在栅极多晶硅顶部至N型源极表面之间设有氧化层。本发明简化了传统双向开关器件的结构，大大降低了导通电阻以及损耗，提高器件的电流能力和双向耐压能力，同时其制备方法简单，成本较低。

Description

一种双向耐压VDMOS器件
技术领域
本发明主要涉及功率半导体器件技术领域，具体涉及一种双向耐压VDMOS(Vertical Double-diffused Metal Oxide Semiconductor，垂直双扩散金属氧化物半导体场效应晶体管)器件及其制备方法，特别适用于智能手机、笔记本电脑、数码相机等电子产品中锂电池以及太阳能电池充放电及其保护电路。
背景技术
目前，可充电锂电池由于其具有较小的芯片面积、高的能量密度等独特优势受到了诸如移动智能手机、数码相机等小体积便携式电子设备的青睐。可充电锂电池有充电和放电两种工作方式，这两种工作方式下电流的流向相反。为了防止锂电池过充电或者过放电而导致的锂电池过热、寿命缩短报废，通常锂电池保护电路中采取一种双向开关预设对比电压来避免锂电池的过充电和过放电。而由于充电与放电工作方式下电流流向相反，因此双向开关在关断时需要在正向与反向上承受锂电池电源的电压值。为了获得易驱动的MOS型双向开关，可采用以下技术方案：1)两个MOSFET管共漏反向并联以获得双向开关功能；2)将常规的MOSFET与二极管串联使用以确保双向阻断功能，再将两组上述MOSFET与二极管串联的结构反向并联以实现双向导通双向阻断功能。以上的两种技术方案需要使用多个功率器件的组合，增加了器件的损耗，降低了器件的性能，同时也增大了电池芯片的面积与成本，影响锂电池芯片在便携式电子设备中的使用。
由于电子产品正在向更小体积的趋势发展，其内部所用芯片面积需要相应减小，同时其导通电阻也需要减小。为了进一步减小手机等电子产品中芯片面积与成本，并降低其导通电阻，目前对锂电池保护电路中的双向开关研究的一个重要方面就是对双向开关的导通压降的优化提升。
发明内容
本发明针对上述方面，提出了一种双向耐压VDMOS器件及其制备方法。
本发明提供如下结构技术方案：
一种双向耐压VDMOS器件，包括：N型漏极，其上设有第一N型外延层，在第一N型外延层的上方两侧分别设有柱状第一P型体区，在两柱状第一P型体区的内侧设有第二P型体区，在第一P型体区和第二P型体区上设有第二N 型外延层，在第二N型外延层上设有重掺杂N型源极，在N型源极表面连接有源极金属层，在第一N型外延层、第二P型体区、第二N型外延层及N型源极内设有栅极沟槽，栅极沟槽起始于N型源极的表面，穿过第二N型外延层和第二P型体区并止于第一N型外延层内，栅极沟槽底部及侧壁设有栅极氧化层，在栅极沟槽内设有栅极多晶硅，在栅极沟槽内的栅极多晶硅顶部至N型源极的上表面之间设有氧化层。
本发明提供如下方法技术方案：
一种双向耐压VDMOS器件的制备方法，
第一步：首先选取N型硅材料作为N型漏极，并外延生长第一N型外延层；
第二步：利用掩膜板在第一N型外延层刻蚀出柱状第一P型体区的下半部分沟槽；
第三步：回填P型硅材料，并利用掩膜板刻蚀回填的P型硅材料形成柱状第一P型体区；
第四步：利用掩膜板选择性注入磷离子并退火激活形成第二P型体区；
第五步：再次回填N型硅材料形成第二N型外延层，表面平坦化后通过普注的形式注入砷离子并退火激活形成重掺杂N型源极；
第六步：利用掩膜板刻蚀出栅极沟槽并生长栅氧化层；
第七步：淀积多晶硅，刻蚀多余多晶硅形成栅极多晶硅；
第八步：淀积氧化层并制作源极金属层。
与现有技术相比，本发明具有以下优点：
1.本发明器件利用其三明治结构，在第一外延层上设有第二P型体区，第二 P型体区上设有第二外延层，具备双向耐压能力：①当器件漏极加高压，源极加低压时，第一外延层与第二P型体区相互耗尽，耗尽层绝大部分在第一外延层中展开，第一外延层承受正向电压；②当器件源极加高压，漏极加低压时，第二外延层与第二P型体区相互耗尽，耗尽层绝大部分在第二外延层中展开，第二外延层承受反向电压。从而实现单个器件双向耐压的功能。
2.本发明器件利用电荷平衡理论可以大幅度降低器件的导通电阻，提高器件导通性能。为了得到双向耐压的效果，第一P型体区上半部分必须和源极隔离。当器件承受耐压时，第一P型体区可以辅助耗尽N型外延层，起到电场调制效果，极大地提高了器件的耐压能力，因此在相同耐压条件下，可以大幅度提高第一P型体区和N型外延层的浓度，从而大幅度降低器件的导通电阻，提高器件性能。
3.本发明器件可以根据不同的正向耐压和反向耐压需求，调整第二P型体区与第一P型体区在垂直方向上的位置，进一步优化器件耐压与导通电阻的折中关系。当漏极耐压与源极耐压需求相同时，第二P型体区在垂直方向上位于第一P 型体区中间位置；当漏极耐压高于源极耐压需求时，第二P型体区在垂直方向上位于第一P型体区偏上位置；当源极耐压高于漏极耐压需求时，第二P型体区在垂直方向上位于第一P型体区偏下位置。
4.本发明器件结构设计工艺保留了部分传统金属氧化物半导体场效应晶体管结构的设计工艺，具有良好的兼容性。
附图说明
图1所示为传统的沟槽金属氧化物半导体型场效应晶体管的器件剖面结构图。
图2所示为现有的一种纵向双向耐压功率半导体晶体管的器件剖面结构图。
图3所示为本发明提出的新型双向耐压VDMOS器件的剖面结构图。
图4所示为本发明提出的新型双向耐压VDMOS器件沿中间切面的横向剖面结构图。
图5～图14所示为本发明新型双向耐压VDMOS器件的制备方法的工艺流程图。
具体实施方式
本发明器件具有独特的三明治结构，在第一外延层上设有第二P型体区，第二P型体区上设有第二外延层，具备双向耐压能力：在正向导通下，器件漏极加高压，源极加低压，第一外延层与第二P型体区相互耗尽，耗尽层绝大部分在第一外延层中展开，主要由第一外延层承受正向电压；在反向导通下，器件源极加高压，漏极加低压，第二外延层与第二P型体区相互耗尽，耗尽层绝大部分在第二外延层中展开，主要由第二外延层承受反向电压。当器件承受耐压时，第一P 型体区可以辅助耗尽N型外延层，起到电场调制效果，极大地提高了器件的耐压能力。在相同耐压条件下，利用电荷平衡理论，可以大幅度提高第一P型体区和N型外延层的浓度，从而大幅度降低器件的导通电阻，提高器件性能。本发明器件可以根据不同的正向反向耐压需求，调整第二P型体区与第一P型体区在垂直方向上的位置，进一步优化器件耐压与导通电阻的折中关系。当漏极耐压与源极耐压需求相同时，第二P型体区在垂直方向上位于第一P型体区中间位置；当漏极耐压高于源极耐压需求时，第二P型体区在垂直方向上位于第一P 型体区偏上位置；当源极耐压高于漏极耐压需求时，第二P型体区在垂直方向上位于第一P型体区偏下位置。所述器件制备方法保留了部分传统金属氧化物半导体场效应晶体管结构的设计工艺，具有良好的兼容性。
下面结合图3，对本发明做详细说明，一种双向耐压VDMOS器件，包括： N型漏极1，其上设有第一N型外延层2，在第一N型外延层2的上方两侧分别设有柱状第一P型体区11，在两柱状第一P型体区11的内侧设有第二P型体区 5，在第一P型体区11和第二P型体区5上设有第二N型外延层10，在第二N 型外延层10上设有重掺杂N型源极7，在N型源极7表面连接有源极金属层8，在第一N型外延层2、第二P型体区5、第二N型外延层10及N型源极7内设有栅极沟槽3，栅极沟槽3起始于N型源极7的表面，穿过第二N型外延层10 和第二P型体区5并止于第一N型外延层2内，栅极沟槽3底部及侧壁设有栅极氧化层4，在栅极沟槽3内设有栅极多晶硅6，在栅极沟槽3内的栅极多晶硅 6顶部至N型源极7的上表面之间设有氧化层9。
下面结合图4～图13，对本发明的制备方法做详细说明：
第一步：首先选取N型硅材料作为N型漏极1，并外延生长第一N型外延层2；
第二步：利用掩膜板在第一N型外延层2刻蚀出柱状第一P型体区11的下半部分沟槽；
第三步：回填P型硅材料，并利用掩膜板刻蚀回填的P型硅材料形成柱状第一P型体区11；
第四步：利用掩膜板选择性注入磷离子并退火激活形成第二P型体区5；
第五步：再次回填N型硅材料形成第二N型外延层10，表面平坦化后通过普注的形式注入砷离子并退火激活形成重掺杂N型源极7；
第六步：利用掩膜板刻蚀出栅极沟槽3并生长栅氧化层4；
第七步：淀积多晶硅，刻蚀多余多晶硅形成栅极多晶硅6；
第八步：淀积氧化层9并制作源极金属层8。

Claims (2)

1.一种双向耐压VDMOS器件，其特征在于，包括：N型漏极(1)，其上设有第一N型外延层(2)，在第一N型外延层(2)的上方两侧分别设有柱状第一P型体区(11)，在两柱状第一P型体区(11)的内侧设有第二P型体区(5)，在第一P型体区(11)和第二P型体区(5)上设有第二N型外延层(10)，在第二N型外延层(10)上设有重掺杂N型源极(7)，在N型源极(7)表面连接有源极金属层(8)，在第一N型外延层(2)、第二P型体区(5)、第二N型外延层(10)及N型源极(7)内设有栅极沟槽(3)，栅极沟槽(3)起始于N型源极(7)的表面，穿过第二N型外延层(10)和第二P型体区(5)并止于第一N型外延层(2)内，栅极沟槽(3)底部及侧壁设有栅极氧化层(4)，在栅极沟槽(3)内设有栅极多晶硅(6)，在栅极沟槽(3)内的栅极多晶硅(6)顶部至N型源极(7)的上表面之间设有氧化层(9)，所述栅极沟槽(3)的下表面介于第二P型体区(5)下表面与柱状第一P型体区(11)的下表面之间。
2.根据权利要求1所述的一种双向耐压VDMOS器件，其特征在于，所述栅极多晶硅(6)的上表面高于所述第二P型体区(5)的上表面。
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