CN109545752A - 薄膜晶体管基板的制备方法及其制备的薄膜晶体管基板 - Google Patents
薄膜晶体管基板的制备方法及其制备的薄膜晶体管基板 Download PDFInfo
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- XURCIPRUUASYLR-UHFFFAOYSA-N Omeprazole sulfide Chemical compound N=1C2=CC(OC)=CC=C2NC=1SCC1=NC=C(C)C(OC)=C1C XURCIPRUUASYLR-UHFFFAOYSA-N 0.000 claims description 4
- 239000011241 protective layer Substances 0.000 claims description 4
- 229910016553 CuOx Inorganic materials 0.000 claims description 3
- ZOIORXHNWRGPMV-UHFFFAOYSA-N acetic acid;zinc Chemical compound [Zn].CC(O)=O.CC(O)=O ZOIORXHNWRGPMV-UHFFFAOYSA-N 0.000 claims description 3
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- 238000009413 insulation Methods 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
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- 238000000231 atomic layer deposition Methods 0.000 description 1
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- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- UVLYPUPIDJLUCM-UHFFFAOYSA-N indium;hydrate Chemical compound O.[In] UVLYPUPIDJLUCM-UHFFFAOYSA-N 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
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- FGIUAXJPYTZDNR-UHFFFAOYSA-N potassium nitrate Chemical compound [K+].[O-][N+]([O-])=O FGIUAXJPYTZDNR-UHFFFAOYSA-N 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
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- H01L27/1259—Multistep manufacturing methods
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
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- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1237—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a different composition, shape, layout or thickness of the gate insulator in different devices
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- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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Abstract
本申请实施方式所提供的薄膜晶体管基板的制备方法及其制备的薄膜晶体管基板,包括:提供一基板层,在所述基板层上形成栅极层,采用第一溶液在所述基板层和栅极层上形成绝缘层,采用第二溶液在所述绝缘层上形成沟道层,在所述绝缘层上形成源漏极层,以使得采用溶液法形成绝缘层和沟道层,避免了对高真空设备的使用,从而减少了生产成本。
Description
技术领域
本申请涉及显示领域,具体涉及一种薄膜晶体管基板的制备方法及其制备的薄膜晶体管基板。
背景技术
在现有技术中,采用物理气相沉积、化学气相沉积和原子层沉积等方法在基板上形成薄膜晶体管,但是,这些方法均需要高真空条件,因此,采用这些方法对设备的要求较高,从而导致生产成本高。
发明内容
本申请提供一种薄膜晶体管基板的制备方法及其制备的薄膜晶体管基板,以降低生产成本。
一种薄膜晶体管基板的制备方法,包括:
提供一基板层;
在所述基板层上设置一第一金属层,蚀刻所述第一金属层形成栅极层;
在所述基板层和所述栅极层上设置一绝缘层,其中,包括:
提供一第一溶液;
将所述第一溶液涂布于所述基板层和所述栅极层上形成第一溶液层,所述基板层、栅极层和第一溶液层形成第一半成品;以及
对所述第一半成品进行第一次热处理,所述第一溶液层形成所述绝缘层;
在所述绝缘层上设置一沟道层,其中,包括;
提供一第二溶液;
将所述第二溶液涂布于所述绝缘层上形成第二溶液层,所述基板层、栅极层、绝缘层和第二溶液层形成第二半成品;
对所述第二半成品进行第二次热处理,所述第二溶液层形成一沟道形成层;以及
对所述沟道形成层进行蚀刻形成所述沟道层;以及
在所述沟道层和所述绝缘层上设置一第二金属层,蚀刻所述第二金属层形成源漏极层。
在所述薄膜晶体管基板的制备方法中,在所述提供一第一溶液中,包括:
提供HfCl4粉末和Al(NO3)3·9H2O粉末;
将所述HfCl4粉末和Al(NO3)3·9H2O粉末溶解于乙二醇甲醚中,形成HfAlOx溶液。
在所述薄膜晶体管基板的制备方法中,所述HfCl4粉末和Al(NO3)3·9H2O粉末的摩尔比为1.5:1-2.5:1。
在所述薄膜晶体管基板的制备方法中,所述HfAlOx溶液的浓度为0.1mol/L-1.5mol/L。
在所述薄膜晶体管基板的制备方法中,在所述提供一第二溶液中,包括:
提供硝酸铟(In(NO3)3)水合物粉末和二水乙酸锌(C4H6O4Zn·2H2O)粉末;
将所述硝酸铟水合物粉末和二水乙酸锌粉末溶解于乙二醇甲醚中,形成InZnOx溶液。
在所述薄膜晶体管基板的制备方法中,所述硝酸铟水合物粉末和二水乙酸锌粉末的摩尔比为0.5:1-2:1。
在所述薄膜晶体管基板的制备方法中,所述InZnOx溶液的浓度为0.1mol/L-1.5mol/L。
在所述薄膜晶体管基板的制备方法中,在所述提供一基板层中,包括:
提供一承载基板;
在所述承载基板上设置一柔性基板层;
在所述柔性基板层上设置一缓冲层;以及
在所述缓冲层上设置一阻挡层。
在所述薄膜晶体管基板的制备方法中,在所述沟道层和所述绝缘层上设置一第二金属层,蚀刻所述第二金属层形成源漏极层之后,还包括:
在所述沟道层上设置一保护层。
一种薄膜晶体管基板,包括:
一基板层;
一栅极层,所述栅极层设置于所述基板层上,所述栅极层包括若干栅极;
一绝缘层,所述绝缘层覆盖所述栅极层和所述基板层,所述绝缘层为HfAlOx、HfSiOx和HfSiOxNy中的一种或其中几种的组合;
一沟道层,所述沟道层设置于所述绝缘层上,所述沟道层包括若干沟道结构,每一沟道结构位于与其对应的栅极之上,所述沟道层为InZnOx、HfInZnOx和InZnOx/CuOx中的一种或其中几种的组合;
一源漏极层,所述源漏极层设置于所述绝缘层上,所述源漏极层包括若干源极和漏极,每一源极设置在其所对应的沟道结构的一侧,每一漏极设置在其所对应的沟道结构的另一侧。
本申请实施方式所提供的薄膜晶体管基板的制备方法及其制备的薄膜晶体管基板,包括:提供一基板层,在所述基板层上形成栅极层,采用第一溶液在所述基板层和栅极层上形成绝缘层,采用第二溶液在所述绝缘层上形成沟道层,在所述绝缘层上形成源漏极层,以使得采用溶液法形成绝缘层和沟道层,避免了对高真空设备的使用,从而减少了生产成本。
附图说明
为了更清楚地说明本申请中的技术方案,下面将对实施方式描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施方式,对于本领域技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本申请提供的薄膜晶体管基板的制备方法的流程示意图。
图2为本申请提供的薄膜晶体管基板的制备方法中的基板层的结构示意图。
图3为本申请提供的薄膜晶体管基板的制备方法中的基板层和第一金属层的结构示意图。
图4为本申请提供的薄膜晶体管基板的制备方法中的基板层和栅极层的结构示意图。
图5为本申请提供的薄膜晶体管基板的制备方法中的第一半成品的结构示意图。
图6为本申请提供的薄膜晶体管基板的制备方法中的基板层、栅极层和绝缘层的结构示意图。
图7为本申请提供的薄膜晶体管基板的制备方法中的第二半成品的结构示意图。
图8为本申请提供的薄膜晶体管基板的制备方法中的基板层、栅极层、绝缘层和沟道形成层的结构示意图。
图9为本申请提供的薄膜晶体管基板的制备方法中的基板层、栅极层、绝缘层和沟道层的结构示意图。
图10为本申请提供的薄膜晶体管基板的制备方法中的基板层、栅极层、绝缘层、沟道层和第二金属层的结构示意图。
图11为本申请提供的薄膜晶体管基板的制备方法所制备的薄膜晶体管基板的第一种实施方式的结构示意图。
图12为本申请提供的薄膜晶体管基板的制备方法所制备的薄膜晶体管基板的第二种实施方式的结构示意图。
具体实施方式
下面将结合本申请实施方式中的附图,对本申请中的技术方案进行清楚、完整地描述。显然,所描述的实施方式仅仅是本申请一部分实施方式,而不是全部的实施方式。基于本申请中的实施方式,本领域技术人员在没有做出创造性劳动前提下所获得的所有其他实施方式,都属于本申请保护的范围。
请参阅图1,图1为本申请提供的薄膜晶体管基板的制备方法的流程示意图。所述薄膜晶体管基板的制备方法包括:
101:请参阅图2,提供一基板层10。
所述基板层10可以包括承载基板11、柔性基板层12、缓冲层13和阻挡层14。
所述承载基板11可为玻璃基板、塑料基板、氧化铝基板等。所述柔性基板层12可以采用聚酰亚胺。所述缓冲层13可以采用氧化硅。所述阻挡层14可以采用氮化硅。所述缓冲层13和所述阻挡层14不仅可以保护柔性基板层12,还可以阻挡承载基板11中的杂质离子穿过所述柔性基板层12而影响后续的层结构。
在一种实施方式中,可以先提供所述承载基板11,然后,在所述承载基板11上设置所述柔性基板层12,随后,在所述柔性基板层12上设置所述缓冲层13,最后,在所述缓冲层13上设置所述阻挡层14。
102:请参阅图3-4,在所述基板层10上设置一第一金属层20a,蚀刻所述第一金属层20a形成栅极层20。
在一种实施方式中,所述第一金属层20a可以采用铜。所述栅极层20包括若干栅极21。
103:请参阅图5-6,在所述基板层10和所述栅极层20上设置一绝缘层31。
在一种实施方式中,在所述基板层10和所述栅极层20上设置一绝缘层31中,可以包括:
1031:提供一第一溶液;
1032:请参阅图5,将所述第一溶液涂布于所述基板层10和所述栅极层20上形成第一溶液层30a,所述基板层10、栅极层20和第一溶液层30a形成第一半成品30;以及
1033:请参阅图6,对所述第一半成品30进行第一次热处理,所述第一溶液层30a形成所述绝缘层31。
所述绝缘层31可以为HfAlOx、HfSiOx或者HfSiOxNy等。
在一种实施方式中,所述第一溶液可以为HfAlOx溶液。在配置HfAlOx溶液的过程中,可以先提供HfCl4粉末和Al(NO3)3·9H2O粉末,然后,将所述HfCl4粉末和Al(NO3)3·9H2O粉末溶解于乙二醇甲醚中,形成HfAlOx溶液。所述HfCl4粉末和Al(NO3)3·9H2O粉末的摩尔比为1.5:1-2.5:1。在一种实施方式中,所述HfCl4粉末和Al(NO3)3·9H2O粉末的摩尔比可以为1.8:1、2:1、2.2:1或者2.4:1等。所述HfAlOx溶液的浓度为0.1mol/L-1.5mol/L。在一种实施方式中,所述HfAlOx溶液的浓度可以为0.2mol/L、0.35mol/L、0.6mol/L、1.2mol/L或者1.35mol/L等。
104:请参阅图7-9,在所述绝缘层31上设置一沟道层42。
在一种实施方式中,在所述绝缘层31上设置一沟道层42中,可以包括:
1041:提供一第二溶液;
1042:请参阅图7,将所述第二溶液涂布于所述绝缘层31上形成第二溶液层40a,所述基板层10、栅极层20、绝缘层31和第二溶液层40a形成第二半成品40;
1043:请参阅图8,对所述第二半成品40进行第二次热处理,所述第二溶液层40a形成一沟道形成层41;以及
1044:请参阅图9,对所述沟道形成层41进行蚀刻形成所述沟道层42。
所述沟道层42可以为InZnOx、HfInZnOx或者InZnOx/CuOx等。
所述沟道层42可以包括若干沟道结构421。每一所述沟道结构421位于于其所对应的栅极21上。
在一种实施方式中,所述第二溶液可以为InZnOx溶液。在配置InZnOx溶液的过程中,可以先提供硝酸铟(In(NO3)3)水合物粉末和二水乙酸锌(C4H6O4Zn·2H2O)粉末,然后,将所述硝酸铟水合物粉末和二水乙酸锌粉末溶解于乙二醇甲醚中,形成InZnOx溶液。所述硝酸铟水合物粉末和二水乙酸锌粉末的摩尔比为0.5:1-2:1。在一种实施方式中,所述硝酸铟水合物粉末和二水乙酸锌粉末的摩尔比可以为0.6:1、0.9:1、1.5:1或者1.7:1等。所述InZnOx溶液的浓度为0.1mol/L-1.5mol/L。在一种实施方式中,所述InZnOx溶液的浓度可以为0.2mol/L、0.5mol/L、0.8mol/L或者1.2mol/L等。
105:请参阅图10-11,在所述沟道层42和所述绝缘层31上设置一第二金属层50a,蚀刻所述第二金属层50a形成源漏极层50。
所述源漏极层50可以包括若干源极51和若干漏极52。每一所述沟道结构421的一侧设置有一个所述源极51,每一所述沟道结构421的另一侧设置有一个所述漏极52。
在一种实施方式中,请参阅图12,在所述沟道层42上还可以设置保护层60。所述保护层60可以保护沟道层42被污染或氧化。
请参阅图11,本申请还提供一种薄膜晶体管基板100。所述薄膜晶体管基板100包括基板层10、栅极层20、绝缘层31、沟道层42和源漏极层50。
所述栅极层20设置于所述基板层10上。所述栅极层20包括若干栅极21。所述绝缘层31覆盖所述栅极层20和所述基板层10。所述沟道层42设置于所述绝缘层31上。所述沟道层42包括若干沟道结构421。每一沟道结构421位于与其对应的栅极21之上。所述源漏极层50设置于所述绝缘层31上。所述源漏极层50包括若干源极51和漏极52。每一源极51设置在其所对应的沟道结构421的一侧,每一漏极52设置在其所对应的沟道结构421的另一侧。
在一种实施方式中,请参阅图12,在所述沟道层42上还可以设置保护层60。所述保护层60可以保护沟道层42被污染或氧化。
以上对本申请实施方式提供了详细介绍,本文中应用了具体个例对本申请的原理及实施方式进行了阐述,以上实施方式的说明只是用于帮助理解本申请。同时,对于本领域的技术人员,依据本申请的思想,在具体实施方式及应用范围上均会有改变之处,综上所述,本说明书内容不应理解为对本申请的限制。
Claims (10)
1.一种薄膜晶体管基板的制备方法,其特征在于,包括:
提供一基板层;
在所述基板层上设置一第一金属层,蚀刻所述第一金属层形成栅极层;
在所述基板层和所述栅极层上设置一绝缘层,其中,包括:
提供一第一溶液;
将所述第一溶液涂布于所述基板层和所述栅极层上形成第一溶液层,所述基板层、栅极层和第一溶液层形成第一半成品;以及
对所述第一半成品进行第一次热处理,所述第一溶液层形成所述绝缘层;
在所述绝缘层上设置一沟道层,其中,包括;
提供一第二溶液;
将所述第二溶液涂布于所述绝缘层上形成第二溶液层,所述基板层、栅极层、绝缘层和第二溶液层形成第二半成品;
对所述第二半成品进行第二次热处理,所述第二溶液层形成一沟道形成层;以及
对所述沟道形成层进行蚀刻形成所述沟道层;以及
在所述沟道层和所述绝缘层上设置一第二金属层,蚀刻所述第二金属层形成源漏极层。
2.如权利要求1所述的薄膜晶体管基板的制备方法,其特征在于,在所述提供一第一溶液中,包括:
提供HfCl4粉末和Al(NO3)3·9H2O粉末;
将所述HfCl4粉末和Al(NO3)3·9H2O粉末溶解于乙二醇甲醚中,形成HfAlOx溶液。
3.如权利要求2所述的薄膜晶体管基板的制备方法,其特征在于,所述HfCl4粉末和Al(NO3)3·9H2O粉末的摩尔比为1.5:1-2.5:1。
4.如权利要求3所述的薄膜晶体管基板的制备方法,其特征在于,所述HfAlOx溶液的浓度为0.1mol/L-1.5mol/L。
5.如权利要求1所述的薄膜晶体管基板的制备方法,其特征在于,在所述提供一第二溶液中,包括:
提供硝酸铟(In(NO3)3)水合物粉末和二水乙酸锌(C4H6O4Zn·2H2O)粉末;
将所述硝酸铟水合物粉末和二水乙酸锌粉末溶解于乙二醇甲醚中,形成InZnOx溶液。
6.如权利要求5所述的薄膜晶体管基板的制备方法,其特征在于,所述硝酸铟水合物粉末和二水乙酸锌粉末的摩尔比为0.5:1-2:1。
7.如权利要求6所述的薄膜晶体管基板的制备方法,其特征在于,所述InZnOx溶液的浓度为0.1mol/L-1.5mol/L。
8.如权利要求1所述的薄膜晶体管基板的制备方法,其特征在于,在所述提供一基板层中,包括:
提供一承载基板;
在所述承载基板上设置一柔性基板层;
在所述柔性基板层上设置一缓冲层;以及
在所述缓冲层上设置一阻挡层。
9.如权利要求1所述的薄膜晶体管基板的制备方法,其特征在于,在所述沟道层和所述绝缘层上设置一第二金属层,蚀刻所述第二金属层形成源漏极层之后,还包括:
在所述沟道层上设置一保护层。
10.一种薄膜晶体管基板,其特征在于,包括:
一基板层;
一栅极层,所述栅极层设置于所述基板层上,所述栅极层包括若干栅极;
一绝缘层,所述绝缘层覆盖所述栅极层和所述基板层,所述绝缘层为HfAlOx、HfSiOx和HfSiOxNy中的一种或其中几种的组合;
一沟道层,所述沟道层设置于所述绝缘层上,所述沟道层包括若干沟道结构,每一沟道结构位于与其对应的栅极之上,所述沟道层为InZnOx、HfInZnOx和InZnOx/CuOx中的一种或其中几种的组合;
一源漏极层,所述源漏极层设置于所述绝缘层上,所述源漏极层包括若干源极和漏极,每一源极设置在其所对应的沟道结构的一侧,每一漏极设置在其所对应的沟道结构的另一侧。
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100144088A1 (en) * | 2008-12-05 | 2010-06-10 | Electronics And Telecommunications Research Institute | Method for forming metal oxide and method for forming transistor structure with the same |
CN105609422A (zh) * | 2016-03-04 | 2016-05-25 | 京东方科技集团股份有限公司 | 一种薄膜晶体管及其制作方法、阵列基板和显示装置 |
CN106653575A (zh) * | 2017-01-06 | 2017-05-10 | 华南理工大学 | 低温制备氧化物薄膜的前驱体溶液及所制备的薄膜、薄膜晶体管 |
CN107256868A (zh) * | 2011-01-12 | 2017-10-17 | 株式会社半导体能源研究所 | 显示器件 |
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100144088A1 (en) * | 2008-12-05 | 2010-06-10 | Electronics And Telecommunications Research Institute | Method for forming metal oxide and method for forming transistor structure with the same |
CN107256868A (zh) * | 2011-01-12 | 2017-10-17 | 株式会社半导体能源研究所 | 显示器件 |
CN105609422A (zh) * | 2016-03-04 | 2016-05-25 | 京东方科技集团股份有限公司 | 一种薄膜晶体管及其制作方法、阵列基板和显示装置 |
CN106653575A (zh) * | 2017-01-06 | 2017-05-10 | 华南理工大学 | 低温制备氧化物薄膜的前驱体溶液及所制备的薄膜、薄膜晶体管 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110364439A (zh) * | 2019-06-11 | 2019-10-22 | 惠科股份有限公司 | 薄膜晶体管及其制备方法 |
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