CN109545693A - 一种半导体倒装结构及其制备方法 - Google Patents
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- 239000000654 additive Substances 0.000 claims description 4
- 230000000996 additive effect Effects 0.000 claims description 4
- 239000003795 chemical substances by application Substances 0.000 claims description 4
- 239000003822 epoxy resin Substances 0.000 claims description 4
- 239000004519 grease Substances 0.000 claims description 4
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- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 4
- 239000000155 melt Substances 0.000 claims description 4
- 229910052751 metal Inorganic materials 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- 229920000647 polyepoxide Polymers 0.000 claims description 4
- 239000000377 silicon dioxide Substances 0.000 claims description 4
- 238000005476 soldering Methods 0.000 claims description 4
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- 239000004411 aluminium Substances 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical group [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
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- 229910052802 copper Inorganic materials 0.000 claims description 3
- 239000010949 copper Substances 0.000 claims description 3
- 239000011368 organic material Substances 0.000 claims description 3
- 239000004744 fabric Substances 0.000 claims description 2
- 238000000034 method Methods 0.000 abstract description 12
- 238000005538 encapsulation Methods 0.000 abstract description 9
- 238000004519 manufacturing process Methods 0.000 abstract description 7
- 229920005989 resin Polymers 0.000 abstract description 4
- 239000011347 resin Substances 0.000 abstract description 4
- 238000004806 packaging method and process Methods 0.000 abstract description 3
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- 230000005855 radiation Effects 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000002689 soil Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000004100 electronic packaging Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- JEIPFZHSYJVQDO-UHFFFAOYSA-N iron(III) oxide Inorganic materials O=[Fe]O[Fe]=O JEIPFZHSYJVQDO-UHFFFAOYSA-N 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
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Abstract
本申请公开了一种半导体倒装结构及其制备方法,包括基板和盖板封体;在基板的功能面触点处排布导电柱,在基板上倒装芯片,使芯片的焊料凸点支撑在导电柱的顶部,散热板通过界面导热材料安装在芯片背面,盖板封体焊接在基板上,芯片和基板之间填充流动胶。采用在芯片底部添加树脂的方法,使芯片、有机基板、焊料三者的热膨胀系数(CTE)得到了匹配,增强了封装的可靠性,可使封装成本和体积得到显著降低,同时具有大批量生产的优点,可以广泛应用于多种器件的封装制造中,具有较好的市场前景。
Description
技术领域
本发明属于半导体封装技术领域,尤其涉及一种半导体倒装结构及其制备方法。
背景技术
目前三种主要用于集成电路(IC)芯片封装的互连技术分别为:引线键合技术(WB)、载带自动键合技术(TAB)、倒装芯片技术(FC)。WB与TAB的芯片焊盘限制在芯片四周,因此I/O数比较低,而FC可以将整个的芯片面积用来与基板互连,极大地提高了I/O数。随着高性能集成电路的发展,I/O数迅速增加,与WB与TAB相比,FC表现出了许多优越性:高的I/O密度、短的互连线、互连过程中的自对准、好的散热性、高的生产率,FC这些优点使它成为现代电子封装中最具吸引力的技术之一,广泛应用于高频率通信、高性能计算机及手提电子等产品中。
器件的小型化高密度封装形式越来越多,如多模块封装(MCM)、系统封装(SiP)、倒装芯片(FC,Flip-Chip)等应用得越来越多。这些技术的出现更加模糊了一级封装与二级装配之间的界线。毋庸置疑,随着小型化高密度封装的出现,对高速与高精度装配的要求变得更加关键,相关的组装设备和工艺也更具先进性与高灵活性。
由于倒装芯片比BGA或CSP具有更小的外形尺寸、更小的球径和球间距、它对植球工艺、基板技术、材料的兼容性、制造工艺,以及检查设备和方法提出了前所未有的挑战。
发明内容
本发明的目的是提供一种半导体倒装结构及其制备方法,采用在芯片底部添加树脂的方法,使芯片、有机基板、焊料三者的热膨胀系数(CTE)得到了匹配,增强了封装的可靠性,可使封装成本和体积得到显著降低,同时具有大批量生产的优点,可以广泛应用于多种器件的封装制造中,具有较好的市场前景。
本发明是这样实现的:
一种半导体倒装结构,包括基板和盖板封体;在基板的功能面触点处排布导电柱,在基板上倒装芯片,使芯片的焊料凸点支撑在导电柱的顶部,散热板通过界面导热材料安装在芯片背面,盖板封体焊接在基板上,芯片和基板之间填充流动胶。
作为优选方案,所述基板采用有机材料,由有机树脂做粘合剂、玻璃纤维布做增强材料,采用传统的工艺法所制成。基板的作用是搭载和固定裸芯片,同时兼有绝缘,导热,隔离及保护作用,它是芯片内外电路连接的桥梁。
作为优选方案,所述流动胶采用环氧树脂、球型氧化硅、固化剂促进剂和添加剂中的任一种。它除了能降低硅芯片、有机基板和焊球之间因CTE不匹配而产生的应力和形变这一重要作用外,还可以增强倒装芯片的结构性能,防止芯片吸潮、离子污染、辐射以及其他不利的工作环境。
作为优选方案,所述散热板为铝或铜。
作为优选方案,所述界面导热材料为金属类铟、导热脂、导热胶、导热粘性模、相变导热材料、导热垫和导热双面胶中的任一种。
所述的半导体倒装结构,其制备方法包括以下步骤:
(1)在基板的功能面触点处排布导电柱,在基板上倒装芯片,使芯片的焊料凸点支撑在导电柱的顶部,对所述焊料凸点进行回流焊,使所述焊料凸点融化并至少包覆所述导电柱的顶部;
(2)芯片和基板之间填充流动胶;
(3)散热板通过界面导热材料安装在芯片背面;
(4)将盖板封体焊接在基板上。
本申请的优点如下:
1、流动胶采用环氧树脂、球型氧化硅、固化剂促进剂和添加剂中的任一种,它除了能降低硅芯片、有机基板和焊球之间因CTE不匹配而产生的应力和形变这一重要作用外,还可以增强倒装芯片的结构性能,防止芯片吸潮、离子污染、辐射以及其他不利的工作环境;
2、通过在基板上设置导电柱,使得在回流焊接的过程中,焊料凸点融化并沿着导电柱流动,并至少包覆导电柱的顶部,导电柱对芯片具有一定的支撑作用,防止焊料凸点回流后易塌陷溢出形成短路的问题,同时,有效地提高了倒装封装结构的稳定;
3、采用在芯片底部添加树脂的方法,使芯片、有机基板、焊料三者的热膨胀系数(CTE)得到了匹配,增强了封装的可靠性。
4、界面导热材料采用金属类铟、导热脂、导热胶、导热粘性模、相变导热材料、导热垫和导热双面胶,有助于散热;
5、盖板封体是由树脂和填充料组成的复合材料,它可以起到保护芯片和其它敏感元器件的作用,提高使用过程中抵抗外界环境的影响。
6、本申请可使封装成本和体积得到显著降低,同时具有大批量生产的优点,可以广泛应用于多种器件的封装制造中,具有较好的市场前景。
附图说明
图1是本申请的结构示意图;
图中:1基板、2盖板封体、3散热板、4芯片、5焊料凸点、6、导电柱。
具体实施方式
以下结合附图对本申请半导体倒装结构及其制备方法作进一步的说明。
如图1所示,一种半导体倒装结构,包括基板和盖板封体;在基板的功能面触点处排布导电柱,在基板上倒装芯片,使芯片的焊料凸点支撑在导电柱的顶部,散热板通过界面导热材料安装在芯片背面,盖板封体焊接在基板上,芯片和基板之间填充流动胶。
基板采用有机材料。
流动胶采用环氧树脂、球型氧化硅、固化剂促进剂和添加剂中的任一种。它除了能降低硅芯片、有机基板和焊球之间因CTE不匹配而产生的应力和形变这一重要作用外,还可以增强倒装芯片的结构性能,防止芯片吸潮、离子污染、辐射以及其他不利的工作环境。
散热板为铝或铜。
界面导热材料为金属类铟、导热脂、导热胶、导热粘性模、相变导热材料、导热垫和导热双面胶中的任一种。
半导体倒装结构的制备方法包括以下步骤:
(1)在基板的功能面触点处排布导电柱,在基板上倒装芯片,使芯片的焊料凸点支撑在导电柱的顶部,对所述焊料凸点进行回流焊,使所述焊料凸点融化并至少包覆所述导电柱的顶部;
(2)芯片和基板之间填充流动胶;
(3)散热板通过界面导热材料安装在芯片背面;
(4)将盖板封体焊接在基板上。
尽管本发明的实施方案已公开如上,但其并不仅仅限于说明书和实施方式中所列运用,它完全可以被适用于各种适合本发明的领域,对于熟悉本领域的人员而言,可容易地实现另外的修改,因此在不背离权利要求及等同范围所限定的一般概念下,本发明并不限于特定的细节和这里示出与描述的图例。
Claims (6)
1.一种半导体倒装结构,其特征在于,包括基板和盖板封体;在基板的功能面触点处排布导电柱,在基板上倒装芯片,使芯片的焊料凸点支撑在导电柱的顶部,散热板通过界面导热材料安装在芯片背面,盖板封体焊接在基板上,芯片和基板之间填充流动胶。
2.根据权利要求1所述的半导体倒装结构,其特征在于,所述基板采用有机材料。
3.根据权利要求1所述的半导体倒装结构,其特征在于,所述流动胶采用环氧树脂 、球型氧化硅 、固化剂促进剂和添加剂中的任一种。
4.根据权利要求1所述的半导体倒装结构,其特征在于,所述散热板为铝或铜。
5.根据权利要求1所述的半导体倒装结构,其特征在于,所述芯界面导热材料为金属类铟、导热脂、导热胶、导热粘性模、相变导热材料、导热垫和导热双面胶中的任一种。
6.根据权利要求1所述的半导体倒装结构,其特征在于,其制备方法包括以下步骤:
(1)在基板的功能面触点处排布导电柱,在基板上倒装芯片,使芯片的焊料凸点支撑在导电柱的顶部,对所述焊料凸点进行回流焊,使所述焊料凸点融化并至少包覆所述导电柱的顶部;
(2)芯片和基板之间填充流动胶;
(3)散热板通过界面导热材料安装在芯片背面;
(4)将盖板封体焊接在基板上。
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CN101026100A (zh) * | 2006-02-22 | 2007-08-29 | 联华电子股份有限公司 | 倒装芯片封装结构及其形成方法 |
CN104201120A (zh) * | 2014-08-28 | 2014-12-10 | 南通富士通微电子股份有限公司 | 半导体倒装封装方法 |
CN108281389A (zh) * | 2017-12-29 | 2018-07-13 | 苏州通富超威半导体有限公司 | 一种散热性佳的芯片组件及其制备方法 |
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CN101026100A (zh) * | 2006-02-22 | 2007-08-29 | 联华电子股份有限公司 | 倒装芯片封装结构及其形成方法 |
CN104201120A (zh) * | 2014-08-28 | 2014-12-10 | 南通富士通微电子股份有限公司 | 半导体倒装封装方法 |
CN108281389A (zh) * | 2017-12-29 | 2018-07-13 | 苏州通富超威半导体有限公司 | 一种散热性佳的芯片组件及其制备方法 |
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