CN109509705B - Low barrier height Schottky diode and method of making the same - Google Patents
Low barrier height Schottky diode and method of making the same Download PDFInfo
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- 230000004888 barrier function Effects 0.000 title claims abstract description 44
- 238000004519 manufacturing process Methods 0.000 title description 5
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- 239000002184 metal Substances 0.000 claims abstract description 124
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 claims abstract description 83
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 54
- 229910021389 graphene Inorganic materials 0.000 claims abstract description 54
- 238000000151 deposition Methods 0.000 claims abstract description 7
- 238000002360 preparation method Methods 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims description 24
- 229910052732 germanium Inorganic materials 0.000 claims description 18
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 18
- 238000003682 fluorination reaction Methods 0.000 claims description 14
- 239000010936 titanium Substances 0.000 claims description 14
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 12
- 239000010931 gold Substances 0.000 claims description 12
- 229910052719 titanium Inorganic materials 0.000 claims description 12
- 229910052737 gold Inorganic materials 0.000 claims description 10
- 238000005530 etching Methods 0.000 claims description 7
- 229910018503 SF6 Inorganic materials 0.000 claims description 4
- 238000011065 in-situ storage Methods 0.000 claims description 4
- 238000009616 inductively coupled plasma Methods 0.000 claims description 4
- SFZCNBIFKDRMGX-UHFFFAOYSA-N sulfur hexafluoride Chemical compound FS(F)(F)(F)(F)F SFZCNBIFKDRMGX-UHFFFAOYSA-N 0.000 claims description 4
- 229960000909 sulfur hexafluoride Drugs 0.000 claims description 4
- 238000005229 chemical vapour deposition Methods 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 19
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- 238000010586 diagram Methods 0.000 description 8
- 239000004065 semiconductor Substances 0.000 description 8
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- 229910052802 copper Inorganic materials 0.000 description 2
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- 238000012986 modification Methods 0.000 description 2
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- 230000007935 neutral effect Effects 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 238000005036 potential barrier Methods 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 description 1
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
- H10D8/60—Schottky-barrier diodes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
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- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
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- H10D8/051—Manufacture or treatment of Schottky diodes
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Abstract
本发明提供一种低势垒高度肖特基二极管及其制备方法,包括如下步骤:1)提供一基底;2)于基底的表面形成石墨烯薄膜;3)对石墨烯薄膜进行氟化处理以形成氟化石墨烯绝缘层;4)于氟化石墨烯绝缘层表面沉积金属电极;5)去除肖特基结所在区域之外的氟化石墨烯绝缘层;6)于裸露的基底表面形成欧姆接触电极。本发明利用氟化石墨烯绝缘层作为金属电极与基底之间的插层,氟化石墨烯绝缘层不会在基底中产生MIGS钉扎效应;氟化石墨烯绝缘层可以阻挡金属电极与基底之间的互相扩散,可以形成均匀性极高的肖特基结面;可以大大降低金属电极对基底的费米能级钉扎效应,从而降低肖特基二极管中基底与金属电极之间形成的肖特基结势垒高度。
The present invention provides a low barrier height Schottky diode and a preparation method thereof, comprising the following steps: 1) providing a substrate; 2) forming a graphene film on the surface of the substrate; 3) fluorinating the graphene film to 4) depositing a metal electrode on the surface of the fluorinated graphene insulating layer; 5) removing the fluorinated graphene insulating layer outside the area where the Schottky junction is located; 6) forming an ohmic layer on the exposed substrate surface contact electrodes. The invention utilizes the fluorinated graphene insulating layer as the intercalation layer between the metal electrode and the substrate, and the fluorinated graphene insulating layer does not produce MIGS pinning effect in the substrate; the fluorinated graphene insulating layer can block the connection between the metal electrode and the substrate. The mutual diffusion between the two can form a highly uniform Schottky junction; it can greatly reduce the Fermi level pinning effect of the metal electrode to the substrate, thereby reducing the Schottky diode formed between the substrate and the metal electrode. Turkey junction barrier height.
Description
技术领域technical field
本发明属于半导体技术领域,特别是涉及一种低势垒高度肖特基二极管及其制备方法。The invention belongs to the technical field of semiconductors, and in particular relates to a Schottky diode with a low potential barrier height and a preparation method thereof.
背景技术Background technique
随着半导体产业的飞速发展,寻找新材料替代传统硅基材料已经成为普遍的趋势。目前,锗因其极高的载流子迁移率,且与半导体工艺兼容,被认为是最具潜力的半导体材料。肖特基势垒二极管(SBD)由于其技术的重要性,在材料、器件物理、设计和应用方面已有数十年的广泛研究。众所周知,SBD的性能和可靠性受到沉积金属和半导体表面之间的界面质量的极大影响。金属-半导体(M-S)结构中的电流控制的主要参数是半导体的掺杂浓度Nd和M-S结构界面处的肖特基势垒高度(SBH)。SBH值取决于金属的功函数。对于Ge(锗),电荷中性能级(CNL)正好在价带之上,导致金属费米能级钉扎。虽然钉扎原因还没有完全理解,主要认为是金属诱导的间隙状态(MIGS)的作用,也就是金属中的自由电子波函数进入半导体带隙诱导间隙受主或施主样状态。费米能级钉扎的存在,使得肖特基二极管的势垒高度显著增加,肖特基二极管的势垒高度与金属功函数相对独立,从而影响肖特基二极管的性能。With the rapid development of the semiconductor industry, it has become a common trend to find new materials to replace traditional silicon-based materials. Currently, germanium is considered to be the most promising semiconductor material due to its extremely high carrier mobility and compatibility with semiconductor processes. Schottky barrier diodes (SBDs) have been extensively studied for decades in materials, device physics, design and applications due to their technological importance. It is well known that the performance and reliability of SBDs are greatly affected by the quality of the interface between the deposited metal and the semiconductor surface. The main parameters for current control in metal-semiconductor (M-S) structures are the doping concentration Nd of the semiconductor and the Schottky barrier height (SBH) at the interface of the M-S structure. The SBH value depends on the work function of the metal. For Ge (germanium), the charge neutrality level (CNL) is just above the valence band, resulting in metal Fermi level pinning. Although the reason for pinning is not fully understood, it is mainly believed to be the effect of metal-induced gap states (MIGS), that is, the free electron wavefunction in the metal enters the semiconductor band gap-induced gap acceptor or donor-like state. The existence of Fermi level pinning significantly increases the barrier height of Schottky diodes, and the barrier height of Schottky diodes is relatively independent of the metal work function, thus affecting the performance of Schottky diodes.
发明内容SUMMARY OF THE INVENTION
鉴于以上所述现有技术的缺点,本发明的目的在于提供一种低势垒高度肖特基二极管及其制备方法用于解决现有技术中的肖特基二极管存在金属费米能级钉扎效应,从而使得肖特基二极管的势垒高度较高,进而影响肖特基二极管的性能的问题。In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a low barrier height Schottky diode and a preparation method thereof to solve the problem of metal Fermi level pinning in the Schottky diode in the prior art Therefore, the potential barrier height of the Schottky diode is higher, which in turn affects the performance of the Schottky diode.
为实现上述目的及其他相关目的,本发明提供一种低势垒高度肖特基二极管的制备方法,所述低势垒高度肖特基二极管的制备方法包括如下步骤:In order to achieve the above object and other related purposes, the present invention provides a method for preparing a Schottky diode with a low barrier height, and the method for preparing a Schottky diode with a low barrier height includes the following steps:
1)提供一基底;1) provide a base;
2)于所述基底的表面形成石墨烯薄膜;2) forming a graphene film on the surface of the substrate;
3)对所述石墨烯薄膜进行氟化处理以形成氟化石墨烯绝缘层;3) fluorinating the graphene film to form a fluorinated graphene insulating layer;
4)于所述氟化石墨烯绝缘层表面沉积金属电极,以于所述金属电极与所述基底之间形成肖特基结;4) depositing a metal electrode on the surface of the fluorinated graphene insulating layer to form a Schottky junction between the metal electrode and the substrate;
5)去除所述肖特基结所在区域之外的所述氟化石墨烯绝缘层,并裸露出所述基底;5) removing the fluorinated graphene insulating layer outside the area where the Schottky junction is located, and exposing the substrate;
6)于裸露的所述基底表面形成欧姆接触电极。6) forming an ohmic contact electrode on the exposed surface of the substrate.
可选地,步骤1)中提供的所述基底包括锗基底。Optionally, the substrate provided in step 1) includes a germanium substrate.
可选地,所述锗基底包括N型锗基底。Optionally, the germanium substrate includes an N-type germanium substrate.
可选地,步骤2)中,采用化学气相沉积法于所述基底的表面原位生长所述石墨烯薄膜。Optionally, in step 2), the graphene film is grown in situ on the surface of the substrate by chemical vapor deposition.
可选地,步骤3)中,采用六氟化硫气体对所述石墨烯薄膜进行等离子体氟化处理,以使得所述石墨烯薄膜全部转换为氟化石墨烯绝缘层。Optionally, in step 3), sulfur hexafluoride gas is used to perform plasma fluorination treatment on the graphene film, so that all the graphene film is converted into a fluorinated graphene insulating layer.
可选地,步骤5)中,采用电感耦合等离子体刻蚀工艺去除所述肖特基结所在区域之外的所述氟化石墨烯绝缘层。Optionally, in step 5), an inductively coupled plasma etching process is used to remove the fluorinated graphene insulating layer outside the region where the Schottky junction is located.
本发明还提供一种低势垒高度肖特基二极管,所述低势垒高度肖特基二极管包括:The present invention also provides a low barrier height Schottky diode, the low barrier height Schottky diode includes:
基底;base;
金属电极,位于所述基底上,以于所述金属电极与所述基底之间形成肖特基结;a metal electrode, located on the substrate, to form a Schottky junction between the metal electrode and the substrate;
氟化石墨烯绝缘层,位于所述基底的表面,且位于所述金属电极与所述基底之间;a fluorinated graphene insulating layer, located on the surface of the substrate and between the metal electrode and the substrate;
欧姆接触电极,位于所述氟化石墨烯绝缘层所在区域之外的所述基底的表面。The ohmic contact electrode is located on the surface of the substrate outside the area where the fluorinated graphene insulating layer is located.
可选地,所述基底包括锗基底。Optionally, the substrate comprises a germanium substrate.
可选地,所述锗基底包括N型锗基底。Optionally, the germanium substrate includes an N-type germanium substrate.
可选地,所述金属电极包括钛/金电极。Optionally, the metal electrodes include titanium/gold electrodes.
如上所述,本发明的一种低势垒高度肖特基二极管及其制备方法,具有以下有益效果:As described above, a low barrier height Schottky diode and a preparation method thereof of the present invention have the following beneficial effects:
本发明的低势垒高度肖特基二极管的制备方法通过将石墨烯薄膜进行氟化处理形成氟化石墨烯绝缘层后再形成金属电极,利用氟化石墨烯绝缘层作为金属电极与基底之间的插层,氟化石墨烯绝缘层不会在基底中产生MIGS(金属诱导带隙态)钉扎效应;同时,氟化石墨烯绝缘层可以阻挡金属电极与基底之间的互相扩散,可以形成均匀性极高的肖特基结面;金属电极与基底之间由于氟化石墨烯绝缘层的存在,可以大大降低金属电极对基底的费米能级钉扎效应,从而降低肖特基二极管中基底与金属电极之间形成的肖特基结势垒高度;In the method for preparing a Schottky diode with a low barrier height of the present invention, a graphene film is fluorinated to form a fluorinated graphene insulating layer, and then a metal electrode is formed, and the fluorinated graphene insulating layer is used as the space between the metal electrode and the substrate. The intercalation of the fluorinated graphene insulating layer does not produce MIGS (metal induced band gap state) pinning effect in the substrate; at the same time, the fluorinated graphene insulating layer can block the interdiffusion between the metal electrode and the substrate, which can form Highly uniform Schottky junction; due to the existence of the fluorinated graphene insulating layer between the metal electrode and the substrate, the Fermi level pinning effect of the metal electrode to the substrate can be greatly reduced, thereby reducing the Schottky diode. The height of the Schottky junction barrier formed between the substrate and the metal electrode;
本发明所述的低势垒高度肖特基二极管通过在金属电极与基底之间设置氟化石墨烯绝缘层,氟化石墨烯绝缘层不会在基底中产生MIGS(金属诱导带隙态)钉扎效应;同时,氟化石墨烯绝缘层可以阻挡金属电极与基底之间的互相扩散,可以形成均匀性极高的肖特基结面;金属电极与基底之间由于氟化石墨烯绝缘层的存在,可以大大降低金属电极对基底的费米能级钉扎效应,从而降低肖特基二极管中基底与金属电极之间形成的肖特基结势垒高度。In the low barrier height Schottky diode of the present invention, a fluorinated graphene insulating layer is arranged between the metal electrode and the substrate, and the fluorinated graphene insulating layer will not generate MIGS (metal induced band gap) nails in the substrate. At the same time, the fluorinated graphene insulating layer can block the mutual diffusion between the metal electrode and the substrate, and can form a highly uniform Schottky junction; between the metal electrode and the substrate, due to the fluorinated graphene insulating layer Exist, can greatly reduce the Fermi level pinning effect of the metal electrode to the substrate, thereby reducing the height of the Schottky junction barrier formed between the substrate and the metal electrode in the Schottky diode.
附图说明Description of drawings
图1显示为本发明实施例一中提供的低势垒高度肖特基二极管的制备方法的流程图。FIG. 1 is a flow chart of a method for fabricating a Schottky diode with a low barrier height provided in Embodiment 1 of the present invention.
图2显示为本发明实施例一中提供的低势垒高度肖特基二极管的制备方法步骤1)所得结构的立体结构示意图。FIG. 2 is a schematic three-dimensional structure diagram of the structure obtained in step 1) of the manufacturing method of the low-barrier-height Schottky diode provided in the first embodiment of the present invention.
图3显示为本发明实施例一中提供的低势垒高度肖特基二极管的制备方法步骤2)所得结构的立体结构示意图。FIG. 3 is a schematic three-dimensional structure diagram of the structure obtained in step 2) of the manufacturing method of the low barrier height Schottky diode provided in the first embodiment of the present invention.
图4显示为本发明实施例一中提供的低势垒高度肖特基二极管的制备方法步骤3)所得结构的立体结构示意图。FIG. 4 is a schematic three-dimensional structure diagram of the structure obtained in step 3) of the manufacturing method of the low-barrier height Schottky diode provided in the first embodiment of the present invention.
图5显示为本发明实施例一中提供的低势垒高度肖特基二极管的制备方法步骤4)所得结构的立体结构示意图。FIG. 5 is a schematic three-dimensional structure diagram of the structure obtained in step 4) of the method for fabricating a Schottky diode with a low barrier height provided in Embodiment 1 of the present invention.
图6显示为本发明实施例一中提供的低势垒高度肖特基二极管的制备方法步骤5)所得结构的立体结构示意图。FIG. 6 is a schematic three-dimensional structure diagram of the structure obtained in step 5) of the manufacturing method of the low-barrier-height Schottky diode provided in the first embodiment of the present invention.
图7显示为图6沿AA方向的截面结构示意图。FIG. 7 is a schematic view of the cross-sectional structure of FIG. 6 along the AA direction.
图8显示为本发明实施例一中提供的低势垒高度肖特基二极管的制备方法步骤6)所得结构的立体结构示意图。FIG. 8 is a schematic three-dimensional structure diagram of the structure obtained in step 6) of the method for fabricating a Schottky diode with a low barrier height provided in Embodiment 1 of the present invention.
图9显示为图8沿AA方向的截面结构示意图。FIG. 9 is a schematic view of the cross-sectional structure of FIG. 8 along the AA direction.
元件标号说明Component label description
10 基底10 base
11 石墨烯薄膜11 Graphene film
12 氟化石墨烯薄膜12 Fluorinated graphene films
13 金属电极13 Metal electrodes
14 欧姆接触电极14 Ohm Contact Electrode
S1~S6 步骤S1~S6 steps
具体实施方式Detailed ways
以下通过特定的具体实例说明本发明的实施方式,本领域技术人员可由本说明书所揭露的内容轻易地了解本发明的其他优点与功效。本发明还可以通过另外不同的具体实施方式加以实施或应用,本说明书中的各项细节也可以基于不同观点与应用,在没有背离本发明的精神下进行各种修饰或改变。The embodiments of the present invention are described below through specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
请参阅图1至图9。需要说明的是,本实施例中所提供的图示仅以示意方式说明本发明的基本构想,虽图示中仅显示与本发明中有关的组件而非按照实际实施时的组件数目、形状及尺寸绘制,其实际实施时各组件的形态、数量及比例可为一种随意的改变,且其组件布局形态也可能更为复杂。See Figures 1 to 9. It should be noted that the diagrams provided in this embodiment are only to illustrate the basic concept of the present invention in a schematic way, although the diagrams only show the components related to the present invention rather than the number, shape and the number of components in actual implementation. For dimension drawing, the shape, quantity and proportion of each component can be arbitrarily changed during actual implementation, and the component layout shape may also be more complicated.
实施例一Example 1
请参阅图1,本发明提供一种低势垒高度肖特基二极管的制备方法,所述低势垒高度肖特基二极管的制备方法包括如下步骤:Referring to FIG. 1, the present invention provides a method for preparing a Schottky diode with a low barrier height. The method for preparing a Schottky diode with a low barrier height includes the following steps:
1)提供一基底;1) provide a base;
2)于所述基底的表面形成石墨烯薄膜;2) forming a graphene film on the surface of the substrate;
3)对所述石墨烯薄膜进行氟化处理以形成氟化石墨烯绝缘层;3) fluorinating the graphene film to form a fluorinated graphene insulating layer;
4)于所述氟化石墨烯绝缘层表面沉积金属电极,以于所述金属电极与所述基底之间形成肖特基结;4) depositing a metal electrode on the surface of the fluorinated graphene insulating layer to form a Schottky junction between the metal electrode and the substrate;
5)去除所述肖特基结所在区域之外的所述氟化石墨烯绝缘层,并裸露出所述基底;5) removing the fluorinated graphene insulating layer outside the area where the Schottky junction is located, and exposing the substrate;
6)于裸露的所述基底表面形成欧姆接触电极。6) forming an ohmic contact electrode on the exposed surface of the substrate.
在步骤1)中,请参阅图1中的S1步骤及图2,提供一基底10。In step 1), referring to step S1 in FIG. 1 and FIG. 2 , a
作为示例,所述基底10可以包括任意一种电荷中性能级正好在价带的基底;优选地,所述基底10可以包括但不仅限于锗(Ge)基底;更为优选地,本实施例中,所述基底10包括N型锗基底。As an example, the
在步骤2)中,请参阅图1中的S2步骤及图3,于所述基底10的表面形成石墨烯薄膜11。In step 2), referring to step S2 in FIG. 1 and FIG. 3 , a
作为示例,可以采用但不仅限于化学气相沉积法于所述基底10的表面原位生长所述石墨烯薄膜11。As an example, the
作为示例,所述石墨烯薄膜11可以为单原子层石墨烯薄膜,也可以为多原子层石墨烯薄膜。优选地,本实施例中,所述石墨烯薄膜11为1~3原子层厚度的石墨烯薄膜,1~3原子层厚度的石墨烯薄膜可以确保得到的氟化石墨烯绝缘层可以起到阻挡金属电极与所述基底10之间的互相扩散,可以形成均匀性极高的肖特基结面,可以大大降低金属电极对所述基底10的费米能级钉扎效应,从而降低肖特基二极管中所述基底10与金属电极之间形成的肖特基结势垒高度的作用。As an example, the
在步骤3)中,请参阅图1中的S3步骤及图4,对所述石墨烯薄膜11进行氟化处理以形成氟化石墨烯绝缘层12。In step 3), referring to step S3 in FIG. 1 and FIG. 4 , the
作为示例,可以采用含氟气体形成等离子体后对所述石墨烯薄膜11进行氟化处理,优选地,本实施例中,采用六氟化硫(SF6)气体对所述石墨烯薄膜11进行等离子体氟化处理。As an example, a fluorine-containing gas may be used to form plasma and then the
作为示例,当所述石墨烯薄膜11为单原子层石墨烯薄膜时,对所述石墨烯薄膜11进行氟化处理后,所述石墨烯薄膜11全部转换为所述氟化石墨烯绝缘层12;而当所述石墨烯薄膜11为多原子层石墨烯薄膜时,在对所述石墨烯薄膜11进行氟化处理的过程中,只有顶层原子层石墨烯转化为所述氟化石墨烯绝缘层12,而其他的石墨烯薄膜11并不会被氟化,而是仍保持石墨烯薄膜状态,即对所述石墨烯薄膜11进行氟化处理后,仅为部分所述石墨烯薄膜11转化为所述氟化石墨烯绝缘层12,亦即,在氟化处理后,所述氟化石墨烯绝缘层12与所述基底10之间还保留有所述石墨烯薄膜11。但优选地,本实施例中,对所述石墨烯薄膜11进行氟化处理后,所述石墨烯薄膜11全部转换为所述氟化石墨烯绝缘层12,这样可以确保所述氟化石墨烯绝缘层12可以最大限度地阻挡后续形成的金属电极与所述基底10之间的互相扩散,以最大限度地降低金属电极与所述基底10之间的费米能级钉扎效应。As an example, when the
在步骤4)中,请参阅图1中的S4步骤及图5,于所述氟化石墨烯绝缘层12表面沉积金属电极13,以于所述金属电极13与所述基底10之间形成肖特基结。In step 4), please refer to step S4 in FIG. 1 and FIG. 5 , a
作为示例,可以采用但不仅限于电子束蒸发法形成所述金属电极13。当然,在其他示例中,还可以采用其他任意一种沉积方法形成所述金属电极13。具体的,可以先于所述氟化石墨烯绝缘层12表面形成一图形化掩膜层,所述图形化掩膜层内形成有定义出所述金属电极13的位置及形状的开口,然后再于所述开口内的所述氟化石墨烯绝缘层12表面形成所述金属电极13。As an example, the
当然,在其他示例中,可以先采用电子束蒸发法等工艺于所述氟化石墨烯绝缘层12表面形成一层金属电极材料层,然后再于所述金属电极材料层上形成一层图形化掩膜层,所述图形化掩膜层内形成有定义出所述金属电极13的位置及形状的图形,最后再依据所述图形化掩膜层刻蚀所述金属电极材料层即得到所述金属电极13。Of course, in other examples, a metal electrode material layer may be formed on the surface of the fluorinated
作为示例,所述金属电极13包括钛(Ti)/金(Au)电极,即所述金属电极13包括钛金属层及金金属层,所述钛金属层位于所述氟化石墨烯绝缘层12的表面,所述金金属层位于所述钛金属层远离所述氟化石墨烯绝缘层12的表面。当然,在其他示例中,所述金属电极13也可以为钛金属电极、金金属电极、铜金属电极或镍金属电极等等。As an example, the
作为示例,所述金属电极13的具体形状可以根据实际需要进行设定,此处不做限制。As an example, the specific shape of the
在步骤5)中,请参阅图1中的S5步骤及图6至图7,去除所述肖特基结所在区域之外的所述氟化石墨烯绝缘层12,并裸露出所述基底10。In step 5), referring to step S5 in FIG. 1 and FIG. 6 to FIG. 7 , the fluorinated
作为示例,可以采用电感耦合等离子体刻蚀(ICP)工艺去除所述肖特基结所在区域之外的所述氟化石墨烯绝缘层12。具体的,可以依据所述金属电极13为刻蚀阻挡层对所述氟化石墨烯绝缘层12进行刻蚀,刻蚀后,仅有所述氟化石墨烯绝缘层12位于所述金属电极13正下方的部分被保留了下来,裸露于所述金属电极13之外的所述氟化石墨烯绝缘层12均被去除。当然,为了在去除所述氟化石墨烯绝缘层12的过程中对所述金属电极13造成损伤,也可以先在所述金属电极13的表面形成保护层,再对所述氟化石墨烯绝缘层12进行刻蚀去除。As an example, an inductively coupled plasma etching (ICP) process may be used to remove the fluorinated
需要说明的是,在该步骤中,裸露于所述金属电极13之外的所述氟化石墨烯绝缘层12被全部去除;而当所述氟化石墨烯绝缘层12下方具有所述石墨烯薄膜11时,位于所述金属电极13之外的所述石墨烯薄膜11也同样被一并去除,以在刻蚀后裸露出所述基底10。It should be noted that, in this step, the fluorinated
在步骤6)中,请参阅图1中的S6步骤及图8至图9,于裸露的所述基底10表面形成欧姆接触电极14。In step 6), referring to step S6 in FIG. 1 and FIGS. 8 to 9 ,
作为示例,可以通过在裸露的所述基底10表面沉积形成大面积电极作为所述欧姆接触电极14。所述欧姆接触电极14的面积可以根据实际需要进行时设定,譬如,所述欧姆接触电极14可以覆盖所述基底10形成有所述欧姆接触电极14的表面的5/1~1/2等等。As an example, a large-area electrode can be formed as the
作为示例,所述欧姆接触电极14可以包括金属电极,所述欧姆接触电极14的材料可以与所述金属电极13的材料相同。As an example, the
本发明的低势垒高度肖特基二极管的制备方法通过将所述石墨烯薄膜11进行氟化处理形成氟化石墨烯绝缘层12后再形成所述金属电极13,利用所述氟化石墨烯绝缘层12作为所述金属电极13与所述基底10之间的插层,所述氟化石墨烯绝缘层12不会在基底中产生MIGS(金属诱导带隙态)钉扎效应;同时,所述氟化石墨烯绝缘层12可以阻挡所述金属电极13与所述基底10之间的互相扩散,可以形成均匀性极高的肖特基结面;所述金属电极13与所述基底10之间由于所述氟化石墨烯绝缘层12的存在,可以大大降低所述金属电极13对所述基底10的费米能级钉扎效应,从而降低肖特基二极管中所述基底10与所述金属电极13之间形成的肖特基结势垒高度。In the method for preparing a low barrier height Schottky diode of the present invention, the
实施例二Embodiment 2
请结合图2至图7继续参阅图8至图9,本发明还提供一种低势垒高度肖特基二极管,所述低势垒高度肖特基二极管包括:Please continue to refer to FIGS. 8 to 9 in conjunction with FIGS. 2 to 7 . The present invention further provides a low barrier height Schottky diode. The low barrier height Schottky diode includes:
基底10;
金属电极13,所述金属电极13位于所述基底10上,以于所述金属电极13与所述基底10之间形成肖特基结;a
氟化石墨烯绝缘层12,所述氟化石墨烯绝缘层12位于所述基底10的表面,且位于所述金属电极13与所述基底10之间;a fluorinated
欧姆接触电极14,所述欧姆接触电极14位于所述氟化石墨烯绝缘层12所在区域之外的所述基底10的表面。The
作为示例,所述基底10可以包括任意一种电荷中性能级正好在价带的基底;优选地,所述基底10可以包括但不仅限于锗(Ge)基底;更为优选地,本实施例中,所述基底10包括N型锗基底。As an example, the
作为示例,所述氟化石墨烯绝缘层12为对于所述基底10的表面原位生长所述石墨烯薄膜11进行氟化处理而得到的结构,具体的,可以采用含氟气体形成等离子体后对所述石墨烯薄膜11进行氟化处理得到所述氟化石墨烯绝缘层12,优选地,本实施例中,采用六氟化硫(SF6)气体对所述石墨烯薄膜11进行等离子体氟化处理得到所述氟化石墨烯绝缘层12。As an example, the fluorinated
作为示例,所述金属电极13包括钛(Ti)/金(Au)电极,即所述金属电极13包括钛金属层及金金属层,所述钛金属层位于所述氟化石墨烯绝缘层12的表面,所述金金属层位于所述钛金属层远离所述氟化石墨烯绝缘层12的表面。当然,在其他示例中,所述金属电极13也可以为钛金属电极、金金属电极、铜金属电极或镍金属电极等等。As an example, the
作为示例,所述金属电极13的具体形状可以根据实际需要进行设定,此处不做限制。As an example, the specific shape of the
作为示例,可以通过在裸露的所述基底10表面沉积形成大面积电极作为所述欧姆接触电极14。所述欧姆接触电极14的面积可以根据实际需要进行时设定,譬如,所述欧姆接触电极14可以覆盖所述基底10形成有所述欧姆接触电极14的表面的5/1~1/2等等。As an example, a large-area electrode can be formed as the
作为示例,所述欧姆接触电极14可以包括金属电极,所述欧姆接触电极14的材料可以与所述金属电极13的材料相同。As an example, the
作为示例,所述低势垒高度肖特基二极管还包括石墨烯薄膜,所述石墨烯薄膜位于所述氟化石墨烯绝缘层12与所述基底10之间。As an example, the low-barrier-height Schottky diode further includes a graphene film, and the graphene film is located between the fluorinated
本发明所述的低势垒高度肖特基二极管通过在所述金属电极13与所述基底10之间设置所述氟化石墨烯绝缘层12,所述氟化石墨烯绝缘层12不会在所述基底10中产生MIGS(金属诱导带隙态)钉扎效应;同时,所述氟化石墨烯绝缘层12可以阻挡所述金属电极13与所述基底10之间的互相扩散,可以形成均匀性极高的肖特基结面;所述金属电极13与所述基底10之间由于所述氟化石墨烯绝缘层12的存在,可以大大降低所述金属电极13对所述基底10的费米能级钉扎效应,从而降低肖特基二极管中所述基底10与所述金属电极13之间形成的肖特基结势垒高度。In the low barrier height Schottky diode of the present invention, by disposing the fluorinated
综上所述,本发明低势垒高度肖特基二极管及其制备方法,所述低势垒高度肖特基二极管的制备方法包括如下步骤:1)提供一基底;2)于所述基底的表面形成石墨烯薄膜;3)对所述石墨烯薄膜进行氟化处理以形成氟化石墨烯绝缘层;4)于所述氟化石墨烯绝缘层表面沉积金属电极,以于所述金属电极与所述基底之间形成肖特基结;5)去除所述肖特基结所在区域之外的所述氟化石墨烯绝缘层,并裸露出所述基底;6)于裸露的所述基底表面形成欧姆接触电极。本发明的低势垒高度肖特基二极管的制备方法通过将石墨烯薄膜进行氟化处理形成氟化石墨烯绝缘层后再形成金属电极,利用氟化石墨烯绝缘层作为金属电极与基底之间的插层,氟化石墨烯绝缘层不会在基底中产生MIGS(金属诱导带隙态)钉扎效应;同时,氟化石墨烯绝缘层可以阻挡金属电极与基底之间的互相扩散,可以形成均匀性极高的肖特基结面;金属电极与基底之间由于氟化石墨烯绝缘层的存在,可以大大降低金属电极对基底的费米能级钉扎效应,从而降低肖特基二极管中基底与金属电极之间形成的肖特基结势垒高度;本发明所述的低势垒高度肖特基二极管通过在金属电极与基底之间设置氟化石墨烯绝缘层,氟化石墨烯绝缘层不会在基底中产生MIGS(金属诱导带隙态)钉扎效应;同时,氟化石墨烯绝缘层可以阻挡金属电极与基底之间的互相扩散,可以形成均匀性极高的肖特基结面;金属电极与基底之间由于氟化石墨烯绝缘层的存在,可以大大降低金属电极对基底的费米能级钉扎效应,从而降低肖特基二极管中基底与金属电极之间形成的肖特基结势垒高度。To sum up, the low barrier height Schottky diode and the preparation method thereof of the present invention, the preparation method of the low barrier height Schottky diode includes the following steps: 1) providing a substrate; 2) on the substrate A graphene film is formed on the surface; 3) fluorination treatment is performed on the graphene film to form a fluorinated graphene insulating layer; 4) a metal electrode is deposited on the surface of the fluorinated graphene insulating layer, so that the metal electrode and the forming a Schottky junction between the substrates; 5) removing the fluorinated graphene insulating layer outside the area where the Schottky junction is located, and exposing the substrate; 6) on the exposed surface of the substrate Ohmic contact electrodes are formed. In the method for preparing a Schottky diode with a low barrier height of the present invention, a graphene film is fluorinated to form a fluorinated graphene insulating layer, and then a metal electrode is formed, and the fluorinated graphene insulating layer is used as the space between the metal electrode and the substrate. The intercalation of the fluorinated graphene insulating layer does not produce MIGS (metal induced band gap state) pinning effect in the substrate; at the same time, the fluorinated graphene insulating layer can block the interdiffusion between the metal electrode and the substrate, which can form Highly uniform Schottky junction; due to the existence of the fluorinated graphene insulating layer between the metal electrode and the substrate, the Fermi level pinning effect of the metal electrode to the substrate can be greatly reduced, thereby reducing the Schottky diode. The barrier height of the Schottky junction formed between the substrate and the metal electrode; the low barrier height Schottky diode of the present invention is provided with a fluorinated graphene insulating layer between the metal electrode and the substrate, and the fluorinated graphene insulating layer The layer does not produce MIGS (metal induced band gap state) pinning effect in the substrate; at the same time, the fluorinated graphene insulating layer can block the interdiffusion between the metal electrode and the substrate, and can form a highly uniform Schottky junction surface; due to the existence of the fluorinated graphene insulating layer between the metal electrode and the substrate, the Fermi level pinning effect of the metal electrode to the substrate can be greatly reduced, thereby reducing the formation of the Schottky diode between the substrate and the metal electrode. Turkey junction barrier height.
上述实施例仅例示性说明本发明的原理及其功效,而非用于限制本发明。任何熟悉此技术的人士皆可在不违背本发明的精神及范畴下,对上述实施例进行修饰或改变。因此,举凡所属技术领域中具有通常知识者在未脱离本发明所揭示的精神与技术思想下所完成的一切等效修饰或改变,仍应由本发明的权利要求所涵盖。The above-mentioned embodiments merely illustrate the principles and effects of the present invention, but are not intended to limit the present invention. Anyone skilled in the art can make modifications or changes to the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the technical field without departing from the spirit and technical idea disclosed in the present invention should still be covered by the claims of the present invention.
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