CN109509705B - Low-barrier-height Schottky diode and preparation method thereof - Google Patents
Low-barrier-height Schottky diode and preparation method thereof Download PDFInfo
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- CN109509705B CN109509705B CN201811243153.3A CN201811243153A CN109509705B CN 109509705 B CN109509705 B CN 109509705B CN 201811243153 A CN201811243153 A CN 201811243153A CN 109509705 B CN109509705 B CN 109509705B
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- 238000002360 preparation method Methods 0.000 title claims abstract description 9
- 239000000758 substrate Substances 0.000 claims abstract description 131
- 229910052751 metal Inorganic materials 0.000 claims abstract description 125
- 239000002184 metal Substances 0.000 claims abstract description 125
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 claims abstract description 82
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 56
- 229910021389 graphene Inorganic materials 0.000 claims abstract description 56
- 230000004888 barrier function Effects 0.000 claims abstract description 40
- 238000003682 fluorination reaction Methods 0.000 claims abstract description 19
- 238000000151 deposition Methods 0.000 claims abstract description 8
- 238000000034 method Methods 0.000 claims description 27
- 229910052732 germanium Inorganic materials 0.000 claims description 18
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 18
- 239000010936 titanium Substances 0.000 claims description 14
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 12
- 239000010931 gold Substances 0.000 claims description 12
- 229910052719 titanium Inorganic materials 0.000 claims description 12
- 229910052737 gold Inorganic materials 0.000 claims description 10
- 238000005530 etching Methods 0.000 claims description 7
- 229910018503 SF6 Inorganic materials 0.000 claims description 6
- 230000008569 process Effects 0.000 claims description 6
- SFZCNBIFKDRMGX-UHFFFAOYSA-N sulfur hexafluoride Chemical compound FS(F)(F)(F)(F)F SFZCNBIFKDRMGX-UHFFFAOYSA-N 0.000 claims description 6
- 229960000909 sulfur hexafluoride Drugs 0.000 claims description 6
- 238000011065 in-situ storage Methods 0.000 claims description 4
- 238000009616 inductively coupled plasma Methods 0.000 claims description 4
- 238000005229 chemical vapour deposition Methods 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 19
- 238000009792 diffusion process Methods 0.000 abstract description 8
- 238000009830 intercalation Methods 0.000 abstract description 4
- 230000002687 intercalation Effects 0.000 abstract description 4
- 239000011261 inert gas Substances 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 102
- 239000010408 film Substances 0.000 description 42
- 238000004519 manufacturing process Methods 0.000 description 12
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 9
- 239000004065 semiconductor Substances 0.000 description 8
- 239000000463 material Substances 0.000 description 7
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 239000007772 electrode material Substances 0.000 description 3
- 230000007935 neutral effect Effects 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000005566 electron beam evaporation Methods 0.000 description 2
- 229910052731 fluorine Inorganic materials 0.000 description 2
- 239000011737 fluorine Substances 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000003574 free electron Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 230000005428 wave function Effects 0.000 description 1
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/66196—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices with an active layer made of a group 13/15 material
- H01L29/66204—Diodes
- H01L29/66212—Schottky diodes
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Abstract
The invention provides a low-barrier height Schottky diode and a preparation method thereof, and the preparation method comprises the following steps: 1) providing a substrate; 2) forming a graphene film on the surface of the substrate; 3) carrying out fluorination treatment on the graphene film to form a fluorinated graphene insulating layer; 4) depositing a metal electrode on the surface of the fluorinated graphene insulating layer; 5) removing the fluorinated graphene insulating layer outside the region where the Schottky junction is located; 6) and forming an ohmic contact electrode on the exposed surface of the substrate. According to the invention, the fluorinated graphene insulating layer is used as an intercalation layer between the metal electrode and the substrate, and the fluorinated graphene insulating layer can not generate an MIGS (metal inert gas) pinning effect in the substrate; the fluorinated graphene insulating layer can prevent mutual diffusion between the metal electrode and the substrate, and can form a Schottky junction surface with extremely high uniformity; the Fermi level pinning effect of the metal electrode to the substrate can be greatly reduced, and therefore the Schottky junction barrier height formed between the substrate and the metal electrode in the Schottky diode is reduced.
Description
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to a low-barrier height Schottky diode and a preparation method thereof.
Background
With the rapid development of the semiconductor industry, it has become a general trend to find new materials to replace the traditional silicon-based materials. Currently, germanium is considered the most promising semiconductor material due to its extremely high carrier mobility and compatibility with semiconductor processes. Schottky Barrier Diodes (SBDs) have been extensively studied for decades in materials, device physics, design and applications due to the importance of their technology. It is well known that the performance and reliability of SBDs are greatly affected by the quality of the interface between the deposited metal and the semiconductor surface. The main parameter for current control in metal-semiconductor (M-S) structures is the doping concentration Nd of the semiconductor and the Schottky Barrier Height (SBH) at the interface of the M-S structure. The SBH value depends on the work function of the metal. For Ge (germanium), the Charge Neutral Level (CNL) is just above the valence band, resulting in metallic fermi level pinning. Although the pinning cause is not fully understood, it is believed to be primarily the effect of the Metal Induced Gap State (MIGS), i.e., the wave function of free electrons in the metal into the semiconductor bandgap induced gap acceptor or donor-like state. The presence of fermi level pinning significantly increases the barrier height of the schottky diode, which is relatively independent of the metal work function, thereby affecting the performance of the schottky diode.
Disclosure of Invention
In view of the above drawbacks of the prior art, an object of the present invention is to provide a low barrier height schottky diode and a method for manufacturing the same, which are used to solve the problem that the schottky diode in the prior art has a metal fermi level pinning effect, so that the barrier height of the schottky diode is high, and the performance of the schottky diode is affected.
To achieve the above and other related objects, the present invention provides a method for manufacturing a low barrier height schottky diode, including the steps of:
1) providing a substrate;
2) forming a graphene film on the surface of the substrate;
3) performing fluorination treatment on the graphene film to form a fluorinated graphene insulating layer;
4) depositing a metal electrode on the surface of the fluorinated graphene insulating layer to form a Schottky junction between the metal electrode and the substrate;
5) removing the fluorinated graphene insulating layer outside the region of the Schottky junction, and exposing the substrate;
6) and forming an ohmic contact electrode on the exposed surface of the substrate.
Optionally, the substrate provided in step 1) comprises a germanium substrate.
Optionally, the germanium substrate comprises an N-type germanium substrate.
Optionally, in step 2), growing the graphene film in situ on the surface of the substrate by using a chemical vapor deposition method.
Optionally, in step 3), performing plasma fluorination treatment on the graphene film by using sulfur hexafluoride gas, so that the graphene film is completely converted into a fluorinated graphene insulating layer.
Optionally, in step 5), the fluorinated graphene insulating layer outside the region where the schottky junction is located is removed by using an inductively coupled plasma etching process.
The present invention also provides a low barrier height schottky diode, comprising:
a substrate;
the metal electrode is positioned on the substrate so as to form a Schottky junction between the metal electrode and the substrate;
the fluorinated graphene insulating layer is positioned on the surface of the substrate and is positioned between the metal electrode and the substrate;
and the ohmic contact electrode is positioned on the surface of the substrate outside the area where the fluorinated graphene insulating layer is positioned.
Optionally, the substrate comprises a germanium substrate.
Optionally, the germanium substrate comprises an N-type germanium substrate.
Optionally, the metal electrode comprises a titanium/gold electrode.
As described above, the low barrier height schottky diode and the method for manufacturing the same according to the present invention have the following advantages:
according to the preparation method of the low barrier height Schottky diode, the graphene film is subjected to fluorination treatment to form the fluorinated graphene insulating layer, then the metal electrode is formed, the fluorinated graphene insulating layer is used as an intercalation layer between the metal electrode and a substrate, and the fluorinated graphene insulating layer cannot generate a Metal Induced Gap (MIGS) pinning effect in the substrate; meanwhile, the fluorinated graphene insulating layer can prevent mutual diffusion between the metal electrode and the substrate, and a Schottky junction surface with extremely high uniformity can be formed; due to the existence of the fluorinated graphene insulating layer between the metal electrode and the substrate, the Fermi level pinning effect of the metal electrode to the substrate can be greatly reduced, so that the Schottky junction barrier height formed between the substrate and the metal electrode in the Schottky diode is reduced;
according to the low barrier height Schottky diode, the fluorinated graphene insulating layer is arranged between the metal electrode and the substrate, and the fluorinated graphene insulating layer cannot generate the MIGS (metal induced bandgap state) pinning effect in the substrate; meanwhile, the fluorinated graphene insulating layer can prevent mutual diffusion between the metal electrode and the substrate, and a Schottky junction surface with extremely high uniformity can be formed; due to the existence of the fluorinated graphene insulating layer between the metal electrode and the substrate, the Fermi level pinning effect of the metal electrode to the substrate can be greatly reduced, and therefore the Schottky junction barrier height formed between the substrate and the metal electrode in the Schottky diode is reduced.
Drawings
Fig. 1 is a flowchart illustrating a method for manufacturing a low barrier height schottky diode according to a first embodiment of the present invention.
Fig. 2 is a schematic perspective view of the structure obtained in step 1) of the method for manufacturing a low barrier height schottky diode according to the first embodiment of the present invention.
Fig. 3 is a schematic perspective view of the structure obtained in step 2) of the method for manufacturing a low barrier height schottky diode according to the first embodiment of the present invention.
Fig. 4 is a schematic perspective view of the structure obtained in step 3) of the method for manufacturing a low barrier height schottky diode according to the first embodiment of the present invention.
Fig. 5 is a schematic perspective view of the structure obtained in step 4) of the method for manufacturing a low barrier height schottky diode according to the first embodiment of the present invention.
Fig. 6 is a schematic perspective view of the structure obtained in step 5) of the method for manufacturing a low barrier height schottky diode according to the first embodiment of the present invention.
Fig. 7 is a schematic cross-sectional view along direction AA of fig. 6.
Fig. 8 is a schematic perspective view of the structure obtained in step 6) of the method for manufacturing a low barrier height schottky diode according to the first embodiment of the present invention.
Fig. 9 is a schematic cross-sectional view along direction AA of fig. 8.
Description of the element reference numerals
10 base
11 graphene thin film
12 fluorinated graphene thin film
13 metal electrode
14 ohm contact electrode
S1-S6
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Please refer to fig. 1 to 9. It should be noted that the drawings provided in the present embodiment are only schematic and illustrate the basic idea of the present invention, and although the drawings only show the components related to the present invention and are not drawn according to the number, shape and size of the components in actual implementation, the form, quantity and proportion of the components in actual implementation may be changed arbitrarily, and the layout of the components may be more complicated.
Example one
Referring to fig. 1, the present invention provides a method for manufacturing a low barrier height schottky diode, which includes the following steps:
1) providing a substrate;
2) forming a graphene film on the surface of the substrate;
3) performing fluorination treatment on the graphene film to form a fluorinated graphene insulating layer;
4) depositing a metal electrode on the surface of the fluorinated graphene insulating layer to form a Schottky junction between the metal electrode and the substrate;
5) removing the fluorinated graphene insulating layer outside the region of the Schottky junction, and exposing the substrate;
6) and forming an ohmic contact electrode on the exposed surface of the substrate.
In step 1), please refer to step S1 in fig. 1 and fig. 2, a substrate 10 is provided.
As an example, the substrate 10 may include any one of substrates having a charge neutral level right in the valence band; preferably, the substrate 10 may include, but is not limited to, a germanium (Ge) substrate; more preferably, in this embodiment, the substrate 10 includes an N-type germanium substrate.
In step 2), please refer to step S2 in fig. 1 and fig. 3, a graphene film 11 is formed on the surface of the substrate 10.
As an example, the graphene film 11 may be grown in situ on the surface of the substrate 10 by, but not limited to, a chemical vapor deposition method.
As an example, the graphene film 11 may be a single atomic layer graphene film or a multi atomic layer graphene film. Preferably, in this embodiment, the graphene film 11 is a graphene film with a thickness of 1 to 3 atomic layers, and the graphene film with a thickness of 1 to 3 atomic layers can ensure that the obtained fluorinated graphene insulating layer can block mutual diffusion between the metal electrode and the substrate 10, can form a schottky junction with extremely high uniformity, and can greatly reduce a fermi level pinning effect of the metal electrode on the substrate 10, thereby reducing a height of a schottky junction barrier formed between the substrate 10 and the metal electrode in the schottky diode.
In step 3), referring to step S3 in fig. 1 and fig. 4, the graphene film 11 is fluorinated to form a fluorinated graphene insulating layer 12.
As an example, the graphene film 11 may be fluorinated after forming plasma with a fluorine-containing gas, and preferably, in this embodiment, sulfur hexafluoride (SF) is used6) And performing plasma fluorination treatment on the graphene film 11 by using gas.
As an example, when the graphene film 11 is a monoatomic layer graphene film, after the fluorination treatment is performed on the graphene film 11, the entire graphene film 11 is converted into the fluorinated graphene insulating layer 12; when the graphene film 11 is a multi-atomic-layer graphene film, only the top-layer atomic-layer graphene is converted into the fluorinated graphene insulating layer 12 during the fluorination treatment of the graphene film 11, and the other graphene films 11 are not fluorinated but still maintain the graphene film state, that is, after the fluorination treatment of the graphene film 11, only a part of the graphene film 11 is converted into the fluorinated graphene insulating layer 12, that is, after the fluorination treatment, the graphene film 11 is still remained between the fluorinated graphene insulating layer 12 and the substrate 10. However, in this embodiment, preferably, after the fluorination treatment is performed on the graphene film 11, the graphene film 11 is completely converted into the fluorinated graphene insulating layer 12, so that the fluorinated graphene insulating layer 12 can be ensured to maximally block interdiffusion between a subsequently formed metal electrode and the substrate 10, so as to maximally reduce the fermi level pinning effect between the metal electrode and the substrate 10.
In step 4), please refer to S4 in fig. 1 and fig. 5, a metal electrode 13 is deposited on the surface of the fluorinated graphene insulating layer 12, so as to form a schottky junction between the metal electrode 13 and the substrate 10.
As an example, the metal electrode 13 may be formed using, but not limited to, an electron beam evaporation method. Of course, in other examples, the metal electrode 13 may be formed by any other deposition method. Specifically, a patterned mask layer may be formed on the surface of the fluorinated graphene insulating layer 12, an opening defining the position and shape of the metal electrode 13 is formed in the patterned mask layer, and then the metal electrode 13 is formed on the surface of the fluorinated graphene insulating layer 12 in the opening.
Certainly, in other examples, a metal electrode material layer may be formed on the surface of the fluorinated graphene insulating layer 12 by using processes such as an electron beam evaporation method, and then a patterned mask layer is formed on the metal electrode material layer, a pattern defining the position and shape of the metal electrode 13 is formed in the patterned mask layer, and finally the metal electrode material layer is etched according to the patterned mask layer, so as to obtain the metal electrode 13.
As an example, the metal electrode 13 includes a titanium (Ti)/gold (Au) electrode, that is, the metal electrode 13 includes a titanium metal layer and a gold metal layer, the titanium metal layer is located on the surface of the graphene fluoride insulating layer 12, and the gold metal layer is located on the surface of the titanium metal layer away from the graphene fluoride insulating layer 12. Of course, in other examples, the metal electrode 13 may also be a titanium metal electrode, a gold metal electrode, a copper metal electrode, a nickel metal electrode, or the like.
By way of example, the specific shape of the metal electrode 13 may be set according to actual needs, and is not limited herein.
In step 5), please refer to step S5 in fig. 1 and fig. 6 to 7, the fluorinated graphene insulating layer 12 outside the region where the schottky junction is located is removed, and the substrate 10 is exposed.
As an example, the fluorinated graphene insulating layer 12 outside the region where the schottky junction is located may be removed using an inductively coupled plasma etching (ICP) process. Specifically, the fluorinated graphene insulating layer 12 may be etched by using the metal electrode 13 as an etching blocking layer, after etching, only a portion of the fluorinated graphene insulating layer 12 located right below the metal electrode 13 is remained, and the fluorinated graphene insulating layer 12 exposed outside the metal electrode 13 is removed. Of course, in order to damage the metal electrode 13 in the process of removing the fluorinated graphene insulating layer 12, a protective layer may be formed on the surface of the metal electrode 13, and then the fluorinated graphene insulating layer 12 may be removed by etching.
In this step, all the insulating layer 12 of the fluorinated graphene exposed outside the metal electrode 13 is removed; when the graphene film 11 is disposed under the fluorinated graphene insulating layer 12, the graphene film 11 outside the metal electrode 13 is also removed together, so as to expose the substrate 10 after etching.
In step 6), referring to step S6 in fig. 1 and fig. 8 to 9, the ohmic contact electrode 14 is formed on the exposed surface of the substrate 10.
As an example, a large-area electrode may be formed as the ohmic contact electrode 14 by deposition on the exposed surface of the substrate 10. The area of the ohmic contact electrode 14 can be set according to actual needs, for example, the ohmic contact electrode 14 can cover 5/1-1/2 and the like on the surface of the substrate 10 on which the ohmic contact electrode 14 is formed.
As an example, the ohmic contact electrode 14 may include a metal electrode, and the material of the ohmic contact electrode 14 may be the same as the material of the metal electrode 13.
According to the preparation method of the low barrier height Schottky diode, the graphene film 11 is subjected to fluorination treatment to form the fluorinated graphene insulating layer 12, then the metal electrode 13 is formed, the fluorinated graphene insulating layer 12 is used as an intercalation layer between the metal electrode 13 and the substrate 10, and the fluorinated graphene insulating layer 12 cannot generate a Metal Induced Gap (MIGS) pinning effect in the substrate; meanwhile, the fluorinated graphene insulating layer 12 can prevent the mutual diffusion between the metal electrode 13 and the substrate 10, and can form a schottky junction with extremely high uniformity; due to the existence of the fluorinated graphene insulating layer 12 between the metal electrode 13 and the substrate 10, the fermi level pinning effect of the metal electrode 13 on the substrate 10 can be greatly reduced, so that the barrier height of a schottky junction formed between the substrate 10 and the metal electrode 13 in the schottky diode is reduced.
Example two
With reference to fig. 8 to 9, with continuing reference to fig. 2 to 7, the present invention further provides a low barrier height schottky diode, including:
a substrate 10;
a metal electrode 13, wherein the metal electrode 13 is located on the substrate 10 to form a schottky junction between the metal electrode 13 and the substrate 10;
a fluorinated graphene insulating layer 12, wherein the fluorinated graphene insulating layer 12 is located on the surface of the substrate 10 and between the metal electrode 13 and the substrate 10;
an ohmic contact electrode 14, wherein the ohmic contact electrode 14 is positioned on the surface of the substrate 10 outside the area where the fluorinated graphene insulation layer 12 is positioned.
As an example, the substrate 10 may include any one of substrates having a charge neutral level right in the valence band; preferably, the substrate 10 may include, but is not limited to, a germanium (Ge) substrate; more preferably, in this embodiment, the substrate 10 includes an N-type germanium substrate.
As an example, the fluorinated graphene insulating layer 12 is a structure obtained by performing a fluorination treatment on the graphene film 11 grown in situ on the surface of the substrate 10, specifically, the fluorinated graphene insulating layer 12 may be obtained by performing a fluorination treatment on the graphene film 11 after forming plasma with a fluorine-containing gas, and preferably, in this embodiment, sulfur hexafluoride (SF) is used6) And performing plasma fluorination treatment on the graphene film 11 by using gas to obtain the fluorinated graphene insulating layer 12.
As an example, the metal electrode 13 includes a titanium (Ti)/gold (Au) electrode, that is, the metal electrode 13 includes a titanium metal layer and a gold metal layer, the titanium metal layer is located on the surface of the graphene fluoride insulating layer 12, and the gold metal layer is located on the surface of the titanium metal layer away from the graphene fluoride insulating layer 12. Of course, in other examples, the metal electrode 13 may also be a titanium metal electrode, a gold metal electrode, a copper metal electrode, a nickel metal electrode, or the like.
By way of example, the specific shape of the metal electrode 13 may be set according to actual needs, and is not limited herein.
As an example, a large-area electrode may be formed as the ohmic contact electrode 14 by deposition on the exposed surface of the substrate 10. The area of the ohmic contact electrode 14 can be set according to actual needs, for example, the ohmic contact electrode 14 can cover 5/1-1/2 and the like on the surface of the substrate 10 on which the ohmic contact electrode 14 is formed.
As an example, the ohmic contact electrode 14 may include a metal electrode, and the material of the ohmic contact electrode 14 may be the same as the material of the metal electrode 13.
As an example, the low barrier height schottky diode further includes a graphene thin film located between the fluorinated graphene insulating layer 12 and the substrate 10.
According to the low barrier height Schottky diode, the fluorinated graphene insulating layer 12 is arranged between the metal electrode 13 and the substrate 10, so that the fluorinated graphene insulating layer 12 does not generate a MIGS (metal induced bandgap state) pinning effect in the substrate 10; meanwhile, the fluorinated graphene insulating layer 12 can prevent the mutual diffusion between the metal electrode 13 and the substrate 10, and can form a schottky junction with extremely high uniformity; due to the existence of the fluorinated graphene insulating layer 12 between the metal electrode 13 and the substrate 10, the fermi level pinning effect of the metal electrode 13 on the substrate 10 can be greatly reduced, so that the barrier height of a schottky junction formed between the substrate 10 and the metal electrode 13 in the schottky diode is reduced.
In summary, the low barrier height schottky diode and the method for manufacturing the same of the present invention include the following steps: 1) providing a substrate; 2) forming a graphene film on the surface of the substrate; 3) performing fluorination treatment on the graphene film to form a fluorinated graphene insulating layer; 4) depositing a metal electrode on the surface of the fluorinated graphene insulating layer to form a Schottky junction between the metal electrode and the substrate; 5) removing the fluorinated graphene insulating layer outside the region of the Schottky junction, and exposing the substrate; 6) and forming an ohmic contact electrode on the exposed surface of the substrate. According to the preparation method of the low barrier height Schottky diode, the graphene film is subjected to fluorination treatment to form the fluorinated graphene insulating layer, then the metal electrode is formed, the fluorinated graphene insulating layer is used as an intercalation layer between the metal electrode and a substrate, and the fluorinated graphene insulating layer cannot generate a Metal Induced Gap (MIGS) pinning effect in the substrate; meanwhile, the fluorinated graphene insulating layer can prevent mutual diffusion between the metal electrode and the substrate, and a Schottky junction surface with extremely high uniformity can be formed; due to the existence of the fluorinated graphene insulating layer between the metal electrode and the substrate, the Fermi level pinning effect of the metal electrode to the substrate can be greatly reduced, so that the Schottky junction barrier height formed between the substrate and the metal electrode in the Schottky diode is reduced; according to the low barrier height Schottky diode, the fluorinated graphene insulating layer is arranged between the metal electrode and the substrate, and the fluorinated graphene insulating layer cannot generate the MIGS (metal induced bandgap state) pinning effect in the substrate; meanwhile, the fluorinated graphene insulating layer can prevent mutual diffusion between the metal electrode and the substrate, and a Schottky junction surface with extremely high uniformity can be formed; due to the existence of the fluorinated graphene insulating layer between the metal electrode and the substrate, the Fermi level pinning effect of the metal electrode to the substrate can be greatly reduced, and therefore the Schottky junction barrier height formed between the substrate and the metal electrode in the Schottky diode is reduced.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (10)
1. A preparation method of a low barrier height Schottky diode is characterized by comprising the following steps:
1) providing a substrate;
2) forming a graphene film on the surface of the substrate;
3) performing fluorination treatment on the graphene film to form a fluorinated graphene insulating layer;
4) depositing a metal electrode on the surface of the fluorinated graphene insulating layer to form a Schottky junction between the metal electrode and the substrate;
5) removing the fluorinated graphene insulating layer outside the region of the Schottky junction, and exposing the substrate;
6) and forming an ohmic contact electrode on the exposed surface of the substrate.
2. The method of claim 1, wherein the substrate provided in step 1) comprises a germanium substrate.
3. The method of claim 2, wherein the germanium substrate comprises an N-type germanium substrate.
4. The method according to claim 1, wherein in step 2), the graphene film is grown in situ on the surface of the substrate by chemical vapor deposition.
5. The method for preparing a schottky diode with a low barrier height as claimed in claim 1, wherein in the step 3), the graphene film is subjected to plasma fluorination treatment by using sulfur hexafluoride gas, so that the graphene film is completely converted into a fluorinated graphene insulating layer.
6. The method for preparing a schottky diode with a low barrier height as claimed in claim 1, wherein in the step 5), the fluorinated graphene insulating layer outside the region where the schottky junction is located is removed by using an inductively coupled plasma etching process.
7. A low barrier height schottky diode, comprising:
a substrate;
the metal electrode is positioned on the substrate so as to form a Schottky junction between the metal electrode and the substrate;
the fluorinated graphene insulating layer is positioned on the surface of the substrate and is positioned between the metal electrode and the substrate;
and the ohmic contact electrode is positioned on the surface of the substrate outside the area where the fluorinated graphene insulating layer is positioned.
8. The low barrier height schottky diode of claim 7 wherein the substrate comprises a germanium substrate.
9. The low barrier height schottky diode of claim 8 wherein the germanium substrate comprises an N-type germanium substrate.
10. The low barrier height schottky diode of claim 7, wherein the metal electrode comprises a titanium/gold electrode.
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