CN109495700B - Circuit and system for eliminating dark current by using slope generator - Google Patents

Circuit and system for eliminating dark current by using slope generator Download PDF

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CN109495700B
CN109495700B CN201811273815.1A CN201811273815A CN109495700B CN 109495700 B CN109495700 B CN 109495700B CN 201811273815 A CN201811273815 A CN 201811273815A CN 109495700 B CN109495700 B CN 109495700B
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correction
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dark current
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CN109495700A (en
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高菊
蔡化
陈飞
芮松鹏
陈正
张风体
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Chengdu Light Collector Technology Co Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/63—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to dark current
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise

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Abstract

The invention discloses a circuit and a system for eliminating dark current by using a novel ramp generator, wherein a second input end of a comparator in the traditional ramp generator is connected with a correction module and a correction capacitor in parallel, the digital value of the dark current noise average of a dark pixel is firstly read out in the working process of the circuit, and is fed back to the correction module, when an effective pixel is read out, the correction module records the noise level of the dark current and is superposed in a ramp signal, so that the read data of the effective pixel does not contain the dark current noise, the dark current noise is effectively eliminated by the framework, the reduction of the dynamic range of an image sensor caused by the dark current is reduced, and the image quality of the image sensor is effectively improved.

Description

Circuit and system for eliminating dark current by using slope generator
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a dark current eliminating circuit using a ramp generator and a system thereof.
Background
In a CMOS Image Sensor (CIS), dark current seriously affects the image quality of the image sensor, and the influence of the dark current on the imaging quality of the image sensor is mainly embodied in two aspects, namely firstly, the nonuniformity of the dark current is an important source of fixed mode noise in the CIS, so that the permeability of the image sensor is poor; secondly, the dark current can increase the average value of the whole image, especially at high temperature, the dark current value is increased significantly, so that the dynamic range of the image is reduced, and although the intrinsic dark current of the photodiode can be reduced in the manufacturing process and the uniformity is improved, the dark current noise still needs to be eliminated or suppressed during the later image processing to improve the image quality.
The ramp generator is widely used in the fields of analog-to-digital conversion and the like, and has become an indispensable part of an image sensor, and various characteristics of the sensor, such as noise, fixed pattern noise, linearity and the like, depend on the design of the ramp generator to a great extent. As shown in fig. 1, in the conventional ramp generator circuit, when a reset switch S7 is turned on to reset a reset capacitor Cf, and an eighth switch is turned on, voltage signals at a first input terminal, a second input terminal, and an output terminal of an operational amplifier are equal to each other, that is, Vramp ═ Vinp3 ═ Vinm3 ═ Vref, and when the reset switch S7 is turned off, Vramp outputs a ramp signal.
The principle of dark current correction in an image sensor is as follows: the average output of the DARK Pixel array is first counted and the average of the DARK Pixel digital signals is subtracted from each Active Pixel digital signal as shown in fig. 2. When the ramp generator is used in an image sensor, the column readout circuit is shown in fig. 3, the timing diagram is shown by a dotted line in fig. 5, and the operation principle is as follows: when the row select signal SEL is high, the Pixel (Pixel) signal value of a certain row is selected and output, the signal RX is high, the MOS transistor controlled by the signal RX is turned on, the signal of the Vfd node is reset to the PVDD voltage signal, the signal RX is turned off, the clock feedthrough is performed due to the channel charge injection effect, and the node Vfd has no path to ground, the node Vfd will be kept lower than the PVDD voltage signal, the reset signal Vrst of the Pixel (Pixel) is output, the signal RST _ COUNT is high, the counter is reset, when the first switch S1 is high, the comparator is reset, the Vinp1 Vinm1 is Vcm voltage Vcm (vrm is comparator common mode voltage signal), the Pixel output reset signal Vrst is sampled on the sampling capacitor Cs1, the signal TX Vsig is turned on, the voltage signal of the Pixel 1 jumps to Vcm- (st-Vsig), when the signal EN _ COUNT is high, the counter starts counting and starts to change, the Vinp1 signal follows the ramp signal, when the comparator is turned over, the counter stops counting, and outputs a digital signal D, which is the photosensitive signal value of PIXEL.
Since the digital output is not 0 when the image sensor system counts the average value of the signal of the dark pixel array and changes with the change of temperature, the dark current correction using the ramp generator described above may result in a decrease in the dynamic range of the image, especially in a high temperature condition, where the dark current value increases.
Disclosure of Invention
The invention aims to provide a dark current eliminating circuit using a ramp generator and a system thereof, which are used for correcting dark current so as to improve the dynamic range of an image.
In order to achieve the purpose, the invention adopts the following technical scheme: a ramp generator comprises a reset capacitor, a correction capacitor, a reset switch, a correction switch, an eighth switch, a sixth switch, a correction module and an operational amplifier, wherein a first input end of the operational amplifier, one end of the reset capacitor and one end of the reset switch are connected to an analog power supply together; a second input end of the operational amplifier is simultaneously connected with one end of the eighth switch and one end of the correction capacitor; the other end of the eighth switch is connected with a signal end (Vref); the other end of the correction capacitor is simultaneously connected with one end of the correction switch and one end of a sixth switch, the other end of the correction switch is connected with the correction module, and the other end of the sixth switch is connected with a signal end (Vref); and the output end of the operational amplifier is simultaneously connected with the other end of the reset capacitor and the other end of the reset switch and outputs a ramp signal.
Further, the correction switch is controlled by a Vdark _ ctrl signal, the sixth switch is controlled by a Vdark _ ctrl signal, and the Vdark _ ctrl signal is a complementary signal of the Vdark _ ctrl signal.
Further, the voltage range output by the correction module is the maximum amplitude value of the dark current noise.
The invention provides a circuit for eliminating dark current by using a slope generator, which adopts the slope generator and comprises:
the output end of the pixel structure is connected with one end of the first sampling capacitor;
the other end of the first sampling capacitor and one end of the first switch are connected to a first input end of the amplifier, and the other end of the first switch is connected with a signal end (Vcm);
one end of the second sampling capacitor is connected with the ramp generator, the other end of the second sampling capacitor and one end of the second switch are connected to the second input end of the amplifier together, and the other end of the second switch is connected with a signal end (Vcm);
the first output end of the amplifier is connected with one end of the third sampling capacitor, and the second output end of the amplifier is connected with one end of the fourth sampling capacitor;
the other end of the third sampling capacitor is connected with the first input end of the comparator and one end of the third switch together;
the other end of the fourth sampling capacitor is connected with the second input end of the comparator and one end of the fourth switch together;
the first output end of the comparator is connected with the other end of the third switch; the second output end of the comparator and the other end of the fourth switch are connected to the input end of the backward diode together; the output end of the backward diode is connected with the input end of the counter; the counter is connected with an EN _ COUNT signal end and an RST _ COUNT signal end and is provided with an output signal end;
further, the pixel structure includes:
a first transistor, wherein a grid end of the first transistor is connected with a signal (TX), and a source end of the first transistor is grounded through a diode;
a second transistor, wherein the grid end of the second transistor is connected with a signal (RX), and the source end of the second transistor is connected with the drain end of the first transistor and the grid end of the third transistor to a node (Vfd); the drain end of the first transistor is connected with the drain end of the second transistor;
a source end of the third transistor is connected with a drain end of the fourth transistor;
a fourth transistor, a gate terminal of which is connected with a Signal (SEL), and a source terminal of which is commonly connected with one end of the first sampling capacitor and is grounded;
further, the voltage range output by the correction module is the maximum amplitude value of the dark current noise.
The invention provides an image sensor system for eliminating dark current by using a ramp generator, which comprises: dark pixel array, effective pixel array, and the circuit for eliminating dark current; the circuit for eliminating the dark current is connected with the dark pixel array and the effective pixel array;
the image sensor system counts the average value of the signals of the dark pixel array and outputs a digital signal;
when a signal terminal (SEL) is high, the circuit for eliminating the dark current outputs a pixel signal value of a certain row of the effective pixel array;
when the signal terminal (RX) is high, a first transistor controlled by the signal terminal (RX) is conducted to reset the node (Vfd) to the voltage signal (PVDD), and then the signal terminal (RX) is disconnected, at the moment, the node (Vfd) has no path to the ground, the node (Vfd) is kept lower than the voltage signal (PVDD), the output reset signal of the pixel is set to Vrst, the RST _ COUNT signal terminal is high, and the counter is reset;
when the voltage of the first switch (S1) is high, the amplifier is reset, and the voltage signal (Vinm1) at the first input end of the amplifier is equal to the voltage signal (Vinp1) at the second input end of the amplifier is equal to the voltage signal Vcm, wherein Vcm is the common-mode voltage signal of the comparator;
the dark current canceling circuit outputs a reset signal (Vrst) which is sampled to a first sampling capacitor (Cs 1);
the signal Terminal (TX) is opened, a photosensitive signal (Vsig) of the effective pixel array is output, and meanwhile, a voltage signal (Vinm1) of a first signal input terminal of the amplifier jumps to Vcm- (Vrst-Vsig);
when the correction switch is switched off, the output voltage of the ramp generator is Vref, when the correction switch is switched on, the correction capacitor is connected to the correction module, a correction voltage signal Vdac output by the correction module is generated, and at the moment, a voltage signal (Vinp3) at a second input end of the operational amplifier jumps to Vref-Vdac;
when the EN _ COUNT signal end is high, the counter starts counting, the ramp signal (Vramp) sent by the ramp generator starts changing, the signal (Vinp1) at the second input end of the amplifier changes along with the ramp signal, when the comparator overturns, the counter stops counting and outputs a digital signal (D), and the output digital signal (D) is the photosensitive signal value of the effective pixel array.
Further, the correction voltage signal Vdac ═ D output by the correction moduleb*DRAD/2NADWherein, DRADIs the amplitude of the image sensor, NADFor the accuracy of the image sensor, DbA dark current noise digital signal output for a dark pixel.
Further, when the image sensor system counts the average value of the signal of the dark pixel array, the digital output is not 0 and varies with the temperature.
Further, the voltage range output by the correction module is the maximum amplitude value of the dark current noise.
The invention has the beneficial effects that: in the circuit for eliminating the dark current, a correction module and a correction capacitor are connected in parallel with a second input end of a comparator in a traditional ramp generator, the dark current noise average digital value of a dark pixel is read out firstly in the working process of the circuit, and the digital value is fed back to the correction module, when an effective pixel is read out, the noise level of the dark current is recorded by the correction module and is superposed in a ramp signal, so that the read data of the effective pixel does not contain the dark current noise, the dark current noise is effectively eliminated by the framework, the reduction of the dynamic range of an image sensor caused by the dark current is reduced, and the image quality of the image sensor is effectively improved.
Drawings
Fig. 1 is a schematic diagram of a ramp generator in the prior art.
Fig. 2 is a block diagram of a CMOS image sensor.
Fig. 3 is a diagram of a column readout circuit for eliminating dark current.
Fig. 4 is a schematic diagram of a ramp generator according to the present invention.
Fig. 5 is a timing diagram of a sensing circuit in which the ramp generator of fig. 1 and 4 is located.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the following detailed description of the embodiments of the present invention is made with reference to the accompanying drawings; it should be noted that the drawings are in a simplified form and are not to precise scale, and are only used for conveniently and clearly achieving the purpose of assisting in describing the embodiment.
Referring to fig. 4, in a conventional ramp generator circuit architecture, a correction module is added to a ramp generator circuit in a dark current cancellation circuit using a ramp generator, and specifically, the ramp generator circuit further includes: the circuit comprises a reset capacitor Cf, a correction capacitor Cs, a reset switch S7, a correction switch S5, an eighth switch S8, a sixth switch S6, a correction module and an operational amplifier.
The correction switch is controlled by the Vdark _ ctrl signal, the sixth switch is controlled by the Vdark _ ctrl signal, and the Vdark _ ctrl signal is the complement of the Vdark _ ctrl signal. A first input end inm3 of the operational amplifier, one end of the reset capacitor Cf and one end of the reset switch S7 are connected to an analog power supply AVDD; the second input terminal inp3 of the operational amplifier is connected to one terminal of the eighth switch S8 and one terminal of the correction capacitor Cs at the same time; the other end of the eighth switch S8 is connected to the signal terminal Vref; the other end of the correction capacitor is simultaneously connected with one end of a correction switch S5 and one end of a sixth switch S6, the other end of the correction switch S5 is connected with the correction module, and the other end of the sixth switch S6 is connected with a signal end Vref; the output end of the operational amplifier is connected to the other end of the reset capacitor Cf and the other end of the reset switch S7 at the same time, and outputs a ramp signal Vramp. When the correction switch S5 is turned off, the ramp generator outputs a Vref signal, when the correction switch S5 is turned on, the correction capacitor Cs is connected to the correction module, and the correction voltage signal Vdac output by the correction module, at this time, the voltage signal Vinp3 at the second input end of the operational amplifier jumps to Vref-Vdac. Correction voltage signal Vdac ═ D output by correction moduleb*DRAD/2NADWherein, DRADIs the amplitude of the image sensor, NADFor the accuracy of the image sensor, DbA dark current noise digital signal output for a dark pixel.
When the ramp amplifier of the present invention is used for dark current correction, the column selection circuit thereof is still as shown in fig. 3, which adopts a 4T pixel structure, and specifically, a circuit for eliminating dark current using a ramp generator of the present embodiment includes: the circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a first sampling capacitor Cs1, a second sampling capacitor Cs2, a third sampling capacitor Cs3, a fourth sampling capacitor Cs4, a comparator, an amplifier, a diode, an inverse diode, a counter, a first switch S1, a second switch S2, a third switch S3 and a fourth switch S4. The first transistor to the fourth transistor of this embodiment are all MOS transistors of the same type, such as NMOS transistors.
Specifically, a gate terminal of the first transistor is connected to the signal terminal TX, and a source terminal of the first transistor is grounded through a diode; the grid end of the second transistor is connected with the signal end RX, and the source end of the second transistor, the drain end of the first transistor and the grid end of the third transistor are connected to a node Vfd; the drain end of the second transistor is connected with the drain end of the third transistor; the source end of the third transistor is connected with the drain end of the fourth transistor; the gate end of the fourth transistor is connected with the signal end SEL, and the source end of the fourth transistor is commonly connected with one end of the first sampling capacitor Cs1 and is grounded; the other end of the first sampling capacitor Cs1 is connected to the input terminal inm1 of the amplifier in common with one end of the first switch S1; the other end of the first switch S1 is connected with a Vcm signal end; one end of a second sampling capacitor Cs2 is connected to the ramp generator, and the other end of the second sampling capacitor Cs2 and one end of a second switch S2 are commonly connected to the input terminal inp1 of the amplifier; the other end of the second switch S2 is connected to the Vcm signal end.
The first output end outp of the amplifier is connected with one end of the third sampling capacitor Cs3, and the second output end outm of the amplifier is connected with one end of the fourth sampling capacitor Cs 4; the other end of the third sampling capacitor Cs3 is commonly connected to a first input terminal inm2 of a comparator and one end of a third switch S3; the other end of the fourth sampling capacitor Cs4 is commonly connected to the second input terminal inp2 of the comparator and one end of the fourth switch S4; a first output end of the comparator is connected with the other end of the third switch S3; the second output end of the comparator and the other end of the fourth switch S4 are commonly connected to an input end Vcom out of an inverse diode; the output end of the backward diode is connected with the input end of the counter; the counter is connected with an EN _ COUNT signal end and an RST _ COUNT signal end and is provided with an output signal end Dout.
The image sensor system of the present embodiment is described in detail next with reference to fig. 5. Fig. 5 is a circuit timing diagram of the dark canceling circuit of the present embodiment. Where D1 in Vcom _ out indicates the value of the photosensitive signal using the ramp generator circuit of FIG. 1, and D0 in Vcom _ out indicates the value of the photosensitive signal using the ramp generator circuit of FIG. 4.
An image sensor system for eliminating dark current using a ramp generator of the present embodiment includes: a dark pixel array, an effective pixel array, and the circuit for eliminating dark current of the present embodiment; the circuit for eliminating dark current is respectively connected with the dark pixel array and the effective pixel array.
In this embodiment, the image sensor system obtains a signal average Db of the dark pixel array by statistics, and outputs a digital signal; it should be noted that this digital signal should ideally be 0, but in practice, due to the influence of dark current noise, the output of this digital signal is not 0 and varies with temperature.
Here, when the signal terminal SEL is high, the circuit for eliminating dark current outputs a pixel signal value of a certain row of the effective pixel array; when the signal terminal RX is high, the first transistor controlled by the signal terminal RX is turned on to reset the node Vfd to the voltage signal PVDD, and then the signal terminal RX is turned off, and due to the channel charge injection effect and clock feed-through, at this time, the node Vfd does not have any path to the ground, the node Vfd will be kept lower than the voltage signal PVDD, the output reset signal Vrst of the pixel is set, the RST _ COUNT signal terminal is high, and the counter is reset.
When the voltage of the first switch S1 is high, the comparator is reset, and the voltage signal Vinm1 at the first input terminal is equal to the voltage signal Vinp1 at the second input terminal is equal to the voltage Vcm, which is the common-mode voltage signal of the comparator. The circuit output reset signal Vrst for eliminating the dark current is sampled to the first sampling capacitor Cs 1; then, the signal TX is turned on, outputting a photosensitive signal Vsig of the effective pixel array; at the same time, the voltage signal Vinp1 at the first signal input of the comparator jumps to Vcm- (Vrst-Vsig). When the correction switch S5 is turned off, a ramp occursThe device outputs a Vref signal, when a correction switch S5 is turned on, a correction capacitor Cs is connected to a correction module, a correction voltage signal Vdac output by the correction module, and at the moment, a voltage signal Vinm3 at a second input end of the operational amplifier jumps to Vref-Vdac. The voltage range output by the correction module is the maximum amplitude value of dark current noise, and the correction voltage signal Vdac output by the correction module is Db*DRAD/2NADWherein, DRADIs the amplitude of the image sensor, NADFor the accuracy of the image sensor, DbA dark current noise digital signal output for a dark pixel.
When the signal end of the signal EN _ COUNT is high, the counter starts counting, the ramp signal Vramp sent by the ramp generator starts to change, the signal Vinp1 at the second input end of the amplifier changes along with the ramp signal, when the comparator overturns, the counter stops counting and outputs a digital signal D0, and the output digital signal D0 is the photosensitive signal value of the effective pixel array.
In summary, in the circuit for eliminating dark current in the present invention, the second input terminal of the comparator in the conventional ramp generator is connected in parallel with the correction module and the correction capacitor, the digital value of the dark current noise average of the dark pixel is read out first in the circuit operation process, and the digital value is fed back to the correction module, when the effective pixel is read out, because the noise level of the dark current is recorded by the correction module and is superimposed in the ramp signal, the read data of the effective pixel does not contain the dark current noise, the architecture effectively eliminates the dark current noise, reduces the reduction of the dynamic range of the image sensor caused by the dark current, and effectively improves the image quality of the image sensor.
The above description is only a preferred embodiment of the present invention, and the embodiment is not intended to limit the scope of the present invention, so that all equivalent structural changes made by using the contents of the specification and the drawings of the present invention should be included in the scope of the appended claims.

Claims (4)

1. An image sensor system for eliminating dark current using a ramp generator, comprising: a dark pixel array, an active pixel array, and a circuit to eliminate dark current; the circuit for eliminating the dark current is connected with the dark pixel array and the effective pixel array;
the circuit for eliminating the dark current comprises a pixel structure, wherein the output end of the pixel structure is connected with one end of a first sampling capacitor;
the other end of the first sampling capacitor and one end of the first switch are connected to a first input end of the amplifier, and the other end of the first switch is connected with a signal end Vcm;
one end of the second sampling capacitor is connected with the slope generator, the other end of the second sampling capacitor and one end of the second switch are connected to the second input end of the amplifier together, and the other end of the second switch is connected with the signal end Vcm;
the first output end of the amplifier is connected with one end of the third sampling capacitor, and the second output end of the amplifier is connected with one end of the fourth sampling capacitor;
the other end of the third sampling capacitor is connected with the first input end of the comparator and one end of the third switch together;
the other end of the fourth sampling capacitor is connected with the second input end of the comparator and one end of the fourth switch together;
the first output end of the comparator is connected with the other end of the third switch; the second output end of the comparator and the other end of the fourth switch are connected to the input end of the backward diode together; the output end of the backward diode is connected with the input end of the counter; the counter is connected with an EN _ COUNT signal end and an RST _ COUNT signal end and is provided with an output signal end;
wherein the pixel structure comprises:
a gate terminal of the first transistor is connected with a signal TX, and a source terminal of the first transistor is grounded through a diode;
a gate terminal of the second transistor is connected with the signal RX, and a source terminal of the second transistor is connected with a drain terminal of the first transistor and a gate terminal of the third transistor to be connected with a node Vfd; the drain end of the first transistor is connected with the drain end of the second transistor;
a source end of the third transistor is connected with a drain end of the fourth transistor;
a gate end of the fourth transistor is connected with a signal SEL, and a source end of the fourth transistor is commonly connected with one end of the first sampling capacitor and grounded;
the slope generator comprises a reset capacitor, a correction capacitor, a reset switch, a correction switch, an eighth switch, a sixth switch, a correction module and an operational amplifier, wherein a first input end of the operational amplifier, one end of the reset capacitor and one end of the reset switch are connected to an analog power supply together; a second input end of the operational amplifier is simultaneously connected with one end of the eighth switch and one end of the correction capacitor; the other end of the eighth switch is connected with a signal end Vref; the other end of the correction capacitor is simultaneously connected with one end of the correction switch and one end of a sixth switch, the other end of the correction switch is connected with the correction module, and the other end of the sixth switch is connected with a signal end Vref; the output end of the operational amplifier is simultaneously connected with the other end of the reset capacitor and the other end of the reset switch and outputs a ramp signal; the correction voltage signal Vdac-D output by the correction moduleb*DRAD/2NADWherein, DRADIs the amplitude of the image sensor, NADFor the accuracy of the image sensor, DbA dark current noise digital signal output for a dark pixel;
the image sensor system counts the average value of the signals of the dark pixel array and outputs a digital signal;
when the signal terminal SEL is high, the circuit for eliminating the dark current outputs a pixel signal value of a certain row of the effective pixel array;
when the signal terminal RX is high, a first transistor controlled by the signal terminal RX is turned on, the node Vfd is reset to the voltage signal PVDD, then the signal terminal RX is turned off, at the moment, the node Vfd does not have any path to the ground, the node Vfd is kept lower than the voltage signal PVDD, the output reset signal of the pixel is set to Vrst, the RST _ COUNT signal terminal is high, and the counter is reset;
when the voltage of the first switch is high, the amplifier is reset, and a voltage signal Vinm1 of the first input end of the amplifier is equal to a voltage signal Vinp1 of the second input end of the amplifier is equal to a voltage signal Vcm, wherein Vcm is a common-mode voltage of the comparator;
the circuit for eliminating the dark current outputs a reset signal Vrst which is sampled to a first sampling capacitor Cs 1;
the signal terminal TX is opened, a photosensitive signal Vsig of an effective pixel array is output, and meanwhile, a voltage signal Vinm1 at a first signal input terminal of the amplifier jumps to Vcm- (Vrst-Vsig);
when the correction switch is switched off, the output voltage of the ramp generator is Vref, when the correction switch is switched on, the correction capacitor is connected to the correction module, a correction voltage signal Vdac output by the correction module, and at the moment, a voltage signal Vinp3 at a second input end of the operational amplifier jumps to Vref-Vdac;
when the EN _ COUNT signal terminal is high, the counter starts counting, the ramp signal Vramp sent by the ramp generator starts to change, the signal Vinp1 at the second input terminal of the amplifier changes along with the ramp signal, when the comparator turns over, the counter stops counting and outputs a digital signal D, and the output digital signal D is the photosensitive signal value of the effective pixel array.
2. The image sensor system of claim 1, wherein the digital output is not 0 and varies with temperature as the image sensor system averages the signal of the dark pixel array.
3. The image sensor system of claim 1, wherein the voltage range output by the correction module is a maximum amplitude value of dark current noise.
4. The image sensor system of claim 1, wherein the correction switch is controlled by a Vdark _ ctrl signal, the sixth switch is controlled by a Vdark _ ctrl signal, and the Vdark _ ctrl signal is a complement of the Vdark _ ctrl signal.
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