CN109478158A - Ddr存储器错误恢复 - Google Patents

Ddr存储器错误恢复 Download PDF

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Publication number
CN109478158A
CN109478158A CN201780043920.3A CN201780043920A CN109478158A CN 109478158 A CN109478158 A CN 109478158A CN 201780043920 A CN201780043920 A CN 201780043920A CN 109478158 A CN109478158 A CN 109478158A
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CN
China
Prior art keywords
memory
command
queue
response
memory controller
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201780043920.3A
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English (en)
Chinese (zh)
Inventor
詹姆斯·R·麦格罗
彭瑞华
安东尼·阿莎罗
凯达尔纳特·巴拉里斯南
斯科特·P·墨菲
姚于斌
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Advanced Micro Devices Inc
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Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of CN109478158A publication Critical patent/CN109478158A/zh
Pending legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1016—Error in accessing a memory location, i.e. addressing error
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/161—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement
    • G06F13/1626—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement by reordering requests
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3856—Reordering of instructions, e.g. using queues or age tags

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
  • Memory System (AREA)
  • Retry When Errors Occur (AREA)
CN201780043920.3A 2016-07-15 2017-07-11 Ddr存储器错误恢复 Pending CN109478158A (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201662363075P 2016-07-15 2016-07-15
US62/363,075 2016-07-15
US15/375,076 US11675659B2 (en) 2016-07-15 2016-12-09 DDR memory error recovery
US15/375,076 2016-12-09
PCT/US2017/041559 WO2018013584A1 (en) 2016-07-15 2017-07-11 Ddr memory error recovery

Publications (1)

Publication Number Publication Date
CN109478158A true CN109478158A (zh) 2019-03-15

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201780043920.3A Pending CN109478158A (zh) 2016-07-15 2017-07-11 Ddr存储器错误恢复

Country Status (6)

Country Link
US (1) US11675659B2 (enrdf_load_stackoverflow)
EP (1) EP3270290B1 (enrdf_load_stackoverflow)
JP (1) JP7155103B2 (enrdf_load_stackoverflow)
KR (1) KR102350538B1 (enrdf_load_stackoverflow)
CN (1) CN109478158A (enrdf_load_stackoverflow)
WO (1) WO2018013584A1 (enrdf_load_stackoverflow)

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CN112835734A (zh) * 2019-11-25 2021-05-25 深圳市中兴微电子技术有限公司 一种异常处理装置及ddr存储系统
CN114245891A (zh) * 2019-08-12 2022-03-25 超威半导体公司 用于持久性存储器系统等的数据完整性
CN114518902A (zh) * 2020-11-20 2022-05-20 马来西亚瑞天芯私人有限公司 一种内存定序器系统和应用该系统的内存定序方法
CN114902197A (zh) * 2019-12-30 2022-08-12 超威半导体公司 非易失性双列直插式存储器模块的命令重放
CN114902198A (zh) * 2019-12-30 2022-08-12 超威半导体公司 用于异构存储器系统的信令
CN115885268A (zh) * 2020-06-12 2023-03-31 超威半导体公司 Dram命令拖尾管理
CN116302659A (zh) * 2023-04-27 2023-06-23 摩尔线程智能科技(北京)有限责任公司 Gpu显存错误处理方法及装置、电子设备和存储介质
CN116701256A (zh) * 2023-06-05 2023-09-05 牛芯半导体(深圳)有限公司 多通道仲裁器电路、接口芯片及数据访问方法
CN117099071A (zh) * 2021-03-31 2023-11-21 超威半导体公司 存储器控制器功率状态
CN119537088A (zh) * 2025-01-21 2025-02-28 芯思原微电子有限公司 一种ddr控制器校验错误重传系统
WO2025092174A1 (zh) * 2023-11-03 2025-05-08 腾讯科技（深圳）有限公司 包括重发队列的芯片、设备、处理方法、介质和程序产品

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KR102485411B1 (ko) * 2018-03-02 2023-01-06 에스케이하이닉스 주식회사 메모리 시스템 및 그것의 동작 방법
CN110729006B (zh) * 2018-07-16 2022-07-05 超威半导体(上海)有限公司 存储器控制器中的刷新方案
US11768701B2 (en) * 2019-09-17 2023-09-26 Western Digital Technologies, Inc. Exception analysis for data storage devices
US11531601B2 (en) * 2019-12-30 2022-12-20 Advanced Micro Devices, Inc. Error recovery for non-volatile memory modules
US11392441B2 (en) * 2019-12-30 2022-07-19 Advanced Micro Devices, Inc. Error reporting for non-volatile memory modules
US20210357336A1 (en) * 2020-05-14 2021-11-18 Advanced Micro Devices, Inc. Efficient memory bus management
US11561862B2 (en) 2020-05-29 2023-01-24 Advanced Micro Devices, Inc. Refresh management for DRAM
US11249839B1 (en) * 2020-08-14 2022-02-15 Rockwell Automation Technologies, Inc. Method and apparatus for memory error detection
TWI807919B (zh) * 2022-07-14 2023-07-01 群聯電子股份有限公司 資料重讀方法、記憶體儲存裝置及記憶體控制電路單元
WO2025096946A1 (en) * 2023-11-03 2025-05-08 Advanced Micro Devices, Inc. Error alert encoding for improved error mitigation

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Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114245891A (zh) * 2019-08-12 2022-03-25 超威半导体公司 用于持久性存储器系统等的数据完整性
CN110727530A (zh) * 2019-09-12 2020-01-24 无锡江南计算技术研究所 基于窗口的错误访存请求重传系统及方法
CN110727530B (zh) * 2019-09-12 2021-02-19 无锡江南计算技术研究所 基于窗口的错误访存请求重传系统及方法
CN112835734A (zh) * 2019-11-25 2021-05-25 深圳市中兴微电子技术有限公司 一种异常处理装置及ddr存储系统
CN114902198B (zh) * 2019-12-30 2023-10-27 超威半导体公司 用于异构存储器系统的信令
CN114902197A (zh) * 2019-12-30 2022-08-12 超威半导体公司 非易失性双列直插式存储器模块的命令重放
CN114902198A (zh) * 2019-12-30 2022-08-12 超威半导体公司 用于异构存储器系统的信令
CN114902197B (zh) * 2019-12-30 2023-06-13 超威半导体公司 非易失性双列直插式存储器模块的命令重放
CN115885268A (zh) * 2020-06-12 2023-03-31 超威半导体公司 Dram命令拖尾管理
CN114518902A (zh) * 2020-11-20 2022-05-20 马来西亚瑞天芯私人有限公司 一种内存定序器系统和应用该系统的内存定序方法
CN117099071A (zh) * 2021-03-31 2023-11-21 超威半导体公司 存储器控制器功率状态
CN117099071B (zh) * 2021-03-31 2025-02-28 超威半导体公司 存储器控制器功率状态
CN116302659A (zh) * 2023-04-27 2023-06-23 摩尔线程智能科技(北京)有限责任公司 Gpu显存错误处理方法及装置、电子设备和存储介质
CN116302659B (zh) * 2023-04-27 2023-08-08 摩尔线程智能科技(北京)有限责任公司 Gpu显存错误处理方法及装置、电子设备和存储介质
CN116701256A (zh) * 2023-06-05 2023-09-05 牛芯半导体(深圳)有限公司 多通道仲裁器电路、接口芯片及数据访问方法
WO2025092174A1 (zh) * 2023-11-03 2025-05-08 腾讯科技（深圳）有限公司 包括重发队列的芯片、设备、处理方法、介质和程序产品
CN119537088A (zh) * 2025-01-21 2025-02-28 芯思原微电子有限公司 一种ddr控制器校验错误重传系统

Also Published As

Publication number Publication date
KR102350538B1 (ko) 2022-01-14
EP3270290B1 (en) 2021-03-24
JP2019527424A (ja) 2019-09-26
JP7155103B2 (ja) 2022-10-18
US11675659B2 (en) 2023-06-13
KR20190019209A (ko) 2019-02-26
US20180018221A1 (en) 2018-01-18
WO2018013584A1 (en) 2018-01-18
EP3270290A1 (en) 2018-01-17

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