CN109478141B - 控制异步管线的级的操作速度 - Google Patents

控制异步管线的级的操作速度 Download PDF

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Publication number
CN109478141B
CN109478141B CN201780044922.4A CN201780044922A CN109478141B CN 109478141 B CN109478141 B CN 109478141B CN 201780044922 A CN201780044922 A CN 201780044922A CN 109478141 B CN109478141 B CN 109478141B
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completion status
critical path
completion
stages
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CN109478141A (zh
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格雷格·萨多夫斯基
约翰·卡拉马卡拉马蒂亚诺斯
肖密特·N·达斯
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Advanced Micro Devices Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3871—Asynchronous instruction pipeline, e.g. using handshake signals between stages
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3869—Implementation aspects, e.g. pipeline latches; pipeline synchronisation and clocking
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Image Processing (AREA)
  • Power Sources (AREA)
  • Information Transfer Systems (AREA)
  • Pipeline Systems (AREA)
CN201780044922.4A 2016-07-21 2017-07-20 控制异步管线的级的操作速度 Active CN109478141B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/216,094 US10698692B2 (en) 2016-07-21 2016-07-21 Controlling the operating speed of stages of an asynchronous pipeline
US15/216,094 2016-07-21
PCT/US2017/042981 WO2018017785A2 (en) 2016-07-21 2017-07-20 Controlling the operating speed of stages of an asynchronous pipeline

Publications (2)

Publication Number Publication Date
CN109478141A CN109478141A (zh) 2019-03-15
CN109478141B true CN109478141B (zh) 2024-06-04

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CN201780044922.4A Active CN109478141B (zh) 2016-07-21 2017-07-20 控制异步管线的级的操作速度

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US (2) US10698692B2 (enExample)
EP (1) EP3488340B1 (enExample)
JP (2) JP6893971B2 (enExample)
KR (2) KR102266303B1 (enExample)
CN (1) CN109478141B (enExample)
WO (1) WO2018017785A2 (enExample)

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US10503544B2 (en) * 2016-10-17 2019-12-10 Toyota Jidosha Kabushiki Kaisha Efficient mapping from task graphs to dynamic system platforms
KR102309429B1 (ko) * 2017-03-20 2021-10-07 현대자동차주식회사 차량 및 그 제어 방법
US10326452B2 (en) * 2017-09-23 2019-06-18 Eta Compute, Inc. Synchronizing a self-timed processor with an external event
US11334696B2 (en) * 2017-09-28 2022-05-17 Intel Corporation Systems and methods for dynamic voltage and frequency scaling in programmable logic devices
JP2020165713A (ja) * 2019-03-28 2020-10-08 株式会社デンソーテン 検査データ出力装置、表示システムおよび検査データ出力方法
US11467845B2 (en) * 2020-10-20 2022-10-11 Micron Technology, Inc. Asynchronous pipeline merging using long vector arbitration

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US6590624B1 (en) * 1997-04-11 2003-07-08 Samsung Electronics Co., Ltd. LCD panels including interconnected test thin film transistors and methods of gross testing LCD panels
WO2004027528A2 (en) * 2002-09-20 2004-04-01 Koninklijke Philips Electronics N.V. Adaptive data processing scheme based on delay forecast
US6867620B2 (en) * 2000-04-25 2005-03-15 The Trustees Of Columbia University In The City Of New York Circuits and methods for high-capacity asynchronous pipeline
JP2006039754A (ja) * 2004-07-23 2006-02-09 Canon Inc 画像処理装置及びその方法
US8677103B1 (en) * 2004-10-20 2014-03-18 Marvell Isreal (M.I.S.L) Ltd. Asynchronous pipelined data path with data transition

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JP3884914B2 (ja) * 2001-01-30 2007-02-21 株式会社ルネサステクノロジ 半導体装置
JP4246141B2 (ja) * 2004-03-22 2009-04-02 シャープ株式会社 データ処理装置
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US6590624B1 (en) * 1997-04-11 2003-07-08 Samsung Electronics Co., Ltd. LCD panels including interconnected test thin film transistors and methods of gross testing LCD panels
US6182233B1 (en) * 1998-11-20 2001-01-30 International Business Machines Corporation Interlocked pipelined CMOS
US6867620B2 (en) * 2000-04-25 2005-03-15 The Trustees Of Columbia University In The City Of New York Circuits and methods for high-capacity asynchronous pipeline
WO2004027528A2 (en) * 2002-09-20 2004-04-01 Koninklijke Philips Electronics N.V. Adaptive data processing scheme based on delay forecast
JP2006039754A (ja) * 2004-07-23 2006-02-09 Canon Inc 画像処理装置及びその方法
US8677103B1 (en) * 2004-10-20 2014-03-18 Marvell Isreal (M.I.S.L) Ltd. Asynchronous pipelined data path with data transition

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Exploring Asynchronous Design Techniques for Process-Tolerant and Energy-Efficient Subthreshold Operation;Ik Joon Chang 等;IEEE Journal of Solid-State Circuits;第45卷(第2期);第401-409页 *
Timing Variation Adaptive Pipeline Design: Using Probabilistic Activity Completion Sensing with Backup Error Resilience;Jayaram Natarajan 等;2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems;第122-127页 *

Also Published As

Publication number Publication date
EP3488340A4 (en) 2020-08-19
WO2018017785A2 (en) 2018-01-25
JP6893971B2 (ja) 2021-06-23
EP3488340B1 (en) 2023-09-06
KR20190022858A (ko) 2019-03-06
JP2021166053A (ja) 2021-10-14
JP7465848B2 (ja) 2024-04-11
US20180024837A1 (en) 2018-01-25
EP3488340A2 (en) 2019-05-29
CN109478141A (zh) 2019-03-15
US11842199B2 (en) 2023-12-12
JP2019521454A (ja) 2019-07-25
KR20210074411A (ko) 2021-06-21
US20210089324A1 (en) 2021-03-25
US10698692B2 (en) 2020-06-30
KR102266303B1 (ko) 2021-06-17
KR102663653B1 (ko) 2024-05-10
WO2018017785A3 (en) 2018-03-08

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