CN109450386A - A kind of control device of TDD power amplifier - Google Patents
A kind of control device of TDD power amplifier Download PDFInfo
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- CN109450386A CN109450386A CN201811281570.7A CN201811281570A CN109450386A CN 109450386 A CN109450386 A CN 109450386A CN 201811281570 A CN201811281570 A CN 201811281570A CN 109450386 A CN109450386 A CN 109450386A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
- H03F3/193—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only with field-effect devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/294—Indexing scheme relating to amplifiers the amplifier being a low noise amplifier [LNA]
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/447—Indexing scheme relating to amplifiers the amplifier being protected to temperature influence
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Abstract
The present invention relates to wireless communication technology field, in particular to a kind of control device of TDD power amplifier；The present invention includes linking element, power switch switch unit and grid voltage temperature compensation unit, linking element includes concatenated downlink PA circuit and uplink LNA circuit, downlink PA circuit includes that concatenated small microwave amplifier (A), LDMOS pipe and circulator, uplink LNA circuit include concatenated RF switch (K1) and low-noise amplifier (LNA)；In the present invention, the downlink PA circuit and uplink LNA circuit for making linking element by power switch switch unit are switched over according to the time-multiplexed synchronization signal control of TDD to meet the requirement of tdd mode, and temperature-compensating is carried out by grid voltage temperature compensation unit, keep quiescent current of the LDMOS pipe within the scope of total temperature constant.
Description
Technical field
The present invention relates to wireless communication technology field, in particular to a kind of control device of TDD power amplifier.
Background technique
With the development of wireless mobile telecommunication technology, TDD and FDD become the two kinds of Primary communication modes communicated；Power is put
Big device will also develop the adaptable operating mode of TDD and FDD as the radiofrequency tips amplifying unit in system.
TDD (Time Division Duplexing) Time division duplex, in the duplex technology that mobile communication technology uses
One of, it is corresponding with FDD.In the mobile communication system of tdd mode, base station makes to the uplink and downlink communication between mobile station
With the different time-gap of same frequency channel (i.e. carrier wave), reception and transmission channel are separated with the time, some period is by base station
Mobile station is sent a signal to, the time in addition sends a signal to base station by mobile station, and one must be cooperateed between base station and mobile station
Causing could work well.The characteristics of fdd mode, is received and is transmitted, with guarantor on two symmetrical frequency channels of separation
Frequency range is demonstrate,proved to separate reception and transmission channel, uplink and downlink frequency interval can achieve 190MHz in certain systems.
Mobile communication system under tdd mode, it is desirable that switching time delay meets the requirement of tdd mode.
Summary of the invention
It is described above in order to overcome the shortcomings of, the object of the present invention is to provide a kind of control device of TDD power amplifier,
Make downlink PA circuit and the uplink LNA circuit of linking element time-multiplexed same according to TDD by power switch switch unit
Step signal control switches over the requirement for meeting tdd mode, and carries out temperature-compensating by grid voltage temperature compensation unit, keeps
Quiescent current of the LDMOS pipe within the scope of total temperature is constant.
The present invention the technical solution to solve the technical problem is that:
A kind of control device of TDD power amplifier, wherein including linking element, power switch switch unit and grid voltage
Temperature compensation unit, the linking element include concatenated downlink PA circuit and uplink LNA circuit, and the downlink PA circuit includes series connection
Small microwave amplifier (A), LDMOS pipe and circulator, the uplink LNA circuit include concatenated RF switch (K1) and low noise
Acoustic amplifier (LNA)；The power switch switch unit includes for the small microwave amplifier (A) and low-noise amplifier
(LNA) switching circuit of power supply being powered；The grid voltage temperature compensation unit includes for carrying out temperature-compensating to the LDMOS pipe
Grid voltage temperature compensation circuit.
As an improvement of the present invention, the switching circuit of power supply is put by first interface (VDD1) and the small microwave
Big device (A) connection.
As a further improvement of the present invention, the switching circuit of power supply passes through second interface (VDD2) and the low noise
Amplifier (LNA) connection.
As a further improvement of the present invention, the switching circuit of power supply include metal-oxide-semiconductor (U3), resistance R7, resistance R8,
Resistance R5, inverter (U2) and triode (K2)；Metal-oxide-semiconductor (U3) the 7th, 8 pins connect with first interface (VDD1), metal-oxide-semiconductor
(U3) the 5th, 6 pins connect with second interface (VDD2), the 2nd pin of metal-oxide-semiconductor (U3) is connect with one end of resistance R7, MOS
4th pin of pipe (U3) is connect with one end of resistance R8, and the other end of resistance R7 is connect with the 6th pin of inverter (U2), electricity
The other end of resistance R8 is connect with the 4th pin of inverter (U2), the 3rd pin of inverter (U2) and the collector of triode (K2)
Connection, the 1st pin of inverter (U2) are connect with one end of resistance R5, and the other end of resistance R5 and the base stage of triode (K2) connect
It connects, the emitter ground connection of triode (K2)；3rd pin of inverter (U2) passes through third interface (LNA-SW) and RF switch
(K1) it connects.
As a further improvement of the present invention, the base stage of triode (K2) is also connect with one end of resistance R6, resistance R6
The other end connect with one end of capacitor C6, the other end of capacitor C6 ground connection.
As a further improvement of the present invention, the 1st pin of metal-oxide-semiconductor (U3) also passes through capacitor C11, capacitor C12 respectively
Ground connection.
As a further improvement of the present invention, the grid voltage temperature compensation circuit by the 4th interface (Vgs1) with it is described
The connection of LDMOS pipe.
As a further improvement of the present invention, the grid voltage temperature compensation circuit includes inverter (U1), metal-oxide-semiconductor (U4), two
Pole pipe (D1), resistance R2, resistance R3, resistance R0, resistance R4, inductance L1, capacitor C3 and capacitor C4；Distinguish at the end D of metal-oxide-semiconductor (U4)
Connect with one end of the 4th interface (Vgs1), resistance R4, the other end of resistance R4 respectively with one end of inductance L1, capacitor C4 one
End connection, the other end of capacitor C4 connect with one end of capacitor C3, one end of resistance R0 respectively with the other end of capacitor C3, inductance
The other end of L1 connects, and one end of resistance R0 with single-chip microcontroller (MCU) by connecting, single-chip microcontroller (MCU) and temperature sensor (TMP)
Connection；The end G of metal-oxide-semiconductor (U4) is connect with one end of resistance R2, and the other end of resistance R2 is connect with the cathode of diode (D1), and two
The anode of pole pipe (D1) is connect with the 6th pin of inverter (U1), inverter (U1) the 1st, 2,3 pins are grounded；Metal-oxide-semiconductor
(U4) the end S is connect with one end of resistance R3, the other end ground connection of resistance R3.
As a further improvement of the present invention, the 5th foot of inverter (U1) respectively with one end of capacitor C1, capacitor C2
One end connection, the other end of capacitor C1 and the other end of capacitor C2 are grounded.
As a further improvement of the present invention, the end D of metal-oxide-semiconductor (U4) is also connect with one end of capacitor C5, capacitor C5's
Other end ground connection.
In the present invention, the downlink PA circuit and uplink LNA circuit of linking element are made by power switch switch unit
The requirement for meeting tdd mode is switched over according to the time-multiplexed synchronization signal control of TDD, and passes through grid voltage temperature compensation list
Member carries out temperature-compensating, keeps quiescent current of the LDMOS pipe within the scope of total temperature constant.
Detailed description of the invention
The present invention is described in detail by following preferred embodiments and attached drawing for ease of explanation,.
Fig. 1 is connection block diagram of the invention；
Fig. 2 is the internal circuit diagram of linking element of the invention；
Fig. 3 is the internal circuit diagram of power switch switch unit of the invention；
Fig. 4 is the internal circuit diagram of grid voltage temperature compensation unit of the invention.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, with reference to the accompanying drawings and embodiments, right
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.
It should be noted that in the absence of conflict, the feature in embodiment and embodiment in the present invention can phase
Mutually combination.
As shown in Figure 1, Figure 2, Figure 3 and Figure 4, the control device of a kind of TDD power amplifier of the invention, including link list
Member, power switch switch unit and grid voltage temperature compensation unit.
Linking element includes concatenated downlink PA circuit and uplink LNA circuit, and downlink PA circuit includes concatenated small microwave
Amplifier (A), LDMOS pipe and circulator, uplink LNA circuit include concatenated RF switch (K1) and low-noise amplifier
(LNA)。
Power switch switch unit includes for being powered to small microwave amplifier (A) and low-noise amplifier (LNA)
Switching circuit of power supply.
Grid voltage temperature compensation unit includes the grid voltage temperature compensation circuit for carrying out temperature-compensating to the LDMOS pipe.
In the present invention, the downlink PA circuit and uplink LNA circuit of linking element are made by power switch switch unit
The requirement for meeting tdd mode is switched over according to the time-multiplexed synchronization signal control of TDD, and passes through grid voltage temperature compensation list
Member carries out temperature-compensating, keeps quiescent current of the LDMOS pipe within the scope of total temperature constant.
Since TDD is uplink and downlink with frequency, time division multiplexing operating mode, in order to improve the isolation of uplink and downlink, reliability, on
The performance indicators such as row demodulation ability are needed to downlink PA circuit and uplink LNA circuit according to the time-multiplexed synchronization signal control of TDD
System switches over；Uplink LNA circuit is closed, while opening downlink PA circuit, anti-loops isolation not enough causes PA self-excitation
Concussion closes downlink PA circuit, while opening uplink LNA circuit, prevents downlink PA circuit lifting bottom from making an uproar and influencing demodulation accuracy.
As shown in Fig. 2, switching circuit of power supply is connect by first interface (VDD1) with the small microwave amplifier (A)；For
Electric switch circuit is connect by second interface (VDD2) with the low-noise amplifier (LNA).
As shown in figure 3, switching circuit of power supply include metal-oxide-semiconductor (U3), resistance R7, resistance R8, resistance R5, inverter (U2) and
Triode (K2)；Metal-oxide-semiconductor (U3) the 7th, 8 pins connect with first interface (VDD1), metal-oxide-semiconductor (U3) the 5th, 6 pins and
Two interfaces (VDD2) connection, the 2nd pin of metal-oxide-semiconductor (U3) are connect with one end of resistance R7, the 4th pin and electricity of metal-oxide-semiconductor (U3)
One end connection of R8 is hindered, the other end of resistance R7 is connect with the 6th pin of inverter (U2), the other end and inverter of resistance R8
(U2) the 4th pin connection, the 3rd pin of inverter (U2) are connect with the collector of triode (K2), and the 1st of inverter (U2) the
Pin is connect with one end of resistance R5, and the other end of resistance R5 is connect with the base stage of triode (K2), the transmitting of triode (K2)
Pole ground connection；3rd pin of inverter (U2) is connect by third interface (LNA-SW) with RF switch (K1).
Further, the base stage of triode (K2) is also connect with one end of resistance R6, and the other end of resistance R6 is with capacitor C6's
One end connection, the other end ground connection of capacitor C6.
Further, the 1st pin of metal-oxide-semiconductor (U3) is also grounded by capacitor C11, capacitor C12 respectively.
As shown in Fig. 2, grid voltage temperature compensation circuit is connect by the 4th interface (Vgs1) with the LDMOS pipe.
As shown in figure 4, grid voltage temperature compensation circuit includes inverter (U1), metal-oxide-semiconductor (U4), diode (D1), resistance R2, resistance
R3, resistance R0, resistance R4, inductance L1, capacitor C3 and capacitor C4；The end D of metal-oxide-semiconductor (U4) respectively with the 4th interface (Vgs1), electricity
One end connection of R4 is hindered, the other end of resistance R4 is connect with one end of one end of inductance L1, capacitor C4 respectively, and capacitor C4's is another
End is connect with one end of capacitor C3, and one end of resistance R0 is connect with the other end of the other end of capacitor C3, inductance L1 respectively, resistance
By connecting with single-chip microcontroller (MCU), single-chip microcontroller (MCU) is connect with temperature sensor (TMP) for one end of R0；The end G of metal-oxide-semiconductor (U4)
Connect with one end of resistance R2, the other end of resistance R2 is connect with the cathode of diode (D1), diode (D1) anode with it is inverse
Become the 6th pin connection of device (U1), inverter (U1) the 1st, 2,3 pins are grounded；The end S of metal-oxide-semiconductor (U4) is with resistance R3's
One end connection, the other end ground connection of resistance R3.
Further, the 5th foot of inverter (U1) is connect with one end of one end of capacitor C1, capacitor C2 respectively, capacitor C1's
The other end of the other end and capacitor C2 are grounded.
Further, the end D of metal-oxide-semiconductor (U4) is also connect with one end of capacitor C5, the other end ground connection of capacitor C5.
It is small micro- through prime in conjunction with Fig. 1 to Fig. 4 in particular, as shown in Figure 1, downlink LNA signal is inputted by the port PA_in
The multiple LDMOS pipes of rear class are transferred to after wave amplifier tube (A) amplification to amplify, and signal is intended merely in Fig. 2 and provides level-one LDMOS
Pipe, then signal is exported using circulator.Uplink LNA signal LNA_in is reversely input to RF switch K1 through circulator, so
After be transmitted further to low-noise amplifier LNA amplification after export；And tdd mode requires uplink PA circuit open and close downlink LNA electricity
Road, otherwise downlink LNA circuit open and close uplink PA circuit；Therefore, synchronization signal PA_SW high level controls inverter U1 and U2
Progress inversion is low level, while also control triode K2 realizes that control level overturning is that low level LNA_SW goes control radio frequency to open
It closes K1 and disconnects uplink, branch low level control inverter U2, at this point, control inverter U2's is two-way electricity opposite always
It is flat, so realizing that the shutdown of VDD2 is arrived in the offer of downlink+5V to VDD1 and uplink+5V through metal-oxide-semiconductor U3, after inverter U2 inversion
Low level through diode D1 control metal-oxide-semiconductor U3, but inverter U2 in incoming level in the rising edge of switching or the mistake of failing edge
During degree, there are certain clamp voltages；In other words namely incoming level be in 1.5V~3.6V it is excessive when, output
The level at end is then unstable, therefore increases power switch switching circuit and grid voltage temperature compensation circuit to guarantee the control of metal-oxide-semiconductor (U4)
Level equalization processed, the G extremely low level of metal-oxide-semiconductor (U4), then the pole the D overturning of metal-oxide-semiconductor (U4) is high level, what MCU was provided
DAC_Vgs grid voltage is supplied to LDMOS pipe after resistance R0, filtering energy storage network, resistance R4, realizes the conducting of downlink LNA circuit, on
The shutdown of row PA circuit.Since the LDMOS pipe grid voltage switching of tdd mode requires switching rising and falling edges to meet less than 2.5uS's
It is required that and guarantee grid voltage smooth steady, otherwise may cause self-oscillation.It is therefore desirable in the period of K1 shutdown grid voltage
Interior, the voltage fall for filtering energy storage network output cannot be too big, and the voltage after R4 is required close to 0V, so R4
There are close relationship in the switching time of value and TDD, guarantee that the charge of filtering energy storage network is put within the time that TDD switches through R4
It is electric seldom, but cannot be divided with LDMOS tube grid too big.When K1 is switched to cutting grid voltage state, filtering energy storage network warp
R4 discharges within the time that TDD switches, and will lead to filtering energy storage network level reduces.In order to maintain filtering energy storage network level flat
Surely, then the DAC driving R0 of MCU filters energy storage network to supplement, this just needs to reach charge and discharge charge balance.The DAC output of MCU is not
Preferably again by RF device, reason is that emitter follower is the circuit being made of amplifier, and the output impedance of amplifier is smaller, if directly
It connects and is connected to the network with filtering energy storage, then amplifier and C3 constitute concussion condition.As shown in Figure 3 and Figure 4, conversely, synchronization signal PA_
It is high level that SW low level control inverter U1 and U2, which carry out inversion, while also control triode K2 realizes that control level overturning is
High level LNA_SW goes control RF switch K1 to be switched to uplink LNA circuit, and branch high level controls inverter U2, at this point, control
Inverter U2's processed is two-way level opposite always, so shutdown and uplink through metal-oxide-semiconductor U3 realization downlink+5V to VDD1+
The conducting of 5V to VDD2, high level controls metal-oxide-semiconductor U4 through diode D1 after inverter U1 inversion, drags down grid level to 0V,
Realize the shutdown of downlink PA circuit, the conducting of uplink LNA circuit.The synchronization signal PA_SW of tdd mode constantly switches repeatedly, realizes
Uplink and downlink circuit constantly cyclic switching, reaches the communication objective of tdd mode.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all in essence of the invention
Made any modifications, equivalent replacements, and improvements etc., should all be included in the protection scope of the present invention within mind and principle.
Claims (10)
1. a kind of control device of TDD power amplifier, which is characterized in that including linking element, power switch switch unit and
Grid voltage temperature compensation unit, the linking element include concatenated downlink PA circuit and uplink LNA circuit, and the downlink PA circuit includes
Concatenated small microwave amplifier (A), LDMOS pipe and circulator, the uplink LNA circuit include concatenated RF switch (K1) and
Low-noise amplifier (LNA)；The power switch switch unit includes for putting to the small microwave amplifier (A) and low noise
The switching circuit of power supply that big device (LNA) is powered；The grid voltage temperature compensation unit includes for carrying out temperature to the LDMOS pipe
The grid voltage temperature compensation circuit of compensation.
2. a kind of control device of TDD power amplifier according to claim 1, which is characterized in that the power switch
Circuit is connect by first interface (VDD1) with the small microwave amplifier (A).
3. a kind of control device of TDD power amplifier according to claim 2, which is characterized in that the power switch
Circuit is connect by second interface (VDD2) with the low-noise amplifier (LNA).
4. a kind of control device of TDD power amplifier according to claim 3, which is characterized in that the power switch
Circuit includes metal-oxide-semiconductor (U3), resistance R7, resistance R8, resistance R5, inverter (U2) and triode (K2)；Metal-oxide-semiconductor (U3) the 7th,
8 pins are connect with first interface (VDD1), metal-oxide-semiconductor (U3) the 5th, 6 pins connect with second interface (VDD2), metal-oxide-semiconductor (U3)
The 2nd pin connect with one end of resistance R7, the 4th pin of metal-oxide-semiconductor (U3) is connect with one end of resistance R8, and resistance R7's is another
End is connect with the 6th pin of inverter (U2), and the other end of resistance R8 is connect with the 4th pin of inverter (U2), inverter
(U2) the 3rd pin is connect with the collector of triode (K2), and the 1st pin of inverter (U2) is connect with one end of resistance R5,
The other end of resistance R5 is connect with the base stage of triode (K2), the emitter ground connection of triode (K2)；Draw the 3rd of inverter (U2)
Foot is connect by third interface (LNA-SW) with RF switch (K1).
5. a kind of control device of TDD power amplifier according to claim 4, which is characterized in that triode (K2)
Base stage is also connect with one end of resistance R6, and the other end of resistance R6 is connect with one end of capacitor C6, the other end ground connection of capacitor C6.
6. a kind of control device of TDD power amplifier according to claim 5, which is characterized in that the of metal-oxide-semiconductor (U3)
1 pin is also grounded by capacitor C11, capacitor C12 respectively.
7. a kind of control device of TDD power amplifier according to claim 6, which is characterized in that the grid voltage temperature compensation
Circuit is connect by the 4th interface (Vgs1) with the LDMOS pipe.
8. a kind of control device of TDD power amplifier according to claim 7, which is characterized in that the grid voltage temperature compensation
Circuit includes inverter (U1), metal-oxide-semiconductor (U4), diode (D1), resistance R2, resistance R3, resistance R0, resistance R4, inductance L1, electricity
Hold C3 and capacitor C4；The end D of metal-oxide-semiconductor (U4) is connect with one end of the 4th interface (Vgs1), resistance R4 respectively, and resistance R4's is another
End is connect with one end of one end of inductance L1, capacitor C4 respectively, and the other end of capacitor C4 is connect with one end of capacitor C3, resistance R0
One end connect respectively with the other end of the other end of capacitor C3, inductance L1, one end of resistance R0 by with single-chip microcontroller (MCU) even
It connects, single-chip microcontroller (MCU) is connect with temperature sensor (TMP)；The end G of metal-oxide-semiconductor (U4) is connect with one end of resistance R2, resistance R2's
The other end is connect with the cathode of diode (D1), and the anode of diode (D1) is connect with the 6th pin of inverter (U1), inverter
(U1) the 1st, 2,3 pins are grounded；The end S of metal-oxide-semiconductor (U4) is connect with one end of resistance R3, the other end ground connection of resistance R3.
9. a kind of control device of TDD power amplifier according to claim 8, which is characterized in that inverter (U1)
5th foot is connect with one end of one end of capacitor C1, capacitor C2 respectively, and the other end of capacitor C1 and the other end of capacitor C2 connect
Ground.
10. a kind of control device of TDD power amplifier according to claim 9, which is characterized in that the D of metal-oxide-semiconductor (U4)
End is also connect with one end of capacitor C5, the other end ground connection of capacitor C5.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811281570.7A CN109450386B (en) | 2018-10-24 | 2018-10-24 | Control device of TDD power amplifier |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201811281570.7A CN109450386B (en) | 2018-10-24 | 2018-10-24 | Control device of TDD power amplifier |
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| CN109450386B CN109450386B (en) | 2022-06-03 |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109889172A (en) * | 2019-03-13 | 2019-06-14 | 西安玄黄通信技术有限公司 | A kind of TDD power amplifier based on CPLD quickly receives and dispatches switching circuit |
| IT201900011475A1 (en) * | 2019-07-11 | 2021-01-11 | Teko Telecom S R L | CIRCUIT FOR SWITCHING BETWEEN DOWNLINK / UPLINK OPERATING MODES IN A TDD WIRELESS COMMUNICATION SYSTEM |
| CN112822001A (en) * | 2020-12-31 | 2021-05-18 | 维沃移动通信有限公司 | Control method of electronic equipment and electronic equipment |
| CN113765632A (en) * | 2020-06-02 | 2021-12-07 | 深圳市万普拉斯科技有限公司 | Signal path configuration method and device of dual-mode terminal and dual-mode terminal |
| WO2022001348A1 (en) * | 2020-06-30 | 2022-01-06 | 三维通信股份有限公司 | Data transmitting method and device, storage medium, and electronic device |
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| 李昕: "基于氮化镓功放管高效率多载波功率放大器的设计与实现", 《中国优秀博硕士学位论文全文数据库(硕士)信息科技辑》 * |
| 梁效迪: "一种应用于2.4GHzWLAN超高功率低噪声的射频收发模块设计", 《中国优秀博硕士学位论文全文数据库(硕士)信息科技辑》 * |
| 程维维: "应用于TD-SCDMA的微型智能线性功率放大器的研究与实现", 《中国优秀博硕士学位论文全文数据库(硕士)信息科技辑》 * |
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| CN109889172A (en) * | 2019-03-13 | 2019-06-14 | 西安玄黄通信技术有限公司 | A kind of TDD power amplifier based on CPLD quickly receives and dispatches switching circuit |
| CN109889172B (en) * | 2019-03-13 | 2023-03-31 | 西安玄黄通信技术有限公司 | TDD power amplifier fast receiving and dispatching switching circuit based on CPLD |
| IT201900011475A1 (en) * | 2019-07-11 | 2021-01-11 | Teko Telecom S R L | CIRCUIT FOR SWITCHING BETWEEN DOWNLINK / UPLINK OPERATING MODES IN A TDD WIRELESS COMMUNICATION SYSTEM |
| WO2021005555A1 (en) * | 2019-07-11 | 2021-01-14 | Teko Telecom S.R.L. | Circuit for downlink/uplink operational mode switching in a tdd wireless communication system |
| CN113765632A (en) * | 2020-06-02 | 2021-12-07 | 深圳市万普拉斯科技有限公司 | Signal path configuration method and device of dual-mode terminal and dual-mode terminal |
| WO2022001348A1 (en) * | 2020-06-30 | 2022-01-06 | 三维通信股份有限公司 | Data transmitting method and device, storage medium, and electronic device |
| CN112822001A (en) * | 2020-12-31 | 2021-05-18 | 维沃移动通信有限公司 | Control method of electronic equipment and electronic equipment |
| CN112822001B (en) * | 2020-12-31 | 2023-03-14 | 维沃移动通信有限公司 | Control method of electronic equipment and electronic equipment |
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